annotate dbg/dbg.py @ 29:83e80c2c489c

seperated working emu code from broken emu code.
wrote dbg interface

#!/usr/bin/env python
# dbg.py - debug client
import struct
import os, sys
from time import sleep

# talks to the emulator
# see dbgi() in emu/main.c for the inverse
class controller:
    
    def __init__(self):
        self.Emu = None
        open('out', 'w').close()
    
    def snd(self, m):
        self.Emu.stdin.write(struct.pack('>B', m))

    def rcv(self, l):
        lc = 0
        while lc != l:
            lc = os.path.getsize('out')
        sleep(0.5)
        with open('out', 'r') as f:
            c = f.read()
        open('out', 'w').close()
        return c

    def step(self):
        self.snd(0x00)

    def run(self, lenh, lenl):
        self.snd(0x01)
        snd(lenh)
        snd(lenl)

    def set_reg(self, reg, data):
        self.snd(0x02)
        self.snd(reg)  # reg
        self.snd(data) # data

    def get_reg(self, reg):
        self.snd(0x03)
        self.snd(reg)  # reg
        return self.rcv(1)

    def set_flag(self, flag, on):
        self.snd(0x04)
        if on == 0:
            self.snd(flag)
            self.snd(0)
        else:
            self.snd(flag)
            self.snd(1)

    def get_flag(self, flag):
        self.snd(0x05)
        self.snd(flag)
        return self.rcv(1)

    def set_block(self, addrh, addrl, data):
        self.snd(0x06)
        self.snd(addrh) # address high byte
        self.snd(addrl) # address low byte
        self.snd((len(data) >> 8) & 0xFF)
        self.snd(len(data) & 0xFF)
        for b in data:
            self.snd(b) # data

    def get_block(self, addrh, addrl, lenh, lenl):
        block = []
        self.snd(0x07)
        self.snd(addrh) # address high byte
        self.snd(addrl) # address low byte
        self.snd(lenh)  
        self.snd(lenl) 
        return self.rcv(lenl | (lenh << 8))

    def get_a(self):
        self.snd(0x09)
        return self.rcv(1)

    def get_flags(self):
        self.snd(0x0A)
        return self.rcv(1)

    def get_ir(self):
        self.snd(0x0B)
        return self.rcv(1)