57 #ifndef AVCODEC_MIPS_AACDEC_FLOAT_H 58 #define AVCODEC_MIPS_AACDEC_FLOAT_H 62 #if HAVE_INLINE_ASM && HAVE_MIPSFPU 63 static inline float *VMUL2_mips(
float *
dst,
const float *
v,
unsigned idx,
66 float temp0, temp1, temp2;
71 "andi %[temp3], %[idx], 15 \n\t" 72 "ext %[temp4], %[idx], 4, 4 \n\t" 73 "sll %[temp3], %[temp3], 2 \n\t" 74 "sll %[temp4], %[temp4], 2 \n\t" 75 "lwc1 %[temp2], 0(%[scale]) \n\t" 76 "lwxc1 %[temp0], %[temp3](%[v]) \n\t" 77 "lwxc1 %[temp1], %[temp4](%[v]) \n\t" 78 "mul.s %[temp0], %[temp0], %[temp2] \n\t" 79 "mul.s %[temp1], %[temp1], %[temp2] \n\t" 80 "addiu %[ret], %[dst], 8 \n\t" 81 "swc1 %[temp0], 0(%[dst]) \n\t" 82 "swc1 %[temp1], 4(%[dst]) \n\t" 84 : [temp0]
"=&f"(temp0), [temp1]
"=&f"(temp1),
85 [temp2]
"=&f"(temp2), [temp3]
"=&r"(temp3),
86 [temp4]
"=&r"(temp4), [ret]
"=&r"(ret)
87 : [idx]
"r"(idx), [scale]
"r"(scale), [
v]
"r"(
v),
94 static inline float *VMUL4_mips(
float *dst,
const float *v,
unsigned idx,
97 int temp0, temp1, temp2, temp3;
98 float temp4, temp5, temp6, temp7, temp8;
102 "andi %[temp0], %[idx], 3 \n\t" 103 "ext %[temp1], %[idx], 2, 2 \n\t" 104 "ext %[temp2], %[idx], 4, 2 \n\t" 105 "ext %[temp3], %[idx], 6, 2 \n\t" 106 "sll %[temp0], %[temp0], 2 \n\t" 107 "sll %[temp1], %[temp1], 2 \n\t" 108 "sll %[temp2], %[temp2], 2 \n\t" 109 "sll %[temp3], %[temp3], 2 \n\t" 110 "lwc1 %[temp4], 0(%[scale]) \n\t" 111 "lwxc1 %[temp5], %[temp0](%[v]) \n\t" 112 "lwxc1 %[temp6], %[temp1](%[v]) \n\t" 113 "lwxc1 %[temp7], %[temp2](%[v]) \n\t" 114 "lwxc1 %[temp8], %[temp3](%[v]) \n\t" 115 "mul.s %[temp5], %[temp5], %[temp4] \n\t" 116 "mul.s %[temp6], %[temp6], %[temp4] \n\t" 117 "mul.s %[temp7], %[temp7], %[temp4] \n\t" 118 "mul.s %[temp8], %[temp8], %[temp4] \n\t" 119 "addiu %[ret], %[dst], 16 \n\t" 120 "swc1 %[temp5], 0(%[dst]) \n\t" 121 "swc1 %[temp6], 4(%[dst]) \n\t" 122 "swc1 %[temp7], 8(%[dst]) \n\t" 123 "swc1 %[temp8], 12(%[dst]) \n\t" 125 : [temp0]
"=&r"(temp0), [temp1]
"=&r"(temp1),
126 [temp2]
"=&r"(temp2), [temp3]
"=&r"(temp3),
127 [temp4]
"=&f"(temp4), [temp5]
"=&f"(temp5),
128 [temp6]
"=&f"(temp6), [temp7]
"=&f"(temp7),
129 [temp8]
"=&f"(temp8), [ret]
"=&r"(ret)
130 : [idx]
"r"(idx), [scale]
"r"(scale), [
v]
"r"(
v),
137 static inline float *VMUL2S_mips(
float *dst,
const float *v,
unsigned idx,
138 unsigned sign,
const float *scale)
140 int temp0, temp1, temp2, temp3, temp4, temp5;
141 float temp6, temp7, temp8, temp9;
145 "andi %[temp0], %[idx], 15 \n\t" 146 "ext %[temp1], %[idx], 4, 4 \n\t" 147 "lw %[temp4], 0(%[scale]) \n\t" 148 "srl %[temp2], %[sign], 1 \n\t" 149 "sll %[temp3], %[sign], 31 \n\t" 150 "sll %[temp2], %[temp2], 31 \n\t" 151 "sll %[temp0], %[temp0], 2 \n\t" 152 "sll %[temp1], %[temp1], 2 \n\t" 153 "lwxc1 %[temp8], %[temp0](%[v]) \n\t" 154 "lwxc1 %[temp9], %[temp1](%[v]) \n\t" 155 "xor %[temp5], %[temp4], %[temp2] \n\t" 156 "xor %[temp4], %[temp4], %[temp3] \n\t" 157 "mtc1 %[temp5], %[temp6] \n\t" 158 "mtc1 %[temp4], %[temp7] \n\t" 159 "mul.s %[temp8], %[temp8], %[temp6] \n\t" 160 "mul.s %[temp9], %[temp9], %[temp7] \n\t" 161 "addiu %[ret], %[dst], 8 \n\t" 162 "swc1 %[temp8], 0(%[dst]) \n\t" 163 "swc1 %[temp9], 4(%[dst]) \n\t" 165 : [temp0]
"=&r"(temp0), [temp1]
"=&r"(temp1),
166 [temp2]
"=&r"(temp2), [temp3]
"=&r"(temp3),
167 [temp4]
"=&r"(temp4), [temp5]
"=&r"(temp5),
168 [temp6]
"=&f"(temp6), [temp7]
"=&f"(temp7),
169 [temp8]
"=&f"(temp8), [temp9]
"=&f"(temp9),
171 : [idx]
"r"(idx), [
scale]
"r"(
scale), [v]
"r"(v),
172 [
dst]
"r"(
dst), [sign]
"r"(sign)
178 static inline float *VMUL4S_mips(
float *dst,
const float *v,
unsigned idx,
179 unsigned sign,
const float *scale)
181 int temp0, temp1, temp2, temp3, temp4;
182 float temp10, temp11, temp12, temp13, temp14, temp15, temp16, temp17;
184 unsigned int mask = 1
U << 31;
187 "lw %[temp0], 0(%[scale]) \n\t" 188 "and %[temp1], %[idx], 3 \n\t" 189 "ext %[temp2], %[idx], 2, 2 \n\t" 190 "ext %[temp3], %[idx], 4, 2 \n\t" 191 "ext %[temp4], %[idx], 6, 2 \n\t" 192 "sll %[temp1], %[temp1], 2 \n\t" 193 "sll %[temp2], %[temp2], 2 \n\t" 194 "sll %[temp3], %[temp3], 2 \n\t" 195 "sll %[temp4], %[temp4], 2 \n\t" 196 "lwxc1 %[temp10], %[temp1](%[v]) \n\t" 197 "lwxc1 %[temp11], %[temp2](%[v]) \n\t" 198 "lwxc1 %[temp12], %[temp3](%[v]) \n\t" 199 "lwxc1 %[temp13], %[temp4](%[v]) \n\t" 200 "and %[temp1], %[sign], %[mask] \n\t" 201 "ext %[temp2], %[idx], 12, 1 \n\t" 202 "ext %[temp3], %[idx], 13, 1 \n\t" 203 "ext %[temp4], %[idx], 14, 1 \n\t" 204 "sllv %[sign], %[sign], %[temp2] \n\t" 205 "xor %[temp1], %[temp0], %[temp1] \n\t" 206 "and %[temp2], %[sign], %[mask] \n\t" 207 "mtc1 %[temp1], %[temp14] \n\t" 208 "xor %[temp2], %[temp0], %[temp2] \n\t" 209 "sllv %[sign], %[sign], %[temp3] \n\t" 210 "mtc1 %[temp2], %[temp15] \n\t" 211 "and %[temp3], %[sign], %[mask] \n\t" 212 "sllv %[sign], %[sign], %[temp4] \n\t" 213 "xor %[temp3], %[temp0], %[temp3] \n\t" 214 "and %[temp4], %[sign], %[mask] \n\t" 215 "mtc1 %[temp3], %[temp16] \n\t" 216 "xor %[temp4], %[temp0], %[temp4] \n\t" 217 "mtc1 %[temp4], %[temp17] \n\t" 218 "mul.s %[temp10], %[temp10], %[temp14] \n\t" 219 "mul.s %[temp11], %[temp11], %[temp15] \n\t" 220 "mul.s %[temp12], %[temp12], %[temp16] \n\t" 221 "mul.s %[temp13], %[temp13], %[temp17] \n\t" 222 "addiu %[ret], %[dst], 16 \n\t" 223 "swc1 %[temp10], 0(%[dst]) \n\t" 224 "swc1 %[temp11], 4(%[dst]) \n\t" 225 "swc1 %[temp12], 8(%[dst]) \n\t" 226 "swc1 %[temp13], 12(%[dst]) \n\t" 228 : [temp0]
"=&r"(temp0), [temp1]
"=&r"(temp1),
229 [temp2]
"=&r"(temp2), [temp3]
"=&r"(temp3),
230 [temp4]
"=&r"(temp4), [temp10]
"=&f"(temp10),
231 [temp11]
"=&f"(temp11), [temp12]
"=&f"(temp12),
232 [temp13]
"=&f"(temp13), [temp14]
"=&f"(temp14),
233 [temp15]
"=&f"(temp15), [temp16]
"=&f"(temp16),
234 [temp17]
"=&f"(temp17), [ret]
"=&r"(ret),
236 : [idx]
"r"(idx), [
scale]
"r"(
scale), [v]
"r"(v),
237 [
dst]
"r"(
dst), [mask]
"r"(mask)
243 #define VMUL2 VMUL2_mips 244 #define VMUL4 VMUL4_mips 245 #define VMUL2S VMUL2S_mips 246 #define VMUL4S VMUL4S_mips
static const uint16_t mask[17]
AAC definitions and structures.
else dst[i][x+y *dst_stride[i]]