changeset 283:bfe2e929304b prerelease

Updated PRU code -- same idea for muxes 4-7

--- a/include/pru_rtaudio_bin.h	Tue May 17 17:54:35 2016 +0100
+++ b/include/pru_rtaudio_bin.h	Tue May 17 18:31:43 2016 +0100
@@ -669,7 +669,7 @@
      0x12e3efef,
      0x80f73c8f,
      0x0104f7f7,
-     0xc901f878,
+     0xc901f889,
      0x24ffffe2,
      0x10e2ece7,
      0x0904e7e7,
@@ -785,15 +785,32 @@
      0x10fcfefc,
      0x12fbfcfc,
      0x10fcfcfe,
+     0x6907e111,
+     0x240300fc,
+     0x10fcf8fc,
+     0x5100fc0e,
+     0x0b08fcfc,
+     0x1138fefb,
+     0x0108fbfb,
+     0x1138fbfb,
+     0x5103fc04,
+     0x1118fbfb,
+     0x5102fc02,
+     0x1108fbfb,
+     0x24ffffdc,
+     0x24ffc79c,
+     0x10fcfefc,
+     0x12fbfcfc,
+     0x10fcfcfe,
      0x1504f8f8,
      0x0101e1e1,
-     0x6ee9e162,
+     0x6ee9e151,
      0x79000004,
      0x1504f8f8,
      0x0102e1e1,
-     0x6ee9e15e,
+     0x6ee9e14d,
      0x0101eaea,
-     0x6eebea5b,
+     0x6eebea4a,
      0x10f0f0e2,
      0x10f1f1f0,
      0x10e2e2f1,
@@ -822,7 +839,7 @@
      0x00e1e3e3,
      0xe1002382,
      0xf1003982,
-     0x5700e22e,
+     0x5700e21d,
      0x240000fb,
      0xe1443d9b,
      0xc901f80c,

--- a/pru_rtaudio.p	Tue May 17 17:54:35 2016 +0100
+++ b/pru_rtaudio.p	Tue May 17 18:31:43 2016 +0100
@@ -582,6 +582,28 @@
      MOV reg_pru1_mux_pins, r28       // Move back to r30 to propagate to pins
 DONE:
 .endm
+
+// Multiplexer Capelet: Increment channel on muxes 4-7
+.macro MUX_INCREMENT_4_TO_7
+     MOV r28, FLAG_MASK_MUX_CONFIG
+     AND r28, reg_flags, r28             // Check flags
+     QBEQ DONE, r28, 0                   // Skip if disabled
+     LSR r28, r28, FLAG_BIT_MUX_CONFIG0
+     AND r27, reg_pru1_mux_pins, 0x38    // Current mux channel in r30 bits 5-3
+     ADD r27, r27, 8            // Increment channel (+1 LSB starting at bit 3)
+     AND r27, r27, 0x38         // Mask to 8 channels
+     QBEQ UPDATE, r28, 0x03
+     AND r27, r27, 0x18         // Mask to 4 channels
+     QBEQ UPDATE, r28, 0x02
+     AND r27, r27, 0x08         // Mask to 2 channels
+UPDATE:
+     MOV r28, 0xFFFFFFC7
+     AND r28, reg_pru1_mux_pins, r28  // Mask out bits 5-3 of r30
+     OR  r28, r28, r27                // Combine with new value
+     MOV reg_pru1_mux_pins, r28       // Move back to r30 to propagate to pins
+DONE:
+.endm
+
 	
 START:
      // Load useful registers for addressing SPI
@@ -1021,6 +1043,9 @@
      QBNE MUX_0_3_DONE, r1, 3    // Change mux settings for ch0-3 after reading ch. 3
      MUX_INCREMENT_0_TO_3
 MUX_0_3_DONE:
+     QBNE MUX_4_7_DONE, r1, 7    // Change mux settings for ch4-7 after reading ch. 7
+     MUX_INCREMENT_4_TO_7
+MUX_4_7_DONE:
 	
      // Toggle the high/low word for McASP control (since we send one word out of
      // 32 bits for each pair of SPI channels)