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changeset 282:5b490c00488f prerelease

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PRU update to support mux capelet
author andrewm
date Tue, 17 May 2016 17:54:35 +0100
parents 5f17da990d1b
children bfe2e929304b
files include/pru_rtaudio_bin.h pru_rtaudio.p
diffstat 2 files changed, 92 insertions(+), 10 deletions(-) [+]
line wrap: on
line diff
--- a/include/pru_rtaudio_bin.h	Tue May 17 17:49:49 2016 +0100
+++ b/include/pru_rtaudio_bin.h	Tue May 17 17:54:35 2016 +0100
@@ -301,6 +301,16 @@
      0xf12c3982,
      0x5100e202,
      0x1f03f8f8,
+     0xf1303982,
+     0x6901e209,
+     0xf1343982,
+     0x1103e2e2,
+     0x5100e206,
+     0x0908e2e2,
+     0x12e2f8f8,
+     0x24ffffc2,
+     0x24ffc082,
+     0x10e2fefe,
      0xf1243982,
      0x5100e202,
      0x1f01f8f8,
@@ -634,7 +644,7 @@
      0x79000002,
      0x0b10eee7,
      0xf1c03d82,
-     0xd500e299,
+     0xd500e28f,
      0xcf05e2fe,
      0x10e7e7fb,
      0x240208fc,
@@ -659,7 +669,7 @@
      0x12e3efef,
      0x80f73c8f,
      0x0104f7f7,
-     0xc901f867,
+     0xc901f878,
      0x24ffffe2,
      0x10e2ece7,
      0x0904e7e7,
@@ -697,7 +707,7 @@
      0x4902e904,
      0x1101eafb,
      0x6900fb08,
-     0x2102b700,
+     0x2102c100,
      0x1103e1fb,
      0x6900fb05,
      0xf100269b,
@@ -758,15 +768,32 @@
      0x12e7eded,
      0x80f3388d,
      0x0104f3f3,
+     0x6903e111,
+     0x240300fc,
+     0x10fcf8fc,
+     0x5100fc0e,
+     0x0b08fcfc,
+     0x1107fefb,
+     0x0101fbfb,
+     0x1107fbfb,
+     0x5103fc04,
+     0x1103fbfb,
+     0x5102fc02,
+     0x1101fbfb,
+     0x24ffffdc,
+     0x24fff89c,
+     0x10fcfefc,
+     0x12fbfcfc,
+     0x10fcfcfe,
      0x1504f8f8,
      0x0101e1e1,
-     0x6ee9e173,
+     0x6ee9e162,
      0x79000004,
      0x1504f8f8,
      0x0102e1e1,
-     0x6ee9e16f,
+     0x6ee9e15e,
      0x0101eaea,
-     0x6eebea6c,
+     0x6eebea5b,
      0x10f0f0e2,
      0x10f1f1f0,
      0x10e2e2f1,
@@ -795,7 +822,7 @@
      0x00e1e3e3,
      0xe1002382,
      0xf1003982,
-     0x5700e23f,
+     0x5700e22e,
      0x240000fb,
      0xe1443d9b,
      0xc901f80c,
--- a/pru_rtaudio.p	Tue May 17 17:49:49 2016 +0100
+++ b/pru_rtaudio.p	Tue May 17 17:54:35 2016 +0100
@@ -84,7 +84,9 @@
 #define COMM_NUM_CHANNELS     40	  // Low 2 bits indicate 8 [0x3], 4 [0x1] or 2 [0x0] channels
 #define COMM_USE_DIGITAL      44	  // Whether or not to use DIGITAL
 #define COMM_PRU_NUMBER       48          // Which PRU this code is running on
+#define COMM_MUX_CONFIG       52          // Whether to use the mux capelet, and how many channels
 
+// General constants for McASP peripherals (used for audio codec)
 #define MCASP0_BASE 0x48038000
 #define MCASP1_BASE 0x4803C000
 
@@ -184,7 +186,17 @@
 #define FLAG_BIT_BUFFER1	0
 #define FLAG_BIT_USE_SPI	1
 #define FLAG_BIT_MCASP_HWORD	2		// Whether we are on the high word for McASP transmission
-#define FLAG_BIT_USE_DIGITAL 3
+#define FLAG_BIT_USE_DIGITAL	3
+	
+#define FLAG_BIT_MUX_CONFIG0	 8		// Mux capelet configuration:
+#define FLAG_BIT_MUX_CONFIG1	 9		// 00 = off, 01 = 2 ch., 10 = 4 ch., 11 = 8 ch.
+#define FLAG_MASK_MUX_CONFIG	 0x0300
+	
+#define FLAG_BIT_MUX_STATE0	10		// Current state of the mux channels
+#define FLAG_BIT_MUX_STATE1	11
+#define FLAG_BIT_MUX_STATE2	12
+#define FLAG_MASK_MUX_STATE	0x1C00
+	
 // Registers used throughout
 
 // r1, r2, r3 are used for temporary storage
@@ -213,6 +225,7 @@
 #define reg_spi_addr		r26		// Base address for SPI
 // r27, r28 used in macros
 #define reg_mcasp_addr		r29		// Base address for McASP
+#define reg_pru1_mux_pins	r30		// Register mapped directly to P8 pins (PRU1 only)
 
 //0  P8_07 36 0x890/090 66 gpio2[2]
 //1  P8_08 37 0x894/094 67 gpio2[3]
@@ -548,7 +561,28 @@
      AND r28, r28, r27
      QBEQ POLL, r28, 0
 .endm
-   
+
+// Multiplexer Capelet: Increment channel on muxes 0-3
+.macro MUX_INCREMENT_0_TO_3
+     MOV r28, FLAG_MASK_MUX_CONFIG
+     AND r28, reg_flags, r28             // Check flags
+     QBEQ DONE, r28, 0                   // Skip if disabled
+     LSR r28, r28, FLAG_BIT_MUX_CONFIG0
+     AND r27, reg_pru1_mux_pins, 0x07    // Current mux channel in r30 bits 2-0
+     ADD r27, r27, 1            // Increment channel
+     AND r27, r27, 0x07         // Mask to 8 channels
+     QBEQ UPDATE, r28, 0x03
+     AND r27, r27, 0x03         // Mask to 4 channels
+     QBEQ UPDATE, r28, 0x02
+     AND r27, r27, 0x01         // Mask to 2 channels
+UPDATE:
+     MOV r28, 0xFFFFFFF8
+     AND r28, reg_pru1_mux_pins, r28  // Mask out low 3 bits of r30
+     OR  r28, r28, r27                // Combine with new value
+     MOV reg_pru1_mux_pins, r28       // Move back to r30 to propagate to pins
+DONE:
+.endm
+	
 START:
      // Load useful registers for addressing SPI
      MOV reg_comm_addr, SHARED_COMM_MEM_BASE
@@ -601,6 +635,22 @@
      QBGT DIGITAL_INIT_BUFFER_LOOP, r3, r4 //loop until we reach the end of the buffer
 */
 DIGITAL_INIT_DONE:
+     // Check if we should use an external multiplexer capelet
+     // The valid values are 0 (off), 1 (2 ch), 2 (4 ch), 3 (8 ch)
+     // This can only happen on PRU1 because of how the pins are mapped
+     LBBO r2, reg_comm_addr, COMM_PRU_NUMBER, 4
+     QBNE MUX_INIT_DONE, r2, 1
+     LBBO r2, reg_comm_addr, COMM_MUX_CONFIG, 4
+     AND r2, r2, 0x03
+     QBEQ MUX_INIT_DONE, r2, 0
+     // If we get here, we are using the mux. Prepare flags and initial state.
+     LSL r2, r2, FLAG_BIT_MUX_CONFIG0
+     OR  reg_flags, reg_flags, r2
+     // Clear lower 6 bits of r30 which controls the mux pins
+     MOV r2, 0xFFFFFFC0
+     AND reg_pru1_mux_pins, reg_pru1_mux_pins, r2
+MUX_INIT_DONE:
+	
      // Find out whether we should use SPI ADC and DAC
      LBBO r2, reg_comm_addr, COMM_USE_SPI, 4
      QBEQ SPI_FLAG_CHECK_DONE, r2, 0
@@ -967,6 +1017,11 @@
      SBCO reg_adc_data, C_ADC_DAC_MEM, reg_adc_current, 4
      ADD reg_adc_current, reg_adc_current, 4
 
+     // If enabled, update the multiplexer settings
+     QBNE MUX_0_3_DONE, r1, 3    // Change mux settings for ch0-3 after reading ch. 3
+     MUX_INCREMENT_0_TO_3
+MUX_0_3_DONE:
+	
      // Toggle the high/low word for McASP control (since we send one word out of
      // 32 bits for each pair of SPI channels)
      XOR reg_flags, reg_flags, (1 << FLAG_BIT_MCASP_HWORD)
@@ -987,7 +1042,7 @@
      ADD r1, r1, 2
      QBNE ADC_DAC_LOOP, r1, reg_num_channels
 	
-ADC_DAC_LOOP_DONE:	
+ADC_DAC_LOOP_DONE:
      // Increment number of frames, see if we have more to write
      ADD reg_frame_current, reg_frame_current, 1
      QBNE WRITE_LOOP, reg_frame_current, reg_frame_total