annotate Lib/fftw-3.2.1/cell/spu/spu_n2fv_2.spuc @ 0:25bf17994ef1

First commit. VS2013, Codeblocks and Mac OSX configuration
author Geogaddi\David <d.m.ronan@qmul.ac.uk>
date Thu, 09 Jul 2015 01:12:16 +0100
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d@0 1 /*
d@0 2 * Copyright (c) 2003, 2007-8 Matteo Frigo
d@0 3 * Copyright (c) 2003, 2007-8 Massachusetts Institute of Technology
d@0 4 *
d@0 5 * This program is free software; you can redistribute it and/or modify
d@0 6 * it under the terms of the GNU General Public License as published by
d@0 7 * the Free Software Foundation; either version 2 of the License, or
d@0 8 * (at your option) any later version.
d@0 9 *
d@0 10 * This program is distributed in the hope that it will be useful,
d@0 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
d@0 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
d@0 13 * GNU General Public License for more details.
d@0 14 *
d@0 15 * You should have received a copy of the GNU General Public License
d@0 16 * along with this program; if not, write to the Free Software
d@0 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
d@0 18 *
d@0 19 */
d@0 20 /* Generated by: ../../genfft/gen_notw_c -standalone -fma -reorder-insns -simd -compact -variables 100000 -with-ostride 2 -include fftw-spu.h -store-multiple 2 -n 2 -name X(spu_n2fv_2) */
d@0 21
d@0 22 /*
d@0 23 * This function contains 2 FP additions, 0 FP multiplications,
d@0 24 * (or, 2 additions, 0 multiplications, 0 fused multiply/add),
d@0 25 * 7 stack variables, 0 constants, and 5 memory accesses
d@0 26 */
d@0 27 #include "fftw-spu.h"
d@0 28
d@0 29 void X(spu_n2fv_2) (const R *ri, const R *ii, R *ro, R *io, stride is, stride os, INT v, INT ivs, INT ovs) {
d@0 30 INT i;
d@0 31 const R *xi;
d@0 32 R *xo;
d@0 33 xi = ri;
d@0 34 xo = ro;
d@0 35 for (i = v; i > 0; i = i - VL, xi = xi + (VL * ivs), xo = xo + (VL * ovs), MAKE_VOLATILE_STRIDE(is), MAKE_VOLATILE_STRIDE(os)) {
d@0 36 V T1, T2, T3, T4;
d@0 37 T1 = LD(&(xi[0]), ivs, &(xi[0]));
d@0 38 T2 = LD(&(xi[WS(is, 1)]), ivs, &(xi[WS(is, 1)]));
d@0 39 T3 = VSUB(T1, T2);
d@0 40 STM2(&(xo[2]), T3, ovs, &(xo[2]));
d@0 41 T4 = VADD(T1, T2);
d@0 42 STM2(&(xo[0]), T4, ovs, &(xo[0]));
d@0 43 STN2(&(xo[0]), T4, T3, ovs);
d@0 44 }
d@0 45 }