Mercurial > hg > batch-feature-extraction-tool
diff Lib/fftw-3.2.1/cell/spu/spu_n2fv_2.spuc @ 0:25bf17994ef1
First commit. VS2013, Codeblocks and Mac OSX configuration
author | Geogaddi\David <d.m.ronan@qmul.ac.uk> |
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date | Thu, 09 Jul 2015 01:12:16 +0100 |
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--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/Lib/fftw-3.2.1/cell/spu/spu_n2fv_2.spuc Thu Jul 09 01:12:16 2015 +0100 @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2003, 2007-8 Matteo Frigo + * Copyright (c) 2003, 2007-8 Massachusetts Institute of Technology + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ +/* Generated by: ../../genfft/gen_notw_c -standalone -fma -reorder-insns -simd -compact -variables 100000 -with-ostride 2 -include fftw-spu.h -store-multiple 2 -n 2 -name X(spu_n2fv_2) */ + +/* + * This function contains 2 FP additions, 0 FP multiplications, + * (or, 2 additions, 0 multiplications, 0 fused multiply/add), + * 7 stack variables, 0 constants, and 5 memory accesses + */ +#include "fftw-spu.h" + +void X(spu_n2fv_2) (const R *ri, const R *ii, R *ro, R *io, stride is, stride os, INT v, INT ivs, INT ovs) { + INT i; + const R *xi; + R *xo; + xi = ri; + xo = ro; + for (i = v; i > 0; i = i - VL, xi = xi + (VL * ivs), xo = xo + (VL * ovs), MAKE_VOLATILE_STRIDE(is), MAKE_VOLATILE_STRIDE(os)) { + V T1, T2, T3, T4; + T1 = LD(&(xi[0]), ivs, &(xi[0])); + T2 = LD(&(xi[WS(is, 1)]), ivs, &(xi[WS(is, 1)])); + T3 = VSUB(T1, T2); + STM2(&(xo[2]), T3, ovs, &(xo[2])); + T4 = VADD(T1, T2); + STM2(&(xo[0]), T4, ovs, &(xo[0])); + STN2(&(xo[0]), T4, T3, ovs); + } +}