annotate src/opus-1.3/silk/arm/NSQ_del_dec_arm.h @ 169:223a55898ab9 tip default

Add null config files
author Chris Cannam <cannam@all-day-breakfast.com>
date Mon, 02 Mar 2020 14:03:47 +0000
parents 4664ac0c1032
children
rev   line source
cannam@154 1 /***********************************************************************
cannam@154 2 Copyright (c) 2017 Google Inc.
cannam@154 3 Redistribution and use in source and binary forms, with or without
cannam@154 4 modification, are permitted provided that the following conditions
cannam@154 5 are met:
cannam@154 6 - Redistributions of source code must retain the above copyright notice,
cannam@154 7 this list of conditions and the following disclaimer.
cannam@154 8 - Redistributions in binary form must reproduce the above copyright
cannam@154 9 notice, this list of conditions and the following disclaimer in the
cannam@154 10 documentation and/or other materials provided with the distribution.
cannam@154 11 - Neither the name of Internet Society, IETF or IETF Trust, nor the
cannam@154 12 names of specific contributors, may be used to endorse or promote
cannam@154 13 products derived from this software without specific prior written
cannam@154 14 permission.
cannam@154 15 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
cannam@154 16 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
cannam@154 17 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
cannam@154 18 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
cannam@154 19 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
cannam@154 20 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
cannam@154 21 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
cannam@154 22 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
cannam@154 23 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
cannam@154 24 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
cannam@154 25 POSSIBILITY OF SUCH DAMAGE.
cannam@154 26 ***********************************************************************/
cannam@154 27
cannam@154 28 #ifndef SILK_NSQ_DEL_DEC_ARM_H
cannam@154 29 #define SILK_NSQ_DEL_DEC_ARM_H
cannam@154 30
cannam@154 31 #include "celt/arm/armcpu.h"
cannam@154 32
cannam@154 33 #if defined(OPUS_ARM_MAY_HAVE_NEON_INTR)
cannam@154 34 void silk_NSQ_del_dec_neon(
cannam@154 35 const silk_encoder_state *psEncC, silk_nsq_state *NSQ,
cannam@154 36 SideInfoIndices *psIndices, const opus_int16 x16[], opus_int8 pulses[],
cannam@154 37 const opus_int16 PredCoef_Q12[2 * MAX_LPC_ORDER],
cannam@154 38 const opus_int16 LTPCoef_Q14[LTP_ORDER * MAX_NB_SUBFR],
cannam@154 39 const opus_int16 AR_Q13[MAX_NB_SUBFR * MAX_SHAPE_LPC_ORDER],
cannam@154 40 const opus_int HarmShapeGain_Q14[MAX_NB_SUBFR],
cannam@154 41 const opus_int Tilt_Q14[MAX_NB_SUBFR],
cannam@154 42 const opus_int32 LF_shp_Q14[MAX_NB_SUBFR],
cannam@154 43 const opus_int32 Gains_Q16[MAX_NB_SUBFR],
cannam@154 44 const opus_int pitchL[MAX_NB_SUBFR], const opus_int Lambda_Q10,
cannam@154 45 const opus_int LTP_scale_Q14);
cannam@154 46
cannam@154 47 #if !defined(OPUS_HAVE_RTCD)
cannam@154 48 #define OVERRIDE_silk_NSQ_del_dec (1)
cannam@154 49 #define silk_NSQ_del_dec(psEncC, NSQ, psIndices, x16, pulses, PredCoef_Q12, \
cannam@154 50 LTPCoef_Q14, AR_Q13, HarmShapeGain_Q14, Tilt_Q14, \
cannam@154 51 LF_shp_Q14, Gains_Q16, pitchL, Lambda_Q10, \
cannam@154 52 LTP_scale_Q14, arch) \
cannam@154 53 ((void)(arch), \
cannam@154 54 PRESUME_NEON(silk_NSQ_del_dec)( \
cannam@154 55 psEncC, NSQ, psIndices, x16, pulses, PredCoef_Q12, LTPCoef_Q14, \
cannam@154 56 AR_Q13, HarmShapeGain_Q14, Tilt_Q14, LF_shp_Q14, Gains_Q16, pitchL, \
cannam@154 57 Lambda_Q10, LTP_scale_Q14))
cannam@154 58 #endif
cannam@154 59 #endif
cannam@154 60
cannam@154 61 #if !defined(OVERRIDE_silk_NSQ_del_dec)
cannam@154 62 /*Is run-time CPU detection enabled on this platform?*/
cannam@154 63 #if defined(OPUS_HAVE_RTCD) && (defined(OPUS_ARM_MAY_HAVE_NEON_INTR) && \
cannam@154 64 !defined(OPUS_ARM_PRESUME_NEON_INTR))
cannam@154 65 extern void (*const SILK_NSQ_DEL_DEC_IMPL[OPUS_ARCHMASK + 1])(
cannam@154 66 const silk_encoder_state *psEncC, silk_nsq_state *NSQ,
cannam@154 67 SideInfoIndices *psIndices, const opus_int16 x16[], opus_int8 pulses[],
cannam@154 68 const opus_int16 PredCoef_Q12[2 * MAX_LPC_ORDER],
cannam@154 69 const opus_int16 LTPCoef_Q14[LTP_ORDER * MAX_NB_SUBFR],
cannam@154 70 const opus_int16 AR_Q13[MAX_NB_SUBFR * MAX_SHAPE_LPC_ORDER],
cannam@154 71 const opus_int HarmShapeGain_Q14[MAX_NB_SUBFR],
cannam@154 72 const opus_int Tilt_Q14[MAX_NB_SUBFR],
cannam@154 73 const opus_int32 LF_shp_Q14[MAX_NB_SUBFR],
cannam@154 74 const opus_int32 Gains_Q16[MAX_NB_SUBFR],
cannam@154 75 const opus_int pitchL[MAX_NB_SUBFR], const opus_int Lambda_Q10,
cannam@154 76 const opus_int LTP_scale_Q14);
cannam@154 77 #define OVERRIDE_silk_NSQ_del_dec (1)
cannam@154 78 #define silk_NSQ_del_dec(psEncC, NSQ, psIndices, x16, pulses, PredCoef_Q12, \
cannam@154 79 LTPCoef_Q14, AR_Q13, HarmShapeGain_Q14, Tilt_Q14, \
cannam@154 80 LF_shp_Q14, Gains_Q16, pitchL, Lambda_Q10, \
cannam@154 81 LTP_scale_Q14, arch) \
cannam@154 82 ((*SILK_NSQ_DEL_DEC_IMPL[(arch)&OPUS_ARCHMASK])( \
cannam@154 83 psEncC, NSQ, psIndices, x16, pulses, PredCoef_Q12, LTPCoef_Q14, \
cannam@154 84 AR_Q13, HarmShapeGain_Q14, Tilt_Q14, LF_shp_Q14, Gains_Q16, pitchL, \
cannam@154 85 Lambda_Q10, LTP_scale_Q14))
cannam@154 86 #elif defined(OPUS_ARM_PRESUME_NEON_INTR)
cannam@154 87 #define OVERRIDE_silk_NSQ_del_dec (1)
cannam@154 88 #define silk_NSQ_del_dec(psEncC, NSQ, psIndices, x16, pulses, PredCoef_Q12, \
cannam@154 89 LTPCoef_Q14, AR_Q13, HarmShapeGain_Q14, Tilt_Q14, \
cannam@154 90 LF_shp_Q14, Gains_Q16, pitchL, Lambda_Q10, \
cannam@154 91 LTP_scale_Q14, arch) \
cannam@154 92 ((void)(arch), \
cannam@154 93 silk_NSQ_del_dec_neon(psEncC, NSQ, psIndices, x16, pulses, PredCoef_Q12, \
cannam@154 94 LTPCoef_Q14, AR_Q13, HarmShapeGain_Q14, Tilt_Q14, \
cannam@154 95 LF_shp_Q14, Gains_Q16, pitchL, Lambda_Q10, \
cannam@154 96 LTP_scale_Q14))
cannam@154 97 #endif
cannam@154 98 #endif
cannam@154 99
cannam@154 100 #endif /* end SILK_NSQ_DEL_DEC_ARM_H */