cannam@154: /***********************************************************************
cannam@154: Copyright (c) 2017 Google Inc.
cannam@154: Redistribution and use in source and binary forms, with or without
cannam@154: modification, are permitted provided that the following conditions
cannam@154: are met:
cannam@154: - Redistributions of source code must retain the above copyright notice,
cannam@154: this list of conditions and the following disclaimer.
cannam@154: - Redistributions in binary form must reproduce the above copyright
cannam@154: notice, this list of conditions and the following disclaimer in the
cannam@154: documentation and/or other materials provided with the distribution.
cannam@154: - Neither the name of Internet Society, IETF or IETF Trust, nor the
cannam@154: names of specific contributors, may be used to endorse or promote
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cannam@154: permission.
cannam@154: THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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cannam@154: IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
cannam@154: ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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cannam@154: ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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cannam@154: ***********************************************************************/
cannam@154: 
cannam@154: #ifndef SILK_NSQ_DEL_DEC_ARM_H
cannam@154: #define SILK_NSQ_DEL_DEC_ARM_H
cannam@154: 
cannam@154: #include "celt/arm/armcpu.h"
cannam@154: 
cannam@154: #if defined(OPUS_ARM_MAY_HAVE_NEON_INTR)
cannam@154: void silk_NSQ_del_dec_neon(
cannam@154:     const silk_encoder_state *psEncC, silk_nsq_state *NSQ,
cannam@154:     SideInfoIndices *psIndices, const opus_int16 x16[], opus_int8 pulses[],
cannam@154:     const opus_int16 PredCoef_Q12[2 * MAX_LPC_ORDER],
cannam@154:     const opus_int16 LTPCoef_Q14[LTP_ORDER * MAX_NB_SUBFR],
cannam@154:     const opus_int16 AR_Q13[MAX_NB_SUBFR * MAX_SHAPE_LPC_ORDER],
cannam@154:     const opus_int HarmShapeGain_Q14[MAX_NB_SUBFR],
cannam@154:     const opus_int Tilt_Q14[MAX_NB_SUBFR],
cannam@154:     const opus_int32 LF_shp_Q14[MAX_NB_SUBFR],
cannam@154:     const opus_int32 Gains_Q16[MAX_NB_SUBFR],
cannam@154:     const opus_int pitchL[MAX_NB_SUBFR], const opus_int Lambda_Q10,
cannam@154:     const opus_int LTP_scale_Q14);
cannam@154: 
cannam@154: #if !defined(OPUS_HAVE_RTCD)
cannam@154: #define OVERRIDE_silk_NSQ_del_dec (1)
cannam@154: #define silk_NSQ_del_dec(psEncC, NSQ, psIndices, x16, pulses, PredCoef_Q12,  \
cannam@154:                          LTPCoef_Q14, AR_Q13, HarmShapeGain_Q14, Tilt_Q14,   \
cannam@154:                          LF_shp_Q14, Gains_Q16, pitchL, Lambda_Q10,          \
cannam@154:                          LTP_scale_Q14, arch)                                \
cannam@154:     ((void)(arch),                                                           \
cannam@154:      PRESUME_NEON(silk_NSQ_del_dec)(                                         \
cannam@154:          psEncC, NSQ, psIndices, x16, pulses, PredCoef_Q12, LTPCoef_Q14,     \
cannam@154:          AR_Q13, HarmShapeGain_Q14, Tilt_Q14, LF_shp_Q14, Gains_Q16, pitchL, \
cannam@154:          Lambda_Q10, LTP_scale_Q14))
cannam@154: #endif
cannam@154: #endif
cannam@154: 
cannam@154: #if !defined(OVERRIDE_silk_NSQ_del_dec)
cannam@154: /*Is run-time CPU detection enabled on this platform?*/
cannam@154: #if defined(OPUS_HAVE_RTCD) && (defined(OPUS_ARM_MAY_HAVE_NEON_INTR) && \
cannam@154:                                 !defined(OPUS_ARM_PRESUME_NEON_INTR))
cannam@154: extern void (*const SILK_NSQ_DEL_DEC_IMPL[OPUS_ARCHMASK + 1])(
cannam@154:     const silk_encoder_state *psEncC, silk_nsq_state *NSQ,
cannam@154:     SideInfoIndices *psIndices, const opus_int16 x16[], opus_int8 pulses[],
cannam@154:     const opus_int16 PredCoef_Q12[2 * MAX_LPC_ORDER],
cannam@154:     const opus_int16 LTPCoef_Q14[LTP_ORDER * MAX_NB_SUBFR],
cannam@154:     const opus_int16 AR_Q13[MAX_NB_SUBFR * MAX_SHAPE_LPC_ORDER],
cannam@154:     const opus_int HarmShapeGain_Q14[MAX_NB_SUBFR],
cannam@154:     const opus_int Tilt_Q14[MAX_NB_SUBFR],
cannam@154:     const opus_int32 LF_shp_Q14[MAX_NB_SUBFR],
cannam@154:     const opus_int32 Gains_Q16[MAX_NB_SUBFR],
cannam@154:     const opus_int pitchL[MAX_NB_SUBFR], const opus_int Lambda_Q10,
cannam@154:     const opus_int LTP_scale_Q14);
cannam@154: #define OVERRIDE_silk_NSQ_del_dec (1)
cannam@154: #define silk_NSQ_del_dec(psEncC, NSQ, psIndices, x16, pulses, PredCoef_Q12, \
cannam@154:                          LTPCoef_Q14, AR_Q13, HarmShapeGain_Q14, Tilt_Q14,  \
cannam@154:                          LF_shp_Q14, Gains_Q16, pitchL, Lambda_Q10,         \
cannam@154:                          LTP_scale_Q14, arch)                               \
cannam@154:     ((*SILK_NSQ_DEL_DEC_IMPL[(arch)&OPUS_ARCHMASK])(                        \
cannam@154:         psEncC, NSQ, psIndices, x16, pulses, PredCoef_Q12, LTPCoef_Q14,     \
cannam@154:         AR_Q13, HarmShapeGain_Q14, Tilt_Q14, LF_shp_Q14, Gains_Q16, pitchL, \
cannam@154:         Lambda_Q10, LTP_scale_Q14))
cannam@154: #elif defined(OPUS_ARM_PRESUME_NEON_INTR)
cannam@154: #define OVERRIDE_silk_NSQ_del_dec (1)
cannam@154: #define silk_NSQ_del_dec(psEncC, NSQ, psIndices, x16, pulses, PredCoef_Q12,   \
cannam@154:                          LTPCoef_Q14, AR_Q13, HarmShapeGain_Q14, Tilt_Q14,    \
cannam@154:                          LF_shp_Q14, Gains_Q16, pitchL, Lambda_Q10,           \
cannam@154:                          LTP_scale_Q14, arch)                                 \
cannam@154:     ((void)(arch),                                                            \
cannam@154:      silk_NSQ_del_dec_neon(psEncC, NSQ, psIndices, x16, pulses, PredCoef_Q12, \
cannam@154:                            LTPCoef_Q14, AR_Q13, HarmShapeGain_Q14, Tilt_Q14,  \
cannam@154:                            LF_shp_Q14, Gains_Q16, pitchL, Lambda_Q10,         \
cannam@154:                            LTP_scale_Q14))
cannam@154: #endif
cannam@154: #endif
cannam@154: 
cannam@154: #endif /* end SILK_NSQ_DEL_DEC_ARM_H */