Mercurial > hg > ede
changeset 14:2b8eb2c86602
Major update to assembler design, now handles labels proper.
Next step unit test
Added boot procedure and experimental function look up table to emulator
Started implementing operations
tested SET and CLR operations with success
| author | james <jb302@eecs.qmul.ac.uk> |
|---|---|
| date | Wed, 29 Jan 2014 20:11:07 +0000 |
| parents | 7a988d894f74 |
| children | 26044ed126fb |
| files | assembler/README assembler/assembler.py assembler/assembler.pyc assembler/language.py assembler/language.pyc emulator/a.out emulator/emu.c emulator/iset.c emulator/iset.h emulator/mem.c emulator/mem.h emulator/test.c tests/label_test.asm tests/label_test.bin tests/mem.dump tests/test.asm tests/test.bin utils/gen_language.ipynb utils/instruction_set.txt utils/instruction_table.txt utils/iset.csv utils/iset.txt |
| diffstat | 22 files changed, 1216 insertions(+), 1541 deletions(-) [+] |
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--- a/assembler/README Sat Jan 11 12:44:39 2014 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,23 +0,0 @@ -version: 0.00001 - -NOTES: - -language.py: --The entire language is defined in language.iset - --language.tokenize() does not yet handle these data types: - - addr11 - - port_addr - - vect8 - --16 bit hex strings must be in the format '0xXXXX' or '0xXXX' - or they will be interpreted an a 8 bit data type - -assembler.py: - -- first_pass() doesn't handle any directives apart from 'label:' -- labels must be defined before they are referenced or second_pass() breaks -- 16 bit address labels don't work unless the address is actually > 255 - otherwise tokenize returns them as 'rel8' and the symbol doesn't match - anything in iset -
--- a/assembler/assembler.py Sat Jan 11 12:44:39 2014 +0000 +++ b/assembler/assembler.py Wed Jan 29 20:11:07 2014 +0000 @@ -19,9 +19,12 @@ source_code = filter(lambda l: l != '\n', f.readlines()) asm = [] + label_index = {} + pc = 0 + # <line> ::= [<statement>] [";"<comment>] <EOL> for line in source_code: - + # remove EOL line = line.strip() @@ -42,15 +45,15 @@ # skip empty statements if not statement: continue - # if needed update label tag and remove label + # if needed update index and remove label label = None if statement[0][-1:] == ':': - label = statement[0][:-1] + label_index[statement[0][:-1]] = pc; del statement[0] # return things that return False if empty if not statement: - asm.append(['', [], '', label]) + asm.append(['', [], [], '']) continue # <statement> ::= <mnemonic> [<arguments>] @@ -58,49 +61,44 @@ arguments = ''.join(statement[1:]).split(',') symbols, constants = tokenize(arguments) - asm.append([mnemonic, symbols, constants, label]) + width = iset[mnemonic][symbols][1] + + asm.append([mnemonic, arguments, symbols, constants]) - return asm + pc = pc + width + + return asm, label_index # take preprocessed asm and write machine code to binary file -def second_pass(f, asm): +def second_pass(f, asm, label_index): pc = 0 - label_index = {} + + for line in asm: + mne, args, sym, const = line - for line in asm: - mne, sym, const, label = line - - # if there is a label tag add label to index - if label: - label_index.update({label:pc}) # skip instructionless lines if not mne: continue # replace labels with addresses i = 0 - for s in sym: - if s in label_index: - sym[i] = num_string(label_index[s]) - val = tokenize([sym[i]])[1] + for a in args: + if a in label_index: + args[i] = num_string(label_index[a]) + val = tokenize([args[i]])[1] const = const + val i = i + 1 - # re-tokenize - sym = tokenize(sym)[0] - - # make symbols hashable - sym = tuple(sym) # assemble to file + # need to make sure 16 bit arguments are padded f.seek(pc) try: - f.write(struct.pack('>B', iset[mne][sym])) + f.write(struct.pack('>B', iset[mne][sym][0])) f.write(const) except: # will raise a symbol error when any unrecognised # mnemonic or argument format is found print 'syntax error: %s %s' % (mne, sym) return 'symbol_error' - pc = pc + len(const) + 1 f.seek(0) @@ -109,8 +107,8 @@ if __name__ == '__main__': f = open(sys.argv[1], 'r') b = open(sys.argv[2], 'wb') - asm = first_pass(f) - b = second_pass(b, asm) + asm, label_index = first_pass(f) + b = second_pass(b, asm, label_index) f.close() b.close()
--- a/assembler/language.py Sat Jan 11 12:44:39 2014 +0000 +++ b/assembler/language.py Wed Jan 29 20:11:07 2014 +0000 @@ -12,243 +12,251 @@ # valid arguments for this instruction set -# not actually in use -iargs = ('', 'addr11', 'addr16', 'sph', 'spl', '@dptr', 'ie', '@a+dptr', - '@addr16', 'vect8', '#data8', 'port_addr', 'dptr', 'bs', '@a+pc', - 'a', 'c', 'rel8', 'r0', 'r1', 'r2', 'r3', '#data16', 'sp', 'flags', - 'dpl', 'dph') +vargs = ('', '@a+dptr', 'dptr', 'bs', '@a+pc', + 'a', 'c','r0', 'r1', 'r2', 'r3', 'ie', + 'sp', 'flags', 'dpl', 'dph') # dictionary embedded dictionaries? # for every mnemonic in the instruction set index # there is an index of possible argument formats ('symbol') -# for that mnemonic and a corresponding op code -iset = {'add': {('a', '#data8'): 166, - ('a', '@dptr'): 167, - ('a', 'dph'): 164, - ('a', 'dpl'): 165, - ('a', 'r0'): 160, - ('a', 'r1'): 161, - ('a', 'r2'): 162, - ('a', 'r3'): 163}, - 'addc': {('a', '#data8'): 174, - ('a', '@dptr'): 175, - ('a', 'dph'): 172, - ('a', 'dpl'): 173, - ('a', 'r0'): 168, - ('a', 'r1'): 169, - ('a', 'r2'): 170, - ('a', 'r3'): 171}, - 'anl': {('a', '#data8'): 134, - ('a', '@dptr'): 135, - ('a', 'dph'): 132, - ('a', 'dpl'): 133, - ('a', 'r0'): 128, - ('a', 'r1'): 129, - ('a', 'r2'): 130, - ('a', 'r3'): 131}, - 'cjne': {('a', '#data8', 'rel8'): 223, - ('r0', '#data8', 'rel8'): 212, - ('r1', '#data8', 'rel8'): 213, - ('r2', '#data8', 'rel8'): 214, - ('r3', '#data8', 'rel8'): 215}, - 'clr': {('bs',): 11, ('c',): 9, ('ie',): 13}, - 'cpl': {('a',): 15, ('c',): 14}, - 'da': {('a',): 250}, - 'dec': {('a',): 159, ('dptr',): 157}, - 'div': {('r0', 'r1'): 249}, - 'djnz': {('r0', 'rel8'): 208, - ('r1', 'rel8'): 209, - ('r2', 'rel8'): 210, - ('r3', 'rel8'): 211}, - 'hlt': {('',): 255}, - 'in': {('a', 'port_addr'): 252}, - 'inc': {('a',): 158, ('dptr',): 156}, - 'int': {('vect8',): 254}, - 'jc': {('rel8',): 226}, - 'jmp': {('@a+dptr',): 221, ('@dptr',): 222}, - 'jnc': {('rel8',): 227}, - 'jns': {('rel8',): 231}, - 'jnz': {('rel8',): 225}, - 'jpe': {('rel8',): 229}, - 'jpo': {('rel8',): 228}, - 'js': {('rel8',): 230}, - 'jz': {('rel8',): 224}, - 'laf': {('',): 18}, - 'lcall': {('addr16',): 217}, - 'ljmp': {('addr16',): 216}, - 'mov': {('@addr16', 'a'): 29, - ('@dptr', 'a'): 31, - ('@dptr', 'dph'): 36, - ('@dptr', 'dpl'): 37, - ('@dptr', 'r0'): 32, - ('@dptr', 'r1'): 33, - ('@dptr', 'r2'): 34, - ('@dptr', 'r3'): 35, - ('@dptr', 'sph'): 38, - ('@dptr', 'spl'): 39, - ('a', '#data8'): 21, - ('a', '@a+dptr'): 26, - ('a', '@a+pc'): 27, - ('a', '@addr16'): 28, - ('a', '@dptr'): 30, - ('a', 'addr16'): 24, - ('a', 'dph'): 60, - ('a', 'dpl'): 61, - ('a', 'r0'): 56, - ('a', 'r1'): 57, - ('a', 'r2'): 58, - ('a', 'r3'): 59, - ('a', 'sph'): 62, - ('a', 'spl'): 63, - ('addr16', 'a'): 25, - ('dph', '#data8'): 44, - ('dph', '@dptr'): 100, - ('dph', 'a'): 52, - ('dph', 'dpl'): 101, - ('dph', 'r0'): 96, - ('dph', 'r1'): 97, - ('dph', 'r2'): 98, - ('dph', 'r3'): 99, - ('dph', 'sph'): 102, - ('dph', 'spl'): 103, - ('dpl', '#data8'): 45, - ('dpl', '@dptr'): 109, - ('dpl', 'a'): 53, - ('dpl', 'dph'): 108, - ('dpl', 'r0'): 104, - ('dpl', 'r1'): 105, - ('dpl', 'r2'): 106, - ('dpl', 'r3'): 107, - ('dpl', 'sph'): 110, - ('dpl', 'spl'): 111, - ('dptr', '#data16'): 23, - ('dptr', 'sp'): 19, - ('r0', '#data8'): 40, - ('r0', '@dptr'): 64, - ('r0', 'a'): 48, - ('r0', 'dph'): 68, - ('r0', 'dpl'): 69, - ('r0', 'r1'): 65, - ('r0', 'r2'): 66, - ('r0', 'r3'): 67, - ('r0', 'sph'): 70, - ('r0', 'spl'): 71, - ('r1', '#data8'): 41, - ('r1', '@dptr'): 73, - ('r1', 'a'): 49, - ('r1', 'dph'): 76, - ('r1', 'dpl'): 77, - ('r1', 'r0'): 72, - ('r1', 'r2'): 74, - ('r1', 'r3'): 75, - ('r1', 'sph'): 78, - ('r1', 'spl'): 79, - ('r2', '#data8'): 42, - ('r2', '@dptr'): 82, - ('r2', 'a'): 50, - ('r2', 'dph'): 84, - ('r2', 'dpl'): 85, - ('r2', 'r0'): 80, - ('r2', 'r1'): 81, - ('r2', 'r3'): 83, - ('r2', 'sph'): 86, - ('r2', 'spl'): 87, - ('r3', '#data8'): 43, - ('r3', '@dptr'): 91, - ('r3', 'a'): 51, - ('r3', 'dph'): 92, - ('r3', 'dpl'): 93, - ('r3', 'r0'): 88, - ('r3', 'r1'): 89, - ('r3', 'r2'): 90, - ('r3', 'sph'): 94, - ('r3', 'spl'): 95, - ('sp', '#data16'): 22, - ('sp', 'dptr'): 20, - ('sph', '#data8'): 46, - ('sph', '@dptr'): 118, - ('sph', 'a'): 54, - ('sph', 'dph'): 116, - ('sph', 'dpl'): 117, - ('sph', 'r0'): 112, - ('sph', 'r1'): 113, - ('sph', 'r2'): 114, - ('sph', 'r3'): 115, - ('sph', 'spl'): 119, - ('spl', '#data8'): 47, - ('spl', '@dptr'): 127, - ('spl', 'a'): 55, - ('spl', 'dph'): 124, - ('spl', 'dpl'): 125, - ('spl', 'r0'): 120, - ('spl', 'r1'): 121, - ('spl', 'r2'): 122, - ('spl', 'r3'): 123, - ('spl', 'sph'): 126}, - 'mul': {('r0', 'r1'): 248}, - 'nop': {('',): 0}, - 'orl': {('a', '#data8'): 142, - ('a', '@dptr'): 143, - ('a', 'dph'): 140, - ('a', 'dpl'): 141, - ('a', 'r0'): 136, - ('a', 'r1'): 137, - ('a', 'r2'): 138, - ('a', 'r3'): 139}, - 'out': {('port_addr', 'a'): 253}, - 'pcall': {('addr11',): 207}, - 'pjmp': {('addr11',): 199}, - 'pop': {('a',): 246, - ('dph',): 244, - ('dpl',): 245, - ('flags',): 247, - ('r0',): 240, - ('r1',): 241, - ('r2',): 242, - ('r3',): 243}, - 'push': {('a',): 238, - ('dph',): 236, - ('dpl',): 237, - ('flags',): 239, - ('r0',): 232, - ('r1',): 233, - ('r2',): 234, - ('r3',): 235}, - 'reserved': {('',): 251}, - 'ret': {('',): 218}, - 'reti': {('',): 219}, - 'rl': {('a',): 152}, - 'rlc': {('a',): 153}, - 'rr': {('a',): 154}, - 'rrc': {('a',): 155}, - 'set': {('bs',): 10, ('c',): 8, ('ie',): 12}, - 'sfa': {('',): 17}, - 'sjmp': {('',): 220}, - 'sub': {('a', '#data8'): 182, - ('a', '@dptr'): 183, - ('a', 'dph'): 180, - ('a', 'dpl'): 181, - ('a', 'r0'): 176, - ('a', 'r1'): 177, - ('a', 'r2'): 178, - ('a', 'r3'): 179}, - 'subb': {('a', '#data8'): 190, - ('a', '@dptr'): 191, - ('a', 'dph'): 188, - ('a', 'dpl'): 189, - ('a', 'r0'): 184, - ('a', 'r1'): 185, - ('a', 'r2'): 186, - ('a', 'r3'): 187}, - 'xcsd': {('',): 16}, - 'xrl': {('a', '#data8'): 150, - ('a', '@dptr'): 151, - ('a', 'dph'): 148, - ('a', 'dpl'): 149, - ('a', 'r0'): 144, - ('a', 'r1'): 145, - ('a', 'r2'): 146, - ('a', 'r3'): 147}} +# for that mnemonic and a corresponding op code and it's length +iset = { 'add': { ('a', '#data8'): [166, 2], + ('a', '@dptr'): [167, 1], + ('a', 'dph'): [164, 1], + ('a', 'dpl'): [165, 1], + ('a', 'r0'): [160, 1], + ('a', 'r1'): [161, 1], + ('a', 'r2'): [162, 1], + ('a', 'r3'): [163, 1]}, + 'addc': { ('a', '#data8'): [174, 2], + ('a', '@dptr'): [175, 1], + ('a', 'dph'): [172, 1], + ('a', 'dpl'): [173, 1], + ('a', 'r0'): [168, 1], + ('a', 'r1'): [169, 1], + ('a', 'r2'): [170, 1], + ('a', 'r3'): [171, 1]}, + 'anl': { ('a', '#data8'): [134, 2], + ('a', '@dptr'): [135, 1], + ('a', 'dph'): [132, 1], + ('a', 'dpl'): [133, 1], + ('a', 'r0'): [128, 1], + ('a', 'r1'): [129, 1], + ('a', 'r2'): [130, 1], + ('a', 'r3'): [131, 1]}, + 'cjne': { ('a', '#data8', 'label'): [223, 3], + ('a', '#data8', 'rel8'): [223, 3], + ('r0', '#data', 'label'): [212, 2], + ('r0', '#data', 'rel8'): [212, 2], + ('r1', '#data', 'label'): [213, 2], + ('r1', '#data', 'rel8'): [213, 2], + ('r2', '#data', 'label'): [214, 2], + ('r2', '#data', 'rel8'): [214, 2], + ('r3', '#data', 'label'): [215, 2], + ('r3', '#data', 'rel8'): [215, 2]}, + 'clr': { ('bs',): [11, 1], ('c',): [9, 1], ('ie',): [13, 1]}, + 'cpl': { ('a',): [15, 1], ('c',): [14, 1]}, + 'da': { ('a',): [250, 1]}, + 'dec': { ('a',): [159, 1], ('dptr',): [157, 1]}, + 'div': { ('r0', 'r1'): [249, 1]}, + 'djnz': { ('r0', 'label'): [208, 2], + ('r0', 'rel8'): [208, 2], + ('r1', 'label'): [209, 2], + ('r1', 'rel8'): [209, 2], + ('r2', 'label'): [210, 2], + ('r2', 'rel8'): [210, 2], + ('r3', 'label'): [211, 2], + ('r3', 'rel8'): [211, 2]}, + 'hlt': { ('',): [255, 1]}, + 'in': { ('a', 'port_addr'): [252, 2]}, + 'inc': { ('a',): [158, 1], ('dptr',): [156, 1]}, + 'int': { ('vect8',): [254, 2]}, + 'jc': { ('label',): [226, 2], ('rel8',): [226, 2]}, + 'jmp': { ('@a+dptr',): [221, 1], ('@dptr',): [222, 1]}, + 'jnc': { ('label',): [227, 2], ('rel8',): [227, 2]}, + 'jns': { ('label',): [231, 2], ('rel8',): [231, 2]}, + 'jnz': { ('label',): [225, 2], ('rel8',): [225, 2]}, + 'jpe': { ('label',): [229, 2], ('rel8',): [229, 2]}, + 'jpo': { ('label',): [228, 2], ('rel8',): [228, 2]}, + 'js': { ('label',): [230, 2], ('rel8',): [230, 2]}, + 'jz': { ('label',): [224, 2], ('rel8',): [224, 2]}, + 'laf': { ('',): [18, 1]}, + 'lcall': { ('addr16',): [217, 3], ('label',): [217, 3]}, + 'ljmp': { ('addr16',): [216, 3], ('label',): [216, 3]}, + 'mov': { ('@addr16', 'a'): [29, 3], + ('@dptr', 'a'): [31, 1], + ('@dptr', 'dph'): [36, 1], + ('@dptr', 'dpl'): [37, 1], + ('@dptr', 'r0'): [32, 1], + ('@dptr', 'r1'): [33, 1], + ('@dptr', 'r2'): [34, 1], + ('@dptr', 'r3'): [35, 1], + ('@dptr', 'sph'): [38, 1], + ('@dptr', 'spl'): [39, 1], + ('a', '#data8'): [21, 2], + ('a', '@a+dptr'): [26, 1], + ('a', '@a+pc'): [27, 1], + ('a', '@addr16'): [28, 3], + ('a', '@dptr'): [30, 1], + ('a', 'addr16'): [24, 3], + ('a', 'dph'): [60, 1], + ('a', 'dpl'): [61, 1], + ('a', 'label'): [24, 3], + ('a', 'r0'): [56, 1], + ('a', 'r1'): [57, 1], + ('a', 'r2'): [58, 1], + ('a', 'r3'): [59, 1], + ('a', 'sph'): [62, 1], + ('a', 'spl'): [63, 1], + ('addr16', 'a'): [25, 3], + ('dph', '#data8'): [44, 2], + ('dph', '@dptr'): [100, 1], + ('dph', 'a'): [52, 1], + ('dph', 'dpl'): [101, 1], + ('dph', 'r0'): [96, 1], + ('dph', 'r1'): [97, 1], + ('dph', 'r2'): [98, 1], + ('dph', 'r3'): [99, 1], + ('dph', 'sph'): [102, 1], + ('dph', 'spl'): [103, 1], + ('dpl', '#data8'): [45, 2], + ('dpl', '@dptr'): [109, 1], + ('dpl', 'a'): [53, 1], + ('dpl', 'dph'): [108, 1], + ('dpl', 'r0'): [104, 1], + ('dpl', 'r1'): [105, 1], + ('dpl', 'r2'): [106, 1], + ('dpl', 'r3'): [107, 1], + ('dpl', 'sph'): [110, 1], + ('dpl', 'spl'): [111, 1], + ('dptr', '#data16'): [23, 3], + ('dptr', 'sp'): [19, 1], + ('r0', '#data8'): [40, 2], + ('r0', '@dptr'): [64, 1], + ('r0', 'a'): [48, 1], + ('r0', 'dph'): [68, 1], + ('r0', 'dpl'): [69, 1], + ('r0', 'r1'): [65, 1], + ('r0', 'r2'): [66, 1], + ('r0', 'r3'): [67, 1], + ('r0', 'sph'): [70, 1], + ('r0', 'spl'): [71, 1], + ('r1', '#data8'): [41, 2], + ('r1', '@dptr'): [73, 1], + ('r1', 'a'): [49, 1], + ('r1', 'dph'): [76, 1], + ('r1', 'dpl'): [77, 1], + ('r1', 'r0'): [72, 1], + ('r1', 'r2'): [74, 1], + ('r1', 'r3'): [75, 1], + ('r1', 'sph'): [78, 1], + ('r1', 'spl'): [79, 1], + ('r2', '#data8'): [42, 2], + ('r2', '@dptr'): [82, 1], + ('r2', 'a'): [50, 1], + ('r2', 'dph'): [84, 1], + ('r2', 'dpl'): [85, 1], + ('r2', 'r0'): [80, 1], + ('r2', 'r1'): [81, 1], + ('r2', 'r3'): [83, 1], + ('r2', 'sph'): [86, 1], + ('r2', 'spl'): [87, 1], + ('r3', '#data8'): [43, 2], + ('r3', '@dptr'): [91, 1], + ('r3', 'a'): [51, 1], + ('r3', 'dph'): [92, 1], + ('r3', 'dpl'): [93, 1], + ('r3', 'r0'): [88, 1], + ('r3', 'r1'): [89, 1], + ('r3', 'r2'): [90, 1], + ('r3', 'sph'): [94, 1], + ('r3', 'spl'): [95, 1], + ('sp', '#data16'): [22, 3], + ('sp', 'dptr'): [20, 1], + ('sph', '#data8'): [46, 2], + ('sph', '@dptr'): [118, 1], + ('sph', 'a'): [54, 1], + ('sph', 'dph'): [116, 1], + ('sph', 'dpl'): [117, 1], + ('sph', 'r0'): [112, 1], + ('sph', 'r1'): [113, 1], + ('sph', 'r2'): [114, 1], + ('sph', 'r3'): [115, 1], + ('sph', 'spl'): [119, 1], + ('spl', '#data8'): [47, 2], + ('spl', '@dptr'): [127, 1], + ('spl', 'a'): [55, 1], + ('spl', 'dph'): [124, 1], + ('spl', 'dpl'): [125, 1], + ('spl', 'r0'): [120, 1], + ('spl', 'r1'): [121, 1], + ('spl', 'r2'): [122, 1], + ('spl', 'r3'): [123, 1], + ('spl', 'sph'): [126, 1]}, + 'mul': { ('r0', 'r1'): [248, 1]}, + 'nop': { ('',): [0, 1]}, + 'orl': { ('a', '#data8'): [142, 2], + ('a', '@dptr'): [143, 1], + ('a', 'dph'): [140, 1], + ('a', 'dpl'): [141, 1], + ('a', 'r0'): [136, 1], + ('a', 'r1'): [137, 1], + ('a', 'r2'): [138, 1], + ('a', 'r3'): [139, 1]}, + 'out': { ('port_addr', 'a'): [253, 2]}, + 'pcall': { ('addr11',): [207, 2], ('label',): [207, 2]}, + 'pjmp': { ('addr11',): [199, 2], ('label',): [199, 2]}, + 'pop': { ('a',): [246, 1], + ('dph',): [244, 1], + ('dpl',): [245, 1], + ('flags',): [247, 1], + ('r0',): [240, 1], + ('r1',): [241, 1], + ('r2',): [242, 1], + ('r3',): [243, 1]}, + 'push': { ('a',): [238, 1], + ('dph',): [236, 1], + ('dpl',): [237, 1], + ('flags',): [239, 1], + ('r0',): [232, 1], + ('r1',): [233, 1], + ('r2',): [234, 1], + ('r3',): [235, 1]}, + 'reserved': { ('',): [251, 1]}, + 'ret': { ('',): [218, 1]}, + 'reti': { ('',): [219, 1]}, + 'rl': { ('a',): [152, 1]}, + 'rlc': { ('a',): [153, 1]}, + 'rr': { ('a',): [154, 1]}, + 'rrc': { ('a',): [155, 1]}, + 'set': { ('bs',): [10, 1], ('c',): [8, 1], ('ie',): [12, 1]}, + 'sfa': { ('',): [17, 1]}, + 'sjmp': { ('label',): [220, 2], ('rel8',): [220, 2]}, + 'sub': { ('a', '#data8'): [182, 2], + ('a', '@dptr'): [183, 1], + ('a', 'dph'): [180, 1], + ('a', 'dpl'): [181, 1], + ('a', 'r0'): [176, 1], + ('a', 'r1'): [177, 1], + ('a', 'r2'): [178, 1], + ('a', 'r3'): [179, 1]}, + 'subb': { ('a', '#data8'): [190, 2], + ('a', '@dptr'): [191, 1], + ('a', 'dph'): [188, 1], + ('a', 'dpl'): [189, 1], + ('a', 'r0'): [184, 1], + ('a', 'r1'): [185, 1], + ('a', 'r2'): [186, 1], + ('a', 'r3'): [187, 1]}, + 'xcsd': { ('',): [16, 1]}, + 'xrl': { ('a', '#data8'): [150, 2], + ('a', '@dptr'): [151, 1], + ('a', 'dph'): [148, 1], + ('a', 'dpl'): [149, 1], + ('a', 'r0'): [144, 1], + ('a', 'r1'): [145, 1], + ('a', 'r2'): [146, 1], + ('a', 'r3'): [147, 1]}} # take a list of arguments # identify constant data: @@ -259,7 +267,7 @@ data = '' for a in args: - + # immediate ints if a[:3] == '#' + PREFIX: # 8 bit ints @@ -303,10 +311,15 @@ sym.append('@addr16') val = int(a[1:], BASE) data = data + struct.pack('>H', val) - - # return unknown symbols so language can be extended more easily + + elif a in vargs: + sym.append(a) + + # return unknown stings are either labels or source code errors else: - sym.append(a) + sym.append('label') - return sym, data + + return tuple(sym), data +
--- a/emulator/emu.c Sat Jan 11 12:44:39 2014 +0000 +++ b/emulator/emu.c Wed Jan 29 20:11:07 2014 +0000 @@ -1,12 +1,46 @@ /* emu.c - * emulation start up and fetch/decode/execute loop */ + * ema00ulation start up and fetch/decode/execute loop */ +#include <stdio.h> #include <string.h> #include "mem.h" #include "iset.h" /* instruction table */ -void (*iset[2])(void) = { NOP, - FOO }; +void (*iset[256])(void) = { + NOP, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + SET, CLR, SET, CLR, SET, CLR, CPL, CPL, + XCSD, SFA, LAF, MOV, MOV, MOV, MOV, MOV, + MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + ANL, ANL, ANL, ANL, ANL, ANL, ANL, ANL, + ORL, ORL, ORL, ORL, ORL, ORL, ORL, ORL, + XRL, XRL, XRL, XRL, XRL, XRL, XRL, XRL, + RL, RLC, RR, RRC, INC, DEC, INC, DEC, + ADD, ADD, ADD, ADD, ADD, ADD, ADD, ADD, + ADDC, ADDC, ADDC, ADDC, ADDC, ADDC, ADDC, ADDC, + SUB, SUB, SUB, SUB, SUB, SUB, SUB, SUB, + SUBB, SUBB, SUBB, SUBB, SUBB, SUBB, SUBB, SUBB, + PJMP, PJMP, PJMP, PJMP, PJMP, PJMP, PJMP, PJMP, + PCALL, PCALL, PCALL, PCALL, PCALL, PCALL, PCALL, PCALL, + DJNZ, DJNZ, DJNZ, DJNZ, CJNE, CJNE, CJNE, CJNE, + LJMP, LCALL, RET, RETI, SJMP, JMP, JMP, CJNE, + JZ, JNZ, JC, JNC, JPO, JPE, JS, JNS, + PUSH, PUSH, PUSH, PUSH, PUSH, PUSH, PUSH, PUSH, + POP, POP, POP, POP, POP, POP, POP, POP, + MUL, DIV, DA, RESERVED, IN, OUT, INT, HLT +}; + void boot(void) { @@ -14,20 +48,33 @@ memset(®isters, 0, sizeof(registers)); memset(&memory, 0, sizeof(memory)); - /* hack hack hack */ - BYTE program[] = { 0x00, - 0x01}; - memcpy(&memory, program, sizeof(program)); + /* load program from stdin + * c must be signed since EOF is -1 on linux */ + WIDE i = 0; + BYTE c = getchar(); + for(i ; i < 0x10000 ; i++) { + /* add HLT if EOF is reached */ + if ((signed char) c == EOF) { + memory[i] = 0xFF; + break; + } + memory[i] = c; + c = getchar(); + } } -void +void +step(void) { + op = fetch(); + (*iset[op])(); +} + +void main(void) { boot(); - BYTE op; - int i = 0; - for (i ; i < 3 ; i++) { - op = fetch(); - (*iset[op])(); + for (;;) { + step(); + putchar(registers.flags); } - dump_all(); } +
--- a/emulator/iset.c Sat Jan 11 12:44:39 2014 +0000 +++ b/emulator/iset.c Wed Jan 29 20:11:07 2014 +0000 @@ -1,15 +1,326 @@ /* iset.c * op functions */ +#include <stdlib.h> +#include <stdio.h> // debug #include "iset.h" #include "mem.h" +//implement me +void +JNS(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +LJMP(void) { + registers.PC = registers.PC + 1; +} + +/* + * 0x08 - SET C + * 0x0A - SET BS + * 0x0c - SET IE */ +void +SET(void) { + switch (op) { + case 0x08: + registers.flags = registers.flags | 0x80; + break; + case 0x0A: + registers.flags = registers.flags | 0x01; + break; + case 0x0C: + registers.flags = registers.flags | 0x02; + break; + } + registers.PC = registers.PC + 1; +} + +void +RESERVED(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +JPO(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +ANL(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +JNZ(void) { + registers.PC = registers.PC + 1; +} + +/* 0xFF - HLT */ +void +HLT(void) { + exit(0); +} + +//implement me +void +RRC(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +POP(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +JNC(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +SUBB(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +PCALL(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +IN(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +INC(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +XRL(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +SUB(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +RR(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +SJMP(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +RETI(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +RET(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +INT(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +ADD(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +ADDC(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +RL(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +MUL(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +JC(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +JMP(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +DJNZ(void) { + registers.PC = registers.PC + 1; +} + +/* 0x09 - CLR C + * 0x0B - CLR BS + * 0x0D - CLR IE */ +void +CLR(void) { + switch (op) { + case 0x09: + registers.flags = registers.flags ^ 0x80; + break; + case 0x0B: + registers.flags = registers.flags ^ 0x01; + break; + case 0x0D: + registers.flags = registers.flags ^ 0x02; + break; + } + registers.PC = registers.PC + 1; +} + +//implement me +void +JZ(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +JPE(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +LAF(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +MOV(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +RLC(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +JS(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +ORL(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +CJNE(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +XCSD(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +LCALL(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +DA(void) { + registers.PC = registers.PC + 1; +} + +//implement me void NOP(void) { registers.PC = registers.PC + 1; } +//implement me void -FOO(void) { - set_A(0x41); +SFA(void) { registers.PC = registers.PC + 1; } + +//implement me +void +CPL(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +PUSH(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +DIV(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +DEC(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +OUT(void) { + registers.PC = registers.PC + 1; +} + +//implement me +void +PJMP(void) { + registers.PC = registers.PC + 1; +}
--- a/emulator/iset.h Sat Jan 11 12:44:39 2014 +0000 +++ b/emulator/iset.h Wed Jan 29 20:11:07 2014 +0000 @@ -2,12 +2,153 @@ * op function definitions */ #ifndef ISET_H #define ISET_H + +void +JNS(void); -void +void +LJMP(void); + +void +SET(void); + +void +RESERVED(void); + +void +JPO(void); + +void +ANL(void); + +void +JNZ(void); + +void +HLT(void); + +void +RRC(void); + +void +POP(void); + +void +JNC(void); + +void +SUBB(void); + +void +PCALL(void); + +void +IN(void); + +void +INC(void); + +void +XRL(void); + +void +SUB(void); + +void +RR(void); + +void +SJMP(void); + +void +RETI(void); + +void +RET(void); + +void +INT(void); + +void +ADD(void); + +void +ADDC(void); + +void +RL(void); + +void +MUL(void); + +void +JC(void); + +void +JMP(void); + +void +DJNZ(void); + +void +CLR(void); + +void +JZ(void); + +void +JPE(void); + +void +LAF(void); + +void +MOV(void); + +void +RLC(void); + +void +JS(void); + +void +ORL(void); + +void +CJNE(void); + +void +XCSD(void); + +void +LCALL(void); + +void +DA(void); + +void NOP(void); void -FOO(void); +SFA(void); + +void +CPL(void); + +void +PUSH(void); + +void +DIV(void); + +void +DEC(void); + +void +OUT(void); + +void +PJMP(void); #endif
--- a/emulator/mem.c Sat Jan 11 12:44:39 2014 +0000 +++ b/emulator/mem.c Wed Jan 29 20:11:07 2014 +0000 @@ -3,6 +3,11 @@ #include "mem.h" BYTE +fetch(void) { + return memory[registers.PC]; +} + +BYTE read_mem(WIDE addr) { return memory[addr]; } @@ -13,21 +18,6 @@ } BYTE -fetch(void) { - return memory[registers.PC]; -} - -void -set_PC(WIDE data) { - registers.PC = data; -} - -WIDE -get_PC(void) { - return registers.PC; -} - -BYTE get_R(BYTE reg, _Bool bank) { switch(bank) { case 0: @@ -47,68 +37,6 @@ } } -BYTE -get_A(void) { - return registers.A; -} - -void -set_A(BYTE data) { - registers.A = data; -} - -BYTE -get_DPH(void) { - return registers.DPH; -} - -void -set_DPH(BYTE data) { - registers.DPH = data; - -} - -BYTE -get_DPL(void) { - return registers.DPL; -} - -void -set_DPL(BYTE data) { - registers.DPL = data; -} - -BYTE -get_SPH(void) { - return registers.SPH; -} - -void -set_SPH(BYTE data) { - registers.SPH = data; -} - -BYTE -get_SPL(void) { - return registers.SPL; -} - -void -set_SPL(BYTE data) { - registers.SPL = data; -} - -BYTE -get_flags(void) { - return registers.flags; -} - -void -set_flags(BYTE data) { - registers.flags = data; -} - - WIDE get_DPTR(void) { return (((WIDE)registers.DPH) << 8) | registers.DPL;
--- a/emulator/mem.h Sat Jan 11 12:44:39 2014 +0000 +++ b/emulator/mem.h Wed Jan 29 20:11:07 2014 +0000 @@ -9,6 +9,9 @@ typedef unsigned char BYTE; typedef unsigned short WIDE; +/* current opcode */ +BYTE op; + /* emulator memory * - registers * - 64kB 16-bit main memory */ @@ -28,6 +31,9 @@ * bank 1: R[0x03 - 0x06] */ BYTE R[0x06]; BYTE A; + + /* 7 6 5 4 3 2 1 0 + * C Z AC P S OV IE BS */ BYTE flags; } registers; @@ -39,22 +45,8 @@ * - fetch() returns BYTE * - read_mem(WIDE) returns BYTE * - write_mem(WIDE, BYTE) - * - set_PC(WIDE) - * - get_PC() returns WIDE * - get_R(BYTE, BOOL) returns BYTE * - set_R(BYTE, BOOL, BYTE) - * - get_A() returns BYTE - * - set_A(BYTE) - * - get_DPH() returns BYTE - * - set_DPH(BYTE) - * - get DPL() returns BYTE - * - set_DPL(BYTE) - * - get_SPH() returns BYTE - * - set_SPH(BYTE) - * - get_SPL() returns BYTE - * - set_SPL(BYTE) - * - get_flags() returns BYTE - * - set_flags(BYTE) * - get_DPTR() returns WIDE * - set_DPTR(WIDE) * - get_SP() returns WIDE @@ -69,54 +61,12 @@ void write_mem(WIDE addr, BYTE data); -WIDE -get_PC(void); - -void -set_PC(WIDE data); - BYTE get_R(BYTE reg, _Bool bank); void set_R(BYTE reg, _Bool bank, BYTE data); -BYTE -get_A(void); - -void -set_A(BYTE data); - -BYTE -get_DPH(void); - -void -set_DPH(BYTE data); - -BYTE -get_DPL(void); - -void -set_DPL(BYTE data); - -BYTE -get_SPH(void); - -void -set_SPH(BYTE data); - -BYTE -get_SPL(void); - -void -set_SPL(BYTE data); - -BYTE -get_flags(void); - -void -set_flags(BYTE data); - WIDE get_DPTR(void);
--- a/emulator/test.c Sat Jan 11 12:44:39 2014 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,60 +0,0 @@ -/* test.c - * because we need to test things - */ -#include <stdio.h> - -void -dump_all(void) { - int i; - - /* dump reg bank 0 */ - for (i = 0 ; i < 3 ; i++) { - printf("%c", get_R(i, 0x0)); - } - /* dump reg bank 1 */ - for (i = 0 ; i < 3 ; i++) { - printf("%c", get_R(i, 0x1)); - } - /* dump other registers */ - printf("%c", get_A()); - printf("%C", get_flags()); - printf("%c", get_DPH()); - printf("%c", get_DPL()); - printf("%c", get_SPH()); - printf("%c", get_SPL()); - - /* dump main memory */ - for (i = 0 ; i < 0x10000 ; i++) { - printf("%c", read_mem(i)); - } -} - -void -test_pattern(void) { - int i; - /* fill mem with M's */ - for (i = 0 ; i < 0x10000 ; i++) { - write_mem(i, 0x4D); - } - /* fill reg bank 1 with R's */ - for (i = 0 ; i < 3 ; i++) { - set_R(i, 0, 0x52); - } - /* fill reg bank 2 with R's */ - for (i = 0 ; i < 3 ; i++) { - set_R(i, 1, 0x52); - } - /* A */ - set_A(0x41); - /* F */ - set_flags(0x46); - /* DP */ - set_DPTR(0x4450); - /* SP */ - set_SP(0x5350); - //set_DPH(0x44); - //set_DPL(0x50); - //set_SPH(0x53); - //set_SPL(0x50); -} -
--- a/tests/label_test.asm Sat Jan 11 12:44:39 2014 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,10 +0,0 @@ -; label test -label_1: MOV A, #0xFF ; 0: 0x15 0xFF -label_2: JNZ label_2 ; 2: 0xE1 0x02 -label_4: ; 4: -label_3: JC label_4 ; 4: 0xE2 0x04 -MOV A, @0xF00F ; 6: 0x1C 0xFO 0x0F -JNZ label_1 ; 9: 0xE1 0x00 -JNZ label_3 ; 0B: 0xE1 0x04 -CJNE R0, #0xFF, label_2 ; 0D: 0xD4 0xFF 0x02 -
--- a/tests/test.asm Sat Jan 11 12:44:39 2014 +0000 +++ b/tests/test.asm Wed Jan 29 20:11:07 2014 +0000 @@ -1,258 +1,7 @@ -; unit test asm -NOP -reserved -reserved -reserved -reserved -reserved -reserved -reserved SET C CLR C SET BS CLR BS SET IE CLR IE -CPL C -CPL A -XCSD -SFA -LAF -MOV DPTR, SP -MOV SP, DPTR -MOV A, #0xF0 -MOV SP, #0xF000 -MOV DPTR, #0xF000 -MOV A, 0x000F -MOV 0x000F, A -MOV A, @A+DPTR -MOV A, @A+PC -MOV A, @0x000F -MOV @0x000F, A -MOV A, @DPTR -MOV @DPTR, A -MOV @DPTR, R0 -MOV @DPTR, R1 -MOV @DPTR, R2 -MOV @DPTR, R3 -MOV @DPTR, DPH -MOV @DPTR, DPL -MOV @DPTR, SPH -MOV @DPTR, SPL -MOV R0, #0xF0 -MOV R1, #0xF0 -MOV R2, #0xF0 -MOV R3, #0xF0 -MOV DPH, #0xF0 -MOV DPL, #0xF0 -MOV SPH, #0xF0 -MOV SPL, #0xF0 -MOV R0, A -MOV R1, A -MOV R2, A -MOV R3, A -MOV DPH, A -MOV DPL, A -MOV SPH, A -MOV SPL, A -MOV A, R0 -MOV A, R1 -MOV A, R2 -MOV A, R3 -MOV A, DPH -MOV A, DPL -MOV A, SPH -MOV A, SPL -MOV R0, @DPTR -MOV R0, R1 -MOV R0, R2 -MOV R0, R3 -MOV R0, DPH -MOV R0, DPL -MOV R0, SPH -MOV R0, SPL -MOV R1, R0 -MOV R1, @DPTR -MOV R1, R2 -MOV R1, R3 -MOV R1, DPH -MOV R1, DPL -MOV R1, SPH -MOV R1, SPL -MOV R2, R0 -MOV R2, R1 -MOV R2, @DPTR -MOV R2, R3 -MOV R2, DPH -MOV R2, DPL -MOV R2, SPH -MOV R2, SPL -MOV R3, R0 -MOV R3, R1 -MOV R3, R2 -MOV R3, @DPTR -MOV R3, DPH -MOV R3, DPL -MOV R3, SPH -MOV R3, SPL -MOV DPH, R0 -MOV DPH, R1 -MOV DPH, R2 -MOV DPH, R3 -MOV DPH, @DPTR -MOV DPH, DPL -MOV DPH, SPH -MOV DPH, SPL -MOV DPL, R0 -MOV DPL, R1 -MOV DPL, R2 -MOV DPL, R3 -MOV DPL, DPH -MOV DPL, @DPTR -MOV DPL, SPH -MOV DPL, SPL -MOV SPH, R0 -MOV SPH, R1 -MOV SPH, R2 -MOV SPH, R3 -MOV SPH, DPH -MOV SPH, DPL -MOV SPH, @DPTR -MOV SPH, SPL -MOV SPL, R0 -MOV SPL, R1 -MOV SPL, R2 -MOV SPL, R3 -MOV SPL, DPH -MOV SPL, DPL -MOV SPL, SPH -MOV SPL, @DPTR -ANL A, R0 -ANL A, R1 -ANL A, R2 -ANL A, R3 -ANL A, DPH -ANL A, DPL -ANL A, #0xF0 -ANL A, @DPTR -ORL A, R0 -ORL A, R1 -ORL A, R2 -ORL A, R3 -ORL A, DPH -ORL A, DPL -ORL A, #0xF0 -ORL A, @DPTR -XRL A, R0 -XRL A, R1 -XRL A, R2 -XRL A, R3 -XRL A, DPH -XRL A, DPL -XRL A, #0xF0 -XRL A, @DPTR -RL A -RLC A -RR A -RRC A -INC DPTR -DEC DPTR -INC A -DEC A -ADD A, R0 -ADD A, R1 -ADD A, R2 -ADD A, R3 -ADD A, DPH -ADD A, DPL -ADD A, #0xF0 -ADD A, @DPTR -ADDC A, R0 -ADDC A, R1 -ADDC A, R2 -ADDC A, R3 -ADDC A, DPH -ADDC A, DPL -ADDC A, #0xF0 -ADDC A, @DPTR -SUB A, R0 -SUB A, R1 -SUB A, R2 -SUB A, R3 -SUB A, DPH -SUB A, DPL -SUB A, #0xF0 -SUB A, @DPTR -SUBB A, R0 -SUBB A, R1 -SUBB A, R2 -SUBB A, R3 -SUBB A, DPH -SUBB A, DPL -SUBB A, #0xF0 -SUBB A, @DPTR -PJMP addr11 -PJMP addr11 -PJMP addr11 -PJMP addr11 -PJMP addr11 -PJMP addr11 -PJMP addr11 -PJMP addr11 -PCALL addr11 -PCALL addr11 -PCALL addr11 -PCALL addr11 -PCALL addr11 -PCALL addr11 -PCALL addr11 -PCALL addr11 -DJNZ R0, 0x0F -DJNZ R1, 0x0F -DJNZ R2, 0x0F -DJNZ R3, 0x0F -CJNE R0, #0xF0, 0x0F -CJNE R1, #0xF0, 0x0F -CJNE R2, #0xF0, 0x0F -CJNE R3, #0xF0, 0x0F -LJMP 0x000F -LCALL 0x000F -RET -RETI -SJMP -JMP @A+DPTR -JMP @DPTR -CJNE A, #0xF0, 0x0F -JZ 0x0F -JNZ 0x0F -JC 0x0F -JNC 0x0F -JPO 0x0F -JPE 0x0F -JS 0x0F -JNS 0x0F -PUSH R0 -PUSH R1 -PUSH R2 -PUSH R3 -PUSH DPH -PUSH DPL -PUSH A -reserved ;PUSH FLAGS -POP R0 -POP R1 -POP R2 -POP R3 -POP DPH -POP DPL -POP A -reserved ;POP FLAGS -MUL R0, R1 -DIV R0, R1 -DA A -reserved -reserved ;IN A, port_addr -reserved ;OUT port_addr, A -reserved ;INT vect8 HLT -
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/tests/test.bin Wed Jan 29 20:11:07 2014 +0000 @@ -0,0 +1,2 @@ + + ÿ \ No newline at end of file
--- a/utils/gen_language.ipynb Sat Jan 11 12:44:39 2014 +0000 +++ b/utils/gen_language.ipynb Wed Jan 29 20:11:07 2014 +0000 @@ -15,25 +15,32 @@ "import sys\n", "sys.path.append('../assembler')\n", "from assembler import *\n", - "f = open('instruction_set.txt', 'r')\n", - "lang = first_pass(f)\n", + "f = open('iset.csv', 'r')\n", "\n", - "r = open('instruction_table.txt', 'r')\n", - "r = filter(lambda l: l != '\\n', r.readlines())\n", "codes = []\n", - "for line in r:\n", - " codes.append(line.split()[0])\n", - " " + "lang = []\n", + "for line in f:\n", + " line = line.split(';')\n", + " codes.append(int(line[0]))\n", + " statement = line[1].strip().lower().split()\n", + " mnemonic = statement[0]\n", + " arguments = ''.join(statement[1:]).split(',')\n", + " lang.append([mnemonic, arguments])\n", + " \n", + "#pprint(lang) \n" ], "language": "python", "metadata": {}, "outputs": [], - "prompt_number": 2 + "prompt_number": 1 }, { "cell_type": "code", "collapsed": false, "input": [ + "consts = { 'addr11':1, 'addr16':2, '@addr16':2, 'vect8':1, '#data8':1, 'port_addr':1, 'rel8':1, '#data16':2}\n", + "labelable = ('addr11', 'addr16', 'rel8')\n", + "\n", "mne_syms = []\n", "arg_syms = []\n", "for line in lang:\n", @@ -47,14 +54,151 @@ " i = 0\n", " valid_args = {}\n", " for line in lang:\n", + " args = []\n", " if line[0] == mne:\n", - " valid_args.update({tuple(line[1]):int(codes[i])})\n", + " width = 1\n", + " for a in line[1]:\n", + " if a in consts:\n", + " width = width + consts[a]\n", + " valid_args.update({tuple(line[1]):[int(codes[i]), width]})\n", + " \n", + " for a in line[1]:\n", + " found_label = 0\n", + " if a in labelable:\n", + " found_label = 1\n", + " args.append('label')\n", + " else:\n", + " args.append(a)\n", + " if found_label:\n", + " valid_args.update({tuple(args):[int(codes[i]), width]})\n", + " \n", " i = i + 1\n", " iset.update({mne:valid_args})\n", - "pprint(iset)\n" + "#pprint(iset, indent=5)\n" ], "language": "python", "metadata": {}, + "outputs": [], + "prompt_number": 2 + }, + { + "cell_type": "code", + "collapsed": false, + "input": [ + "# generate function lookup table\n", + "optable = []\n", + "for l in lang:\n", + " optable.append(l[0])\n", + "\n", + "for i in range(17):\n", + " print \"%s, %s, %s, %s, %s, %s, %s, %s, %s, %s, %s, %s, %s, %s, %s, \" % (optable[(i*15)], optable[(i*15)+1], optable[(i*15)+2], optable[(i*15)+3], optable[(i*15)+4], optable[(i*15)+5], optable[(i*15)+6], optable[(i*15)+7], optable[(i*15)+8], optable[(i*15)+9], optable[(i*15)+10], optable[(i*15)+11], optable[(i*15)+12], optable[(i*15)+13], optable[(i*15)+14])\n", + "\n" + ], + "language": "python", + "metadata": {}, + "outputs": [ + { + "output_type": "stream", + "stream": "stdout", + "text": [ + "nop, reserved, reserved, reserved, reserved\n", + "reserved, reserved, reserved, set, clr\n", + "set, clr, set, clr, cpl\n", + "cpl, xcsd, sfa, laf, mov\n", + "mov, mov, mov, mov, mov\n", + "mov, mov, mov, mov, mov\n", + "mov, mov, mov, mov, mov\n", + "mov, mov, mov, mov, mov\n", + "mov, mov, mov, mov, mov\n", + "mov, mov, mov, mov, mov\n", + "mov, mov, mov, mov, mov\n", + "mov, mov, mov, mov, mov\n", + "mov, mov, mov, mov, mov\n", + "mov, mov, mov, mov, mov\n", + "mov, mov, mov, mov, mov\n", + "mov, mov, mov, mov, mov\n", + "mov, mov, mov, mov, mov\n", + "mov, mov, mov, mov, mov\n", + "mov, mov, mov, mov, mov\n", + "mov, mov, mov, mov, mov\n", + "mov, mov, mov, mov, mov\n", + "mov, mov, mov, mov, mov\n", + "mov, mov, mov, mov, mov\n", + "mov, mov, mov, mov, mov\n", + "mov, mov, mov, mov, mov\n", + "mov, mov, mov, anl, anl\n", + "anl, anl, anl, anl, anl\n", + "anl, orl, orl, orl, orl\n", + "orl, orl, orl, orl, xrl\n", + "xrl, xrl, xrl, xrl, xrl\n", + "xrl, xrl, rl, rlc, rr\n", + "rrc, inc, dec, inc, dec\n", + "add, add, add, add, add\n", + "add, add, add, addc, addc\n", + "addc, addc, addc, addc, addc\n", + "addc, sub, sub, sub, sub\n", + "sub, sub, sub, sub, subb\n", + "subb, subb, subb, subb, subb\n", + "subb, subb, pjmp, pjmp, pjmp\n", + "pjmp, pjmp, pjmp, pjmp, pjmp\n", + "pcall, pcall, pcall, pcall, pcall\n", + "pcall, pcall, pcall, djnz, djnz\n", + "djnz, djnz, cjne, cjne, cjne\n", + "cjne, ljmp, lcall, ret, reti\n", + "sjmp, jmp, jmp, cjne, jz\n", + "jnz, jc, jnc, jpo, jpe\n", + "js, jns, push, push, push\n", + "push, push, push, push, push\n", + "pop, pop, pop, pop, pop\n", + "pop, pop, pop, mul, div\n", + "da, reserved, in, out, int\n" + ] + } + ], + "prompt_number": 3 + }, + { + "cell_type": "code", + "collapsed": false, + "input": [ + "# print function templates\n", + "#for mne in mne_set:\n", + "# print \"//implement me\\nvoid\\n%s(void) {\\n registers.PC = registers.PC + 1;\\n}\\n\" % mne.upper()\n", + "\n", + "# print function definitions\n", + "#for mne in mne_set:\n", + "# print \"void\\n%s(void);\\n\" % mne.upper()\n" + ], + "language": "python", + "metadata": {}, + "outputs": [], + "prompt_number": 2 + }, + { + "cell_type": "code", + "collapsed": false, + "input": [ + "float(255)/15\n" + ], + "language": "python", + "metadata": {}, + "outputs": [ + { + "output_type": "pyout", + "prompt_number": 13, + "text": [ + "17.0" + ] + } + ], + "prompt_number": 13 + }, + { + "cell_type": "code", + "collapsed": false, + "input": [], + "language": "python", + "metadata": {}, "outputs": [] } ],
--- a/utils/instruction_set.txt Sat Jan 11 12:44:39 2014 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,257 +0,0 @@ -NOP -reserved -reserved -reserved -reserved -reserved -reserved -reserved -SET C -CLR C -SET BS -CLR BS -SET IE -CLR IE -CPL C -CPL A -XCSD -SFA -LAF -MOV DPTR, SP -MOV SP, DPTR -MOV A, #data8 -MOV SP, #data16 -MOV DPTR, #data16 -MOV A, addr16 -MOV addr16, A -MOV A, @A+DPTR -MOV A, @A+PC -MOV A, @addr16 -MOV @addr16, A -MOV A, @DPTR -MOV @DPTR, A -MOV @DPTR, R0 -MOV @DPTR, R1 -MOV @DPTR, R2 -MOV @DPTR, R3 -MOV @DPTR, DPH -MOV @DPTR, DPL -MOV @DPTR, SPH -MOV @DPTR, SPL -MOV R0, #data8 -MOV R1, #data8 -MOV R2, #data8 -MOV R3, #data8 -MOV DPH, #data8 -MOV DPL, #data8 -MOV SPH, #data8 -MOV SPL, #data8 -MOV R0, A -MOV R1, A -MOV R2, A -MOV R3, A -MOV DPH, A -MOV DPL, A -MOV SPH, A -MOV SPL, A -MOV A, R0 -MOV A, R1 -MOV A, R2 -MOV A, R3 -MOV A, DPH -MOV A, DPL -MOV A, SPH -MOV A, SPL -MOV R0, @DPTR -MOV R0, R1 -MOV R0, R2 -MOV R0, R3 -MOV R0, DPH -MOV R0, DPL -MOV R0, SPH -MOV R0, SPL -MOV R1, R0 -MOV R1, @DPTR -MOV R1, R2 -MOV R1, R3 -MOV R1, DPH -MOV R1, DPL -MOV R1, SPH -MOV R1, SPL -MOV R2, R0 -MOV R2, R1 -MOV R2, @DPTR -MOV R2, R3 -MOV R2, DPH -MOV R2, DPL -MOV R2, SPH -MOV R2, SPL -MOV R3, R0 -MOV R3, R1 -MOV R3, R2 -MOV R3, @DPTR -MOV R3, DPH -MOV R3, DPL -MOV R3, SPH -MOV R3, SPL -MOV DPH, R0 -MOV DPH, R1 -MOV DPH, R2 -MOV DPH, R3 -MOV DPH, @DPTR -MOV DPH, DPL -MOV DPH, SPH -MOV DPH, SPL -MOV DPL, R0 -MOV DPL, R1 -MOV DPL, R2 -MOV DPL, R3 -MOV DPL, DPH -MOV DPL, @DPTR -MOV DPL, SPH -MOV DPL, SPL -MOV SPH, R0 -MOV SPH, R1 -MOV SPH, R2 -MOV SPH, R3 -MOV SPH, DPH -MOV SPH, DPL -MOV SPH, @DPTR -MOV SPH, SPL -MOV SPL, R0 -MOV SPL, R1 -MOV SPL, R2 -MOV SPL, R3 -MOV SPL, DPH -MOV SPL, DPL -MOV SPL, SPH -MOV SPL, @DPTR -ANL A, R0 -ANL A, R1 -ANL A, R2 -ANL A, R3 -ANL A, DPH -ANL A, DPL -ANL A, #data8 -ANL A, @DPTR -ORL A, R0 -ORL A, R1 -ORL A, R2 -ORL A, R3 -ORL A, DPH -ORL A, DPL -ORL A, #data8 -ORL A, @DPTR -XRL A, R0 -XRL A, R1 -XRL A, R2 -XRL A, R3 -XRL A, DPH -XRL A, DPL -XRL A, #data8 -XRL A, @DPTR -RL A -RLC A -RR A -RRC A -INC DPTR -DEC DPTR -INC A -DEC A -ADD A, R0 -ADD A, R1 -ADD A, R2 -ADD A, R3 -ADD A, DPH -ADD A, DPL -ADD A, #data8 -ADD A, @DPTR -ADDC A, R0 -ADDC A, R1 -ADDC A, R2 -ADDC A, R3 -ADDC A, DPH -ADDC A, DPL -ADDC A, #data8 -ADDC A, @DPTR -SUB A, R0 -SUB A, R1 -SUB A, R2 -SUB A, R3 -SUB A, DPH -SUB A, DPL -SUB A, #data8 -SUB A, @DPTR -SUBB A, R0 -SUBB A, R1 -SUBB A, R2 -SUBB A, R3 -SUBB A, DPH -SUBB A, DPL -SUBB A, #data8 -SUBB A, @DPTR -PJMP addr11 -PJMP addr11 -PJMP addr11 -PJMP addr11 -PJMP addr11 -PJMP addr11 -PJMP addr11 -PJMP addr11 -PCALL addr11 -PCALL addr11 -PCALL addr11 -PCALL addr11 -PCALL addr11 -PCALL addr11 -PCALL addr11 -PCALL addr11 -DJNZ R0, rel8 -DJNZ R1, rel8 -DJNZ R2, rel8 -DJNZ R3, rel8 -CJNE R0, #data8, rel8 -CJNE R1, #data8, rel8 -CJNE R2, #data8, rel8 -CJNE R3, #data8, rel8 -LJMP addr16 -LCALL addr16 -RET -RETI -SJMP -JMP @A+DPTR -JMP @DPTR -CJNE A, #data8, rel8 -JZ rel8 -JNZ rel8 -JC rel8 -JNC rel8 -JPO rel8 -JPE rel8 -JS rel8 -JNS rel8 -PUSH R0 -PUSH R1 -PUSH R2 -PUSH R3 -PUSH DPH -PUSH DPL -PUSH A -PUSH FLAGS -POP R0 -POP R1 -POP R2 -POP R3 -POP DPH -POP DPL -POP A -POP FLAGS -MUL R0, R1 -DIV R0, R1 -DA A -reserved -IN A, port_addr -OUT port_addr, A -INT vect8 -HLT -
--- a/utils/instruction_table.txt Sat Jan 11 12:44:39 2014 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,257 +0,0 @@ -0 NOP -1 reserved -2 reserved -3 reserved -4 reserved -5 reserved -6 reserved -7 reserved -8 SET C -9 CLR C -10 SET BS -11 CLR BS -12 SET IE -13 CLR IE -14 CPL C -15 CPL A -16 XCSD -17 SFA -18 LAF -19 MOV DPTR, SP -20 MOV SP, DPTR -21 MOV A, #data8 -22 MOV SP, #data16 -23 MOV DPTR, #data16 -24 MOV A, addr16 -25 MOV addr16, A -26 MOV A, @A+DPTR -27 MOV A, @A+PC -28 MOV A, @addr16 -29 MOV @addr16, A -30 MOV A, @DPTR -31 MOV @DPTR, A -32 MOV @DPTR, R0 -33 MOV @DPTR, R1 -34 MOV @DPTR, R2 -35 MOV @DPTR, R3 -36 MOV @DPTR, DPH -37 MOV @DPTR, DPL -38 MOV @DPTR, SPH -39 MOV @DPTR, SPL -40 MOV R0, #data8 -41 MOV R1, #data8 -42 MOV R2, #data8 -43 MOV R3, #data8 -44 MOV DPH, #data8 -45 MOV DPL, #data8 -46 MOV SPH, #data8 -47 MOV SPL, #data8 -48 MOV R0, A -49 MOV R1, A -50 MOV R2, A -51 MOV R3, A -52 MOV DPH, A -53 MOV DPL, A -54 MOV SPH, A -55 MOV SPL, A -56 MOV A, R0 -57 MOV A, R1 -58 MOV A, R2 -59 MOV A, R3 -60 MOV A, DPH -61 MOV A, DPL -62 MOV A, SPH -63 MOV A, SPL -64 MOV R0, @DPTR -65 MOV R0, R1 -66 MOV R0, R2 -67 MOV R0, R3 -68 MOV R0, DPH -69 MOV R0, DPL -70 MOV R0, SPH -71 MOV R0, SPL -72 MOV R1, R0 -73 MOV R1, @DPTR -74 MOV R1, R2 -75 MOV R1, R3 -76 MOV R1, DPH -77 MOV R1, DPL -78 MOV R1, SPH -79 MOV R1, SPL -80 MOV R2, R0 -81 MOV R2, R1 -82 MOV R2, @DPTR -83 MOV R2, R3 -84 MOV R2, DPH -85 MOV R2, DPL -86 MOV R2, SPH -87 MOV R2, SPL -88 MOV R3, R0 -89 MOV R3, R1 -90 MOV R3, R2 -91 MOV R3, @DPTR -92 MOV R3, DPH -93 MOV R3, DPL -94 MOV R3, SPH -95 MOV R3, SPL -96 MOV DPH, R0 -97 MOV DPH, R1 -98 MOV DPH, R2 -99 MOV DPH, R3 -100 MOV DPH, @DPTR -101 MOV DPH, DPL -102 MOV DPH, SPH -103 MOV DPH, SPL -104 MOV DPL, R0 -105 MOV DPL, R1 -106 MOV DPL, R2 -107 MOV DPL, R3 -108 MOV DPL, DPH -109 MOV DPL, @DPTR -110 MOV DPL, SPH -111 MOV DPL, SPL -112 MOV SPH, R0 -113 MOV SPH, R1 -114 MOV SPH, R2 -115 MOV SPH, R3 -116 MOV SPH, DPH -117 MOV SPH, DPL -118 MOV SPH, @DPTR -119 MOV SPH, SPL -120 MOV SPL, R0 -121 MOV SPL, R1 -122 MOV SPL, R2 -123 MOV SPL, R3 -124 MOV SPL, DPH -125 MOV SPL, DPL -126 MOV SPL, SPH -127 MOV SPL, @DPTR -128 ANL A, R0 -129 ANL A, R1 -130 ANL A, R2 -131 ANL A, R3 -132 ANL A, DPH -133 ANL A, DPL -134 ANL A, #data8 -135 ANL A, @DPTR -136 ORL A, R0 -137 ORL A, R1 -138 ORL A, R2 -139 ORL A, R3 -140 ORL A, DPH -141 ORL A, DPL -142 ORL A, #data8 -143 ORL A, @DPTR -144 XRL A, R0 -145 XRL A, R1 -146 XRL A, R2 -147 XRL A, R3 -148 XRL A, DPH -149 XRL A, DPL -150 XRL A, #data8 -151 XRL A, @DPTR -152 RL A -153 RLC A -154 RR A -155 RRC A -156 INC DPTR -157 DEC DPTR -158 INC A -159 DEC A -160 ADD A, R0 -161 ADD A, R1 -162 ADD A, R2 -163 ADD A, R3 -164 ADD A, DPH -165 ADD A, DPL -166 ADD A, #data8 -167 ADD A, @DPTR -168 ADDC A, R0 -169 ADDC A, R1 -170 ADDC A, R2 -171 ADDC A, R3 -172 ADDC A, DPH -173 ADDC A, DPL -174 ADDC A, #data8 -175 ADDC A, @DPTR -176 SUB A, R0 -177 SUB A, R1 -178 SUB A, R2 -179 SUB A, R3 -180 SUB A, DPH -181 SUB A, DPL -182 SUB A, #data8 -183 SUB A, @DPTR -184 SUBB A, R0 -185 SUBB A, R1 -186 SUBB A, R2 -187 SUBB A, R3 -188 SUBB A, DPH -189 SUBB A, DPL -190 SUBB A, #data8 -191 SUBB A, @DPTR -192 PJMP addr11 -193 PJMP addr11 -194 PJMP addr11 -195 PJMP addr11 -196 PJMP addr11 -197 PJMP addr11 -198 PJMP addr11 -199 PJMP addr11 -200 PCALL addr11 -201 PCALL addr11 -202 PCALL addr11 -203 PCALL addr11 -204 PCALL addr11 -205 PCALL addr11 -206 PCALL addr11 -207 PCALL addr11 -208 DJNZ R0, rel8 -209 DJNZ R1, rel8 -210 DJNZ R2, rel8 -211 DJNZ R3, rel8 -212 CJNE R0, #data, rel8 -213 CJNE R1, #data, rel8 -214 CJNE R2, #data, rel8 -215 CJNE R3, #data, rel8 -216 LJMP addr16 -217 LCALL addr16 -218 RET -219 RETI -220 SJMP -221 JMP @A+DPTR -222 JMP @DPTR -223 CJNE A, #data8, rel8 -224 JZ rel8 -225 JNZ rel8 -226 JC rel8 -227 JNC rel8 -228 JPO rel8 -229 JPE rel8 -230 JS rel8 -231 JNS rel8 -232 PUSH R0 -233 PUSH R1 -234 PUSH R2 -235 PUSH R3 -236 PUSH DPH -237 PUSH DPL -238 PUSH A -239 PUSH FLAGS -240 POP R0 -241 POP R1 -242 POP R2 -243 POP R3 -244 POP DPH -245 POP DPL -246 POP A -247 POP FLAGS -248 MUL R0, R1 -249 DIV R0, R1 -250 DA A -251 reserved -252 IN A, port_addr -253 OUT port_addr, A -254 INT vect8 -255 HLT -
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/utils/iset.csv Wed Jan 29 20:11:07 2014 +0000 @@ -0,0 +1,256 @@ +0;NOP +1;reserved +2;reserved +3;reserved +4;reserved +5;reserved +6;reserved +7;reserved +8;SET C +9;CLR C +10;SET BS +11;CLR BS +12;SET IE +13;CLR IE +14;CPL C +15;CPL A +16;XCSD +17;SFA +18;LAF +19;MOV DPTR, SP +20;MOV SP, DPTR +21;MOV A, #data8 +22;MOV SP, #data16 +23;MOV DPTR, #data16 +24;MOV A, addr16 +25;MOV addr16, A +26;MOV A, @A+DPTR +27;MOV A, @A+PC +28;MOV A, @addr16 +29;MOV @addr16, A +30;MOV A, @DPTR +31;MOV @DPTR, A +32;MOV @DPTR, R0 +33;MOV @DPTR, R1 +34;MOV @DPTR, R2 +35;MOV @DPTR, R3 +36;MOV @DPTR, DPH +37;MOV @DPTR, DPL +38;MOV @DPTR, SPH +39;MOV @DPTR, SPL +40;MOV R0, #data8 +41;MOV R1, #data8 +42;MOV R2, #data8 +43;MOV R3, #data8 +44;MOV DPH, #data8 +45;MOV DPL, #data8 +46;MOV SPH, #data8 +47;MOV SPL, #data8 +48;MOV R0, A +49;MOV R1, A +50;MOV R2, A +51;MOV R3, A +52;MOV DPH, A +53;MOV DPL, A +54;MOV SPH, A +55;MOV SPL, A +56;MOV A, R0 +57;MOV A, R1 +58;MOV A, R2 +59;MOV A, R3 +60;MOV A, DPH +61;MOV A, DPL +62;MOV A, SPH +63;MOV A, SPL +64;MOV R0, @DPTR +65;MOV R0, R1 +66;MOV R0, R2 +67;MOV R0, R3 +68;MOV R0, DPH +69;MOV R0, DPL +70;MOV R0, SPH +71;MOV R0, SPL +72;MOV R1, R0 +73;MOV R1, @DPTR +74;MOV R1, R2 +75;MOV R1, R3 +76;MOV R1, DPH +77;MOV R1, DPL +78;MOV R1, SPH +79;MOV R1, SPL +80;MOV R2, R0 +81;MOV R2, R1 +82;MOV R2, @DPTR +83;MOV R2, R3 +84;MOV R2, DPH +85;MOV R2, DPL +86;MOV R2, SPH +87;MOV R2, SPL +88;MOV R3, R0 +89;MOV R3, R1 +90;MOV R3, R2 +91;MOV R3, @DPTR +92;MOV R3, DPH +93;MOV R3, DPL +94;MOV R3, SPH +95;MOV R3, SPL +96;MOV DPH, R0 +97;MOV DPH, R1 +98;MOV DPH, R2 +99;MOV DPH, R3 +100;MOV DPH, @DPTR +101;MOV DPH, DPL +102;MOV DPH, SPH +103;MOV DPH, SPL +104;MOV DPL, R0 +105;MOV DPL, R1 +106;MOV DPL, R2 +107;MOV DPL, R3 +108;MOV DPL, DPH +109;MOV DPL, @DPTR +110;MOV DPL, SPH +111;MOV DPL, SPL +112;MOV SPH, R0 +113;MOV SPH, R1 +114;MOV SPH, R2 +115;MOV SPH, R3 +116;MOV SPH, DPH +117;MOV SPH, DPL +118;MOV SPH, @DPTR +119;MOV SPH, SPL +120;MOV SPL, R0 +121;MOV SPL, R1 +122;MOV SPL, R2 +123;MOV SPL, R3 +124;MOV SPL, DPH +125;MOV SPL, DPL +126;MOV SPL, SPH +127;MOV SPL, @DPTR +128;ANL A, R0 +129;ANL A, R1 +130;ANL A, R2 +131;ANL A, R3 +132;ANL A, DPH +133;ANL A, DPL +134;ANL A, #data8 +135;ANL A, @DPTR +136;ORL A, R0 +137;ORL A, R1 +138;ORL A, R2 +139;ORL A, R3 +140;ORL A, DPH +141;ORL A, DPL +142;ORL A, #data8 +143;ORL A, @DPTR +144;XRL A, R0 +145;XRL A, R1 +146;XRL A, R2 +147;XRL A, R3 +148;XRL A, DPH +149;XRL A, DPL +150;XRL A, #data8 +151;XRL A, @DPTR +152;RL A +153;RLC A +154;RR A +155;RRC A +156;INC DPTR +157;DEC DPTR +158;INC A +159;DEC A +160;ADD A, R0 +161;ADD A, R1 +162;ADD A, R2 +163;ADD A, R3 +164;ADD A, DPH +165;ADD A, DPL +166;ADD A, #data8 +167;ADD A, @DPTR +168;ADDC A, R0 +169;ADDC A, R1 +170;ADDC A, R2 +171;ADDC A, R3 +172;ADDC A, DPH +173;ADDC A, DPL +174;ADDC A, #data8 +175;ADDC A, @DPTR +176;SUB A, R0 +177;SUB A, R1 +178;SUB A, R2 +179;SUB A, R3 +180;SUB A, DPH +181;SUB A, DPL +182;SUB A, #data8 +183;SUB A, @DPTR +184;SUBB A, R0 +185;SUBB A, R1 +186;SUBB A, R2 +187;SUBB A, R3 +188;SUBB A, DPH +189;SUBB A, DPL +190;SUBB A, #data8 +191;SUBB A, @DPTR +192;PJMP addr11 +193;PJMP addr11 +194;PJMP addr11 +195;PJMP addr11 +196;PJMP addr11 +197;PJMP addr11 +198;PJMP addr11 +199;PJMP addr11 +200;PCALL addr11 +201;PCALL addr11 +202;PCALL addr11 +203;PCALL addr11 +204;PCALL addr11 +205;PCALL addr11 +206;PCALL addr11 +207;PCALL addr11 +208;DJNZ R0, rel8 +209;DJNZ R1, rel8 +210;DJNZ R2, rel8 +211;DJNZ R3, rel8 +212;CJNE R0, #data, rel8 +213;CJNE R1, #data, rel8 +214;CJNE R2, #data, rel8 +215;CJNE R3, #data, rel8 +216;LJMP addr16 +217;LCALL addr16 +218;RET +219;RETI +220;SJMP rel8 +221;JMP @A+DPTR +222;JMP @DPTR +223;CJNE A, #data8, rel8 +224;JZ rel8 +225;JNZ rel8 +226;JC rel8 +227;JNC rel8 +228;JPO rel8 +229;JPE rel8 +230;JS rel8 +231;JNS rel8 +232;PUSH R0 +233;PUSH R1 +234;PUSH R2 +235;PUSH R3 +236;PUSH DPH +237;PUSH DPL +238;PUSH A +239;PUSH FLAGS +240;POP R0 +241;POP R1 +242;POP R2 +243;POP R3 +244;POP DPH +245;POP DPL +246;POP A +247;POP FLAGS +248;MUL R0, R1 +249;DIV R0, R1 +250;DA A +251;reserved +252;IN A, port_addr +253;OUT port_addr, A +254;INT vect8 +255;HLT
--- a/utils/iset.txt Sat Jan 11 12:44:39 2014 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,257 +0,0 @@ -0 00 00000000 NOP -1 01 00000001 reserved -2 02 00000010 reserved -3 03 00000011 reserved -4 04 00000100 reserved -5 05 00000101 reserved -6 06 00000110 reserved -7 07 00000111 reserved -8 08 00001000 SET C -9 09 00001001 CLR C -10 0A 00001010 SET BS -11 0B 00001011 CLR BS -12 0C 00001100 SET IE -13 0D 00001101 CLR IE -14 0E 00001110 CPL C -15 0F 00001111 CPL A -16 10 00010000 XCSD -17 11 00010001 SFA -18 12 00010010 LAF -19 13 00010011 MOV DPTR, SP -20 14 00010100 MOV SP, DPTR -21 15 00010101 MOV A, #data8 -22 16 00010110 MOV SP, #data16 -23 17 00010111 MOV DPTR, #data16 -24 18 00011000 MOV A, addr16 -25 19 00011001 MOV addr16, A -26 1A 00011010 MOV A, @A+DPTR -27 1B 00011011 MOV A, @A+PC -28 1C 00011100 MOV A, @addr16 -29 1D 00011101 MOV @addr16, A -30 1E 00011110 MOV A, @DPTR -31 1F 00011111 MOV @DPTR, A -32 20 00100000 MOV @DPTR, R0 -33 21 00100001 MOV @DPTR, R1 -34 22 00100010 MOV @DPTR, R2 -35 23 00100011 MOV @DPTR, R3 -36 24 00100100 MOV @DPTR, DPH -37 25 00100101 MOV @DPTR, DPL -38 26 00100110 MOV @DPTR, SPH -39 27 00100111 MOV @DPTR, SPL -40 28 00101000 MOV R0, #data8 -41 29 00101001 MOV R1, #data8 -42 2A 00101010 MOV R2, #data8 -43 2B 00101011 MOV R3, #data8 -44 2C 00101100 MOV DPH, #data8 -45 2D 00101101 MOV DPL, #data8 -46 2E 00101110 MOV SPH, #data8 -47 2F 00101111 MOV SPL, #data8 -48 30 00110000 MOV R0, A -49 31 00110001 MOV R1, A -50 32 00110010 MOV R2, A -51 33 00110011 MOV R3, A -52 34 00110100 MOV DPH, A -53 35 00110101 MOV DPL, A -54 36 00110110 MOV SPH, A -55 37 00110111 MOV SPL, A -56 38 00111000 MOV A, R0 -57 39 00111001 MOV A, R1 -58 3A 00111010 MOV A, R2 -59 3B 00111011 MOV A, R3 -60 3C 00111100 MOV A, DPH -61 3D 00111101 MOV A, DPL -62 3E 00111110 MOV A, SPH -63 3F 00111111 MOV A, SPL -64 40 01000000 MOV R0, @DPTR -65 41 01000001 MOV R0, R1 -66 42 01000010 MOV R0, R2 -67 43 01000011 MOV R0, R3 -68 44 01000100 MOV R0, DPH -69 45 01000101 MOV R0, DPL -70 46 01000110 MOV R0, SPH -71 47 01000111 MOV R0, SPL -72 48 01001000 MOV R1, R0 -73 49 01001001 MOV R1, @DPTR -74 4A 01001010 MOV R1, R2 -75 4B 01001011 MOV R1, R3 -76 4C 01001100 MOV R1, DPH -77 4D 01001101 MOV R1, DPL -78 4E 01001110 MOV R1, SPH -79 4F 01001111 MOV R1, SPL -80 50 01010000 MOV R2, R0 -81 51 01010001 MOV R2, R1 -82 52 01010010 MOV R2, @DPTR -83 53 01010011 MOV R2, R3 -84 54 01010100 MOV R2, DPH -85 55 01010101 MOV R2, DPL -86 56 01010110 MOV R2, SPH -87 57 01010111 MOV R2, SPL -88 58 01011000 MOV R3, R0 -89 59 01011001 MOV R3, R1 -90 5A 01011010 MOV R3, R2 -91 5B 01011011 MOV R3, @DPTR -92 5C 01011100 MOV R3, DPH -93 5D 01011101 MOV R3, DPL -94 5E 01011110 MOV R3, SPH -95 5F 01011111 MOV R3, SPL -96 60 01100000 MOV DPH, R0 -97 61 01100001 MOV DPH, R1 -98 62 01100010 MOV DPH, R2 -99 63 01100011 MOV DPH, R3 -100 64 01100100 MOV DPH, @DPTR -101 65 01100101 MOV DPH, DPL -102 66 01100110 MOV DPH, SPH -103 67 01100111 MOV DPH, SPL -104 68 01101000 MOV DPL, R0 -105 69 01101001 MOV DPL, R1 -106 6A 01101010 MOV DPL, R2 -107 6B 01101011 MOV DPL, R3 -108 6C 01101100 MOV DPL, DPH -109 6D 01101101 MOV DPL, @DPTR -110 6E 01101110 MOV DPL, SPH -111 6F 01101111 MOV DPL, SPL -112 70 01110000 MOV SPH, R0 -113 71 01110001 MOV SPH, R1 -114 72 01110010 MOV SPH, R2 -115 73 01110011 MOV SPH, R3 -116 74 01110100 MOV SPH, DPH -117 75 01110101 MOV SPH, DPL -118 76 01110110 MOV SPH, @DPTR -119 77 01110111 MOV SPH, SPL -120 78 01111000 MOV SPL, R0 -121 79 01111001 MOV SPL, R1 -122 7A 01111010 MOV SPL, R2 -123 7B 01111011 MOV SPL, R3 -124 7C 01111100 MOV SPL, DPH -125 7D 01111101 MOV SPL, DPL -126 7E 01111110 MOV SPL, SPH -127 7F 01111111 MOV SPL, @DPTR -128 80 10000000 ANL A, R0 -129 81 10000001 ANL A, R1 -130 82 10000010 ANL A, R2 -131 83 10000011 ANL A, R3 -132 84 10000100 ANL A, DPH -133 85 10000101 ANL A, DPL -134 86 10000110 ANL A, #data8 -135 87 10000111 ANL A, @DPTR -136 88 10001000 ORL A, R0 -137 89 10001001 ORL A, R1 -138 8A 10001010 ORL A, R2 -139 8B 10001011 ORL A, R3 -140 8C 10001100 ORL A, DPH -141 8D 10001101 ORL A, DPL -142 8E 10001110 ORL A, #data8 -143 8F 10001111 ORL A, @DPTR -144 90 10010000 XRL A, R0 -145 91 10010001 XRL A, R1 -146 92 10010010 XRL A, R2 -147 93 10010011 XRL A, R3 -148 94 10010100 XRL A, DPH -149 95 10010101 XRL A, DPL -150 96 10010110 XRL A, #data8 -151 97 10010111 XRL A, @DPTR -152 98 10011000 RL A -153 99 10011001 RLC A -154 9A 10011010 RR A -155 9B 10011011 RRC A -156 9C 10011100 INC DPTR -157 9D 10011101 DEC DPTR -158 9E 10011110 INC A -159 9F 10011111 DEC A -160 A0 10100000 ADD A, R0 -161 A1 10100001 ADD A, R1 -162 A2 10100010 ADD A, R2 -163 A3 10100011 ADD A, R3 -164 A4 10100100 ADD A, DPH -165 A5 10100101 ADD A, DPL -166 A6 10100110 ADD A, #data8 -167 A7 10100111 ADD A, @DPTR -168 A8 10101000 ADDC A, R0 -169 A9 10101001 ADDC A, R1 -170 AA 10101010 ADDC A, R2 -171 AB 10101011 ADDC A, R3 -172 AC 10101100 ADDC A, DPH -173 AD 10101101 ADDC A, DPL -174 AE 10101110 ADDC A, #data8 -175 AF 10101111 ADDC A, @DPTR -176 B0 10110000 SUB A, R0 -177 B1 10110001 SUB A, R1 -178 B2 10110010 SUB A, R2 -179 B3 10110011 SUB A, R3 -180 B4 10110100 SUB A, DPH -181 B5 10110101 SUB A, DPL -182 B6 10110110 SUB A, #data8 -183 B7 10110111 SUB A, @DPTR -184 B8 10111000 SUBB A, R0 -185 B9 10111001 SUBB A, R1 -186 BA 10111010 SUBB A, R2 -187 BB 10111011 SUBB A, R3 -188 BC 10111100 SUBB A, DPH -189 BD 10111101 SUBB A, DPL -190 BE 10111110 SUBB A, #data8 -191 BF 10111111 SUBB A, @DPTR -192 C0 11000000 PJMP addr11 -193 C1 11000001 PJMP addr11 -194 C2 11000010 PJMP addr11 -195 C3 11000011 PJMP addr11 -196 C4 11000100 PJMP addr11 -197 C5 11000101 PJMP addr11 -198 C6 11000110 PJMP addr11 -199 C7 11000111 PJMP addr11 -200 C8 11001000 PCALL addr11 -201 C9 11001001 PCALL addr11 -202 CA 11001010 PCALL addr11 -203 CB 11001011 PCALL addr11 -204 CC 11001100 PCALL addr11 -205 CD 11001101 PCALL addr11 -206 CE 11001110 PCALL addr11 -207 CF 11001111 PCALL addr11 -208 D0 11010000 DJNZ R0, rel8 -209 D1 11010001 DJNZ R1, rel8 -210 D2 11010010 DJNZ R2, rel8 -211 D3 11010011 DJNZ R3, rel8 -212 D4 11010100 CJNE R0, #data, rel8 -213 D5 11010101 CJNE R1, #data, rel8 -214 D6 11010110 CJNE R2, #data, rel8 -215 D7 11010111 CJNE R3, #data, rel8 -216 D8 11011000 LJMP addr16 -217 D9 11011001 LCALL addr16 -218 DA 11011010 RET -219 DB 11011011 RETI -220 DC 11011100 SJMP -221 DD 11011101 JMP @A+DPTR -222 DE 11011110 JMP @DPTR -223 DF 11011111 CJNE A, #data8, rel8 -224 E0 11100000 JZ rel8 -225 E1 11100001 JNZ rel8 -226 E2 11100010 JC rel8 -227 E3 11100011 JNC rel8 -228 E4 11100100 JPO rel8 -229 E5 11100101 JPE rel8 -230 E6 11100110 JS rel8 -231 E7 11100111 JNS rel8 -232 E8 11101000 PUSH R0 -233 E9 11101001 PUSH R1 -234 EA 11101010 PUSH R2 -235 EB 11101011 PUSH R3 -236 EC 11101100 PUSH DPH -237 ED 11101101 PUSH DPL -238 EE 11101110 PUSH A -239 EF 11101111 PUSH FLAGS -240 F0 11110000 POP R0 -241 F1 11110001 POP R1 -242 F2 11110010 POP R2 -243 F3 11110011 POP R3 -244 F4 11110100 POP DPH -245 F5 11110101 POP DPL -246 F6 11110110 POP A -247 F7 11110111 POP FLAGS -248 F8 11111000 MUL R0, R1 -249 F9 11111001 DIV R0, R1 -250 FA 11111010 DA A -251 FB 11111011 reserved -252 FC 11111100 IN A, port_addr -253 FD 11111101 OUT port_addr, A -254 FE 11111110 INT vect8 -255 FF 11111111 HLT -