Mercurial > hg > ede
changeset 33:02241452f397
8052 port code added to repo
| author | james <jb302@eecs.qmul.ac.uk> |
|---|---|
| date | Tue, 15 Apr 2014 15:49:16 +0100 |
| parents | b4a4ae2f127e |
| children | 4411dee34085 |
| files | emu_MCS-51/STARTUP.A51 emu_MCS-51/STARTUP.LST emu_MCS-51/STARTUP.OBJ emu_MCS-51/emu emu_MCS-51/emu.M51 emu_MCS-51/emu.hex emu_MCS-51/emu.lnp emu_MCS-51/emu.plg emu_MCS-51/emu.uvopt emu_MCS-51/emu.uvproj emu_MCS-51/emu_uvopt.bak emu_MCS-51/emu_uvproj.bak emu_MCS-51/iset.c emu_MCS-51/iset.h emu_MCS-51/iset.lst emu_MCS-51/iset.obj emu_MCS-51/main.c emu_MCS-51/main.lst emu_MCS-51/main.obj emu_MCS-51/mem.c emu_MCS-51/mem.h emu_MCS-51/mem.lst emu_MCS-51/mem.obj |
| diffstat | 23 files changed, 9584 insertions(+), 0 deletions(-) [+] |
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--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/emu_MCS-51/STARTUP.A51 Tue Apr 15 15:49:16 2014 +0100 @@ -0,0 +1,198 @@ +$NOMOD51 +;------------------------------------------------------------------------------ +; This file is part of the C51 Compiler package +; Copyright (c) 1988-2005 Keil Elektronik GmbH and Keil Software, Inc. +; Version 8.01 +; +; *** <<< Use Configuration Wizard in Context Menu >>> *** +;------------------------------------------------------------------------------ +; STARTUP.A51: This code is executed after processor reset. +; +; To translate this file use A51 with the following invocation: +; +; A51 STARTUP.A51 +; +; To link the modified STARTUP.OBJ file to your application use the following +; Lx51 invocation: +; +; Lx51 your object file list, STARTUP.OBJ controls +; +;------------------------------------------------------------------------------ +; +; User-defined <h> Power-On Initialization of Memory +; +; With the following EQU statements the initialization of memory +; at processor reset can be defined: +; +; <o> IDATALEN: IDATA memory size <0x0-0x100> +; <i> Note: The absolute start-address of IDATA memory is always 0 +; <i> The IDATA space overlaps physically the DATA and BIT areas. +IDATALEN EQU 80H +; +; <o> XDATASTART: XDATA memory start address <0x0-0xFFFF> +; <i> The absolute start address of XDATA memory +XDATASTART EQU 0 +; +; <o> XDATALEN: XDATA memory size <0x0-0xFFFF> +; <i> The length of XDATA memory in bytes. +XDATALEN EQU 0 +; +; <o> PDATASTART: PDATA memory start address <0x0-0xFFFF> +; <i> The absolute start address of PDATA memory +PDATASTART EQU 0H +; +; <o> PDATALEN: PDATA memory size <0x0-0xFF> +; <i> The length of PDATA memory in bytes. +PDATALEN EQU 0H +; +;</h> +;------------------------------------------------------------------------------ +; +;<h> Reentrant Stack Initialization +; +; The following EQU statements define the stack pointer for reentrant +; functions and initialized it: +; +; <h> Stack Space for reentrant functions in the SMALL model. +; <q> IBPSTACK: Enable SMALL model reentrant stack +; <i> Stack space for reentrant functions in the SMALL model. +IBPSTACK EQU 0 ; set to 1 if small reentrant is used. +; <o> IBPSTACKTOP: End address of SMALL model stack <0x0-0xFF> +; <i> Set the top of the stack to the highest location. +IBPSTACKTOP EQU 0xFF +1 ; default 0FFH+1 +; </h> +; +; <h> Stack Space for reentrant functions in the LARGE model. +; <q> XBPSTACK: Enable LARGE model reentrant stack +; <i> Stack space for reentrant functions in the LARGE model. +XBPSTACK EQU 0 ; set to 1 if large reentrant is used. +; <o> XBPSTACKTOP: End address of LARGE model stack <0x0-0xFFFF> +; <i> Set the top of the stack to the highest location. +XBPSTACKTOP EQU 0xFFFF +1 ; default 0FFFFH+1 +; </h> +; +; <h> Stack Space for reentrant functions in the COMPACT model. +; <q> PBPSTACK: Enable COMPACT model reentrant stack +; <i> Stack space for reentrant functions in the COMPACT model. +PBPSTACK EQU 0 ; set to 1 if compact reentrant is used. +; +; <o> PBPSTACKTOP: End address of COMPACT model stack <0x0-0xFFFF> +; <i> Set the top of the stack to the highest location. +PBPSTACKTOP EQU 0xFF +1 ; default 0FFH+1 +; </h> +;</h> +;------------------------------------------------------------------------------ +; +; Memory Page for Using the Compact Model with 64 KByte xdata RAM +; <e>Compact Model Page Definition +; +; <i>Define the XDATA page used for PDATA variables. +; <i>PPAGE must conform with the PPAGE set in the linker invocation. +; +; Enable pdata memory page initalization +PPAGEENABLE EQU 0 ; set to 1 if pdata object are used. +; +; <o> PPAGE number <0x0-0xFF> +; <i> uppermost 256-byte address of the page used for PDATA variables. +PPAGE EQU 0 +; +; <o> SFR address which supplies uppermost address byte <0x0-0xFF> +; <i> most 8051 variants use P2 as uppermost address byte +PPAGE_SFR DATA 0A0H +; +; </e> +;------------------------------------------------------------------------------ + +; Standard SFR Symbols +ACC DATA 0E0H +B DATA 0F0H +SP DATA 81H +DPL DATA 82H +DPH DATA 83H + + NAME ?C_STARTUP + + +?C_C51STARTUP SEGMENT CODE +?STACK SEGMENT IDATA + + RSEG ?STACK + DS 1 + + EXTRN CODE (?C_START) + PUBLIC ?C_STARTUP + + CSEG AT 0 +?C_STARTUP: LJMP STARTUP1 + + RSEG ?C_C51STARTUP + +STARTUP1: + +IF IDATALEN <> 0 + MOV R0,#IDATALEN - 1 + CLR A +IDATALOOP: MOV @R0,A + DJNZ R0,IDATALOOP +ENDIF + +IF XDATALEN <> 0 + MOV DPTR,#XDATASTART + MOV R7,#LOW (XDATALEN) + IF (LOW (XDATALEN)) <> 0 + MOV R6,#(HIGH (XDATALEN)) +1 + ELSE + MOV R6,#HIGH (XDATALEN) + ENDIF + CLR A +XDATALOOP: MOVX @DPTR,A + INC DPTR + DJNZ R7,XDATALOOP + DJNZ R6,XDATALOOP +ENDIF + +IF PPAGEENABLE <> 0 + MOV PPAGE_SFR,#PPAGE +ENDIF + +IF PDATALEN <> 0 + MOV R0,#LOW (PDATASTART) + MOV R7,#LOW (PDATALEN) + CLR A +PDATALOOP: MOVX @R0,A + INC R0 + DJNZ R7,PDATALOOP +ENDIF + +IF IBPSTACK <> 0 +EXTRN DATA (?C_IBP) + + MOV ?C_IBP,#LOW IBPSTACKTOP +ENDIF + +IF XBPSTACK <> 0 +EXTRN DATA (?C_XBP) + + MOV ?C_XBP,#HIGH XBPSTACKTOP + MOV ?C_XBP+1,#LOW XBPSTACKTOP +ENDIF + +IF PBPSTACK <> 0 +EXTRN DATA (?C_PBP) + MOV ?C_PBP,#LOW PBPSTACKTOP +ENDIF + + MOV SP,#?STACK-1 + +; This code is required if you use L51_BANK.A51 with Banking Mode 4 +;<h> Code Banking +; <q> Select Bank 0 for L51_BANK.A51 Mode 4 +#if 0 +; <i> Initialize bank mechanism to code bank 0 when using L51_BANK.A51 with Banking Mode 4. +EXTRN CODE (?B_SWITCH0) + CALL ?B_SWITCH0 ; init bank mechanism to code bank 0 +#endif +;</h> + LJMP ?C_START + + END
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/emu_MCS-51/STARTUP.LST Tue Apr 15 15:49:16 2014 +0100 @@ -0,0 +1,252 @@ +A51 MACRO ASSEMBLER STARTUP 04/15/2014 15:32:07 PAGE 1 + + +MACRO ASSEMBLER A51 V8.02 +OBJECT MODULE PLACED IN STARTUP.OBJ +ASSEMBLER INVOKED BY: C:\Keil\C51\BIN\A51.EXE STARTUP.A51 SET(SMALL) DEBUG EP + +LOC OBJ LINE SOURCE + + 1 $nomod51 + 2 ;------------------------------------------------------------------------------ + 3 ; This file is part of the C51 Compiler package + 4 ; Copyright (c) 1988-2005 Keil Elektronik GmbH and Keil Software, Inc. + 5 ; Version 8.01 + 6 ; + 7 ; *** <<< Use Configuration Wizard in Context Menu >>> *** + 8 ;------------------------------------------------------------------------------ + 9 ; STARTUP.A51: This code is executed after processor reset. + 10 ; + 11 ; To translate this file use A51 with the following invocation: + 12 ; + 13 ; A51 STARTUP.A51 + 14 ; + 15 ; To link the modified STARTUP.OBJ file to your application use the following + 16 ; Lx51 invocation: + 17 ; + 18 ; Lx51 your object file list, STARTUP.OBJ controls + 19 ; + 20 ;------------------------------------------------------------------------------ + 21 ; + 22 ; User-defined <h> Power-On Initialization of Memory + 23 ; + 24 ; With the following EQU statements the initialization of memory + 25 ; at processor reset can be defined: + 26 ; + 27 ; <o> IDATALEN: IDATA memory size <0x0-0x100> + 28 ; <i> Note: The absolute start-address of IDATA memory is always 0 + 29 ; <i> The IDATA space overlaps physically the DATA and BIT areas. + 0080 30 IDATALEN EQU 80H + 31 ; + 32 ; <o> XDATASTART: XDATA memory start address <0x0-0xFFFF> + 33 ; <i> The absolute start address of XDATA memory + 0000 34 XDATASTART EQU 0 + 35 ; + 36 ; <o> XDATALEN: XDATA memory size <0x0-0xFFFF> + 37 ; <i> The length of XDATA memory in bytes. + 0000 38 XDATALEN EQU 0 + 39 ; + 40 ; <o> PDATASTART: PDATA memory start address <0x0-0xFFFF> + 41 ; <i> The absolute start address of PDATA memory + 0000 42 PDATASTART EQU 0H + 43 ; + 44 ; <o> PDATALEN: PDATA memory size <0x0-0xFF> + 45 ; <i> The length of PDATA memory in bytes. + 0000 46 PDATALEN EQU 0H + 47 ; + 48 ;</h> + 49 ;------------------------------------------------------------------------------ + 50 ; + 51 ;<h> Reentrant Stack Initialization + 52 ; + 53 ; The following EQU statements define the stack pointer for reentrant + 54 ; functions and initialized it: + 55 ; + 56 ; <h> Stack Space for reentrant functions in the SMALL model. + 57 ; <q> IBPSTACK: Enable SMALL model reentrant stack + 58 ; <i> Stack space for reentrant functions in the SMALL model. + A51 MACRO ASSEMBLER STARTUP 04/15/2014 15:32:07 PAGE 2 + + 0000 59 IBPSTACK EQU 0 ; set to 1 if small reentrant is used. + 60 ; <o> IBPSTACKTOP: End address of SMALL model stack <0x0-0xFF> + 61 ; <i> Set the top of the stack to the highest location. + 0100 62 IBPSTACKTOP EQU 0xFF +1 ; default 0FFH+1 + 63 ; </h> + 64 ; + 65 ; <h> Stack Space for reentrant functions in the LARGE model. + 66 ; <q> XBPSTACK: Enable LARGE model reentrant stack + 67 ; <i> Stack space for reentrant functions in the LARGE model. + 0000 68 XBPSTACK EQU 0 ; set to 1 if large reentrant is used. + 69 ; <o> XBPSTACKTOP: End address of LARGE model stack <0x0-0xFFFF> + 70 ; <i> Set the top of the stack to the highest location. + 0000 71 XBPSTACKTOP EQU 0xFFFF +1 ; default 0FFFFH+1 + 72 ; </h> + 73 ; + 74 ; <h> Stack Space for reentrant functions in the COMPACT model. + 75 ; <q> PBPSTACK: Enable COMPACT model reentrant stack + 76 ; <i> Stack space for reentrant functions in the COMPACT model. + 0000 77 PBPSTACK EQU 0 ; set to 1 if compact reentrant is used. + 78 ; + 79 ; <o> PBPSTACKTOP: End address of COMPACT model stack <0x0-0xFFFF> + 80 ; <i> Set the top of the stack to the highest location. + 0100 81 PBPSTACKTOP EQU 0xFF +1 ; default 0FFH+1 + 82 ; </h> + 83 ;</h> + 84 ;------------------------------------------------------------------------------ + 85 ; + 86 ; Memory Page for Using the Compact Model with 64 KByte xdata RAM + 87 ; <e>Compact Model Page Definition + 88 ; + 89 ; <i>Define the XDATA page used for PDATA variables. + 90 ; <i>PPAGE must conform with the PPAGE set in the linker invocation. + 91 ; + 92 ; Enable pdata memory page initalization + 0000 93 PPAGEENABLE EQU 0 ; set to 1 if pdata object are used. + 94 ; + 95 ; <o> PPAGE number <0x0-0xFF> + 96 ; <i> uppermost 256-byte address of the page used for PDATA variables. + 0000 97 PPAGE EQU 0 + 98 ; + 99 ; <o> SFR address which supplies uppermost address byte <0x0-0xFF> + 100 ; <i> most 8051 variants use P2 as uppermost address byte + 00A0 101 PPAGE_SFR DATA 0A0H + 102 ; + 103 ; </e> + 104 ;------------------------------------------------------------------------------ + 105 + 106 ; Standard SFR Symbols + 00E0 107 ACC DATA 0E0H + 00F0 108 B DATA 0F0H + 0081 109 SP DATA 81H + 0082 110 DPL DATA 82H + 0083 111 DPH DATA 83H + 112 + 113 NAME ?C_STARTUP + 114 + 115 + 116 ?C_C51STARTUP SEGMENT CODE + 117 ?STACK SEGMENT IDATA + 118 +---- 119 RSEG ?STACK +0000 120 DS 1 + 121 + 122 EXTRN CODE (?C_START) + 123 PUBLIC ?C_STARTUP + 124 + A51 MACRO ASSEMBLER STARTUP 04/15/2014 15:32:07 PAGE 3 + +---- 125 CSEG AT 0 +0000 020000 F 126 ?C_STARTUP: LJMP STARTUP1 + 127 +---- 128 RSEG ?C_C51STARTUP + 129 +0000 130 STARTUP1: + 131 + 132 IF IDATALEN <> 0 +0000 787F 133 MOV R0,#IDATALEN - 1 +0002 E4 134 CLR A +0003 F6 135 IDATALOOP: MOV @R0,A +0004 D8FD 136 DJNZ R0,IDATALOOP + 137 ENDIF + 138 + 139 IF XDATALEN <> 0 + MOV DPTR,#XDATASTART + MOV R7,#LOW (XDATALEN) + IF (LOW (XDATALEN)) <> 0 + MOV R6,#(HIGH (XDATALEN)) +1 + ELSE + MOV R6,#HIGH (XDATALEN) + ENDIF + CLR A + XDATALOOP: MOVX @DPTR,A + INC DPTR + DJNZ R7,XDATALOOP + DJNZ R6,XDATALOOP + ENDIF + 153 + 154 IF PPAGEENABLE <> 0 + MOV PPAGE_SFR,#PPAGE + ENDIF + 157 + 158 IF PDATALEN <> 0 + MOV R0,#LOW (PDATASTART) + MOV R7,#LOW (PDATALEN) + CLR A + PDATALOOP: MOVX @R0,A + INC R0 + DJNZ R7,PDATALOOP + ENDIF + 166 + 167 IF IBPSTACK <> 0 + EXTRN DATA (?C_IBP) + + MOV ?C_IBP,#LOW IBPSTACKTOP + ENDIF + 172 + 173 IF XBPSTACK <> 0 + EXTRN DATA (?C_XBP) + + MOV ?C_XBP,#HIGH XBPSTACKTOP + MOV ?C_XBP+1,#LOW XBPSTACKTOP + ENDIF + 179 + 180 IF PBPSTACK <> 0 + EXTRN DATA (?C_PBP) + MOV ?C_PBP,#LOW PBPSTACKTOP + ENDIF + 184 +0006 758100 F 185 MOV SP,#?STACK-1 + 186 + 187 ; This code is required if you use L51_BANK.A51 with Banking Mode 4 + 188 ;<h> Code Banking + 189 ; <q> Select Bank 0 for L51_BANK.A51 Mode 4 + 190 + A51 MACRO ASSEMBLER STARTUP 04/15/2014 15:32:07 PAGE 4 + + + + + + 195 ;</h> +0009 020000 F 196 LJMP ?C_START + 197 + 198 END + A51 MACRO ASSEMBLER STARTUP 04/15/2014 15:32:07 PAGE 5 + +SYMBOL TABLE LISTING +------ ----- ------- + + +N A M E T Y P E V A L U E ATTRIBUTES + +?C_C51STARTUP. . . C SEG 000CH REL=UNIT +?C_START . . . . . C ADDR ----- EXT +?C_STARTUP . . . . C ADDR 0000H A +?STACK . . . . . . I SEG 0001H REL=UNIT +ACC. . . . . . . . D ADDR 00E0H A +B. . . . . . . . . D ADDR 00F0H A +DPH. . . . . . . . D ADDR 0083H A +DPL. . . . . . . . D ADDR 0082H A +IBPSTACK . . . . . N NUMB 0000H A +IBPSTACKTOP. . . . N NUMB 0100H A +IDATALEN . . . . . N NUMB 0080H A +IDATALOOP. . . . . C ADDR 0003H R SEG=?C_C51STARTUP +PBPSTACK . . . . . N NUMB 0000H A +PBPSTACKTOP. . . . N NUMB 0100H A +PDATALEN . . . . . N NUMB 0000H A +PDATASTART . . . . N NUMB 0000H A +PPAGE. . . . . . . N NUMB 0000H A +PPAGEENABLE. . . . N NUMB 0000H A +PPAGE_SFR. . . . . D ADDR 00A0H A +SP . . . . . . . . D ADDR 0081H A +STARTUP1 . . . . . C ADDR 0000H R SEG=?C_C51STARTUP +XBPSTACK . . . . . N NUMB 0000H A +XBPSTACKTOP. . . . N NUMB 0000H A +XDATALEN . . . . . N NUMB 0000H A +XDATASTART . . . . N NUMB 0000H A + + +REGISTER BANK(S) USED: 0 + + +ASSEMBLY COMPLETE. 0 WARNING(S), 0 ERROR(S)
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/emu_MCS-51/emu.M51 Tue Apr 15 15:49:16 2014 +0100 @@ -0,0 +1,1238 @@ +BL51 BANKED LINKER/LOCATER V6.22 04/15/2014 15:32:12 PAGE 1 + + +BL51 BANKED LINKER/LOCATER V6.22, INVOKED BY: +C:\KEIL\C51\BIN\BL51.EXE STARTUP.obj, main.obj, mem.obj, iset.obj TO emu RAMSIZE (256) XDATA (0X0000-0X7FFF) + + +MEMORY MODEL: SMALL + + +INPUT MODULES INCLUDED: + STARTUP.obj (?C_STARTUP) + main.obj (MAIN) + mem.obj (MEM) + iset.obj (ISET) + C:\KEIL\C51\LIB\C51S.LIB (?C?ICALL) + C:\KEIL\C51\LIB\C51S.LIB (PUTCHAR) + C:\KEIL\C51\LIB\C51S.LIB (GETCHAR) + C:\KEIL\C51\LIB\C51S.LIB (_GETKEY) + + +LINK MAP OF MODULE: emu (?C_STARTUP) + + + TYPE BASE LENGTH RELOCATION SEGMENT NAME + ----------------------------------------------------- + + * * * * * * * D A T A M E M O R Y * * * * * * * + REG 0000H 0008H ABSOLUTE "REG BANK 0" + DATA 0008H 0001H UNIT ?DT?GETCHAR + 0009H 0017H *** GAP *** + BIT 0020H.0 0000H.1 UNIT ?BI?GETCHAR + 0020H.1 0000H.7 *** GAP *** + DATA 0021H 001DH UNIT ?DT?MAIN + IDATA 003EH 0001H UNIT ?STACK + + * * * * * * * X D A T A M E M O R Y * * * * * * * + XDATA 0000H 8000H UNIT ?XD?MAIN + + * * * * * * * C O D E M E M O R Y * * * * * * * + CODE 0000H 0003H ABSOLUTE + CODE 0003H 0300H UNIT ?CO?MAIN + CODE 0303H 0204H UNIT ?PR?MOV?ISET + CODE 0507H 0196H UNIT ?PR?DBGI?MAIN + CODE 069DH 00A1H UNIT ?PR?ADD?ISET + CODE 073EH 008EH UNIT ?PR?SUB?ISET + CODE 07CCH 0065H UNIT ?PR?INC?ISET + CODE 0831H 0057H UNIT ?PR?DEC?ISET + CODE 0888H 003BH UNIT ?PR?ANL?ISET + CODE 08C3H 003BH UNIT ?PR?ORL?ISET + CODE 08FEH 003BH UNIT ?PR?XRL?ISET + CODE 0939H 0038H UNIT ?PR?_GET_REG?MEM + CODE 0971H 0035H UNIT ?PR?_SET_REG?MEM + CODE 09A6H 0033H UNIT ?PR?_SET_ZP?MEM + CODE 09D9H 0030H UNIT ?PR?FETCH_WIDE?MEM + CODE 0A09H 0027H UNIT ?PR?PUTCHAR?PUTCHAR + CODE 0A30H 0026H UNIT ?PR?_GET_FLAG?MEM + CODE 0A56H 0024H UNIT ?PR?_SET_FLAG?MEM + CODE 0A7AH 0022H UNIT ?PR?SET?ISET + CODE 0A9CH 0021H UNIT ?PR?CLR?ISET + CODE 0ABDH 0021H UNIT ?PR?RRC?ISET + BL51 BANKED LINKER/LOCATER V6.22 04/15/2014 15:32:12 PAGE 2 + + + CODE 0ADEH 0020H UNIT ?PR?CPL?ISET + CODE 0AFEH 0020H UNIT ?PR?XCSD?ISET + CODE 0B1EH 001FH UNIT ?PR?STEP?MAIN + CODE 0B3DH 001FH UNIT ?PR?SJMP?ISET + CODE 0B5CH 001DH UNIT ?PR?RLC?ISET + CODE 0B79H 001CH UNIT ?PR?_INC_PC?MEM + CODE 0B95H 0019H UNIT ?PR?FETCH?MEM + CODE 0BAEH 0015H UNIT ?PR?MAIN?MAIN + CODE 0BC3H 0013H UNIT ?PR?_SET_WIDE?MEM + CODE 0BD6H 0011H UNIT ?PR?_GET_WIDE?MEM + CODE 0BE7H 0011H UNIT ?PR?RL?ISET + CODE 0BF8H 0011H UNIT ?PR?RR?ISET + CODE 0C09H 0011H UNIT ?PR?GETCHAR?GETCHAR + CODE 0C1AH 000CH UNIT ?C_C51STARTUP + CODE 0C26H 000AH UNIT ?PR?_GETKEY?_GETKEY + CODE 0C30H 0006H UNIT ?C?LIB_CODE + CODE 0C36H 0004H UNIT ?PR?RCV?MAIN + CODE 0C3AH 0004H UNIT ?PR?SFA?ISET + CODE 0C3EH 0004H UNIT ?PR?LAF?ISET + CODE 0C42H 0003H UNIT ?PR?_SND?MAIN + CODE 0C45H 0001H UNIT ?PR?NOP?ISET + CODE 0C46H 0001H UNIT ?PR?ADDC?ISET + CODE 0C47H 0001H UNIT ?PR?SUBB?ISET + CODE 0C48H 0001H UNIT ?PR?PJMP?ISET + CODE 0C49H 0001H UNIT ?PR?PCALL?ISET + CODE 0C4AH 0001H UNIT ?PR?DJNZ?ISET + CODE 0C4BH 0001H UNIT ?PR?CJNE?ISET + CODE 0C4CH 0001H UNIT ?PR?LJMP?ISET + CODE 0C4DH 0001H UNIT ?PR?LCALL?ISET + CODE 0C4EH 0001H UNIT ?PR?RET?ISET + CODE 0C4FH 0001H UNIT ?PR?RETI?ISET + CODE 0C50H 0001H UNIT ?PR?JMP?ISET + CODE 0C51H 0001H UNIT ?PR?JZ?ISET + CODE 0C52H 0001H UNIT ?PR?JNZ?ISET + CODE 0C53H 0001H UNIT ?PR?JC?ISET + CODE 0C54H 0001H UNIT ?PR?JNC?ISET + CODE 0C55H 0001H UNIT ?PR?JPO?ISET + CODE 0C56H 0001H UNIT ?PR?JPE?ISET + CODE 0C57H 0001H UNIT ?PR?JS?ISET + CODE 0C58H 0001H UNIT ?PR?JNS?ISET + CODE 0C59H 0001H UNIT ?PR?PUSH?ISET + CODE 0C5AH 0001H UNIT ?PR?POP?ISET + CODE 0C5BH 0001H UNIT ?PR?MUL?ISET + CODE 0C5CH 0001H UNIT ?PR?DIV?ISET + CODE 0C5DH 0001H UNIT ?PR?DA?ISET + CODE 0C5EH 0001H UNIT ?PR?IN?ISET + CODE 0C5FH 0001H UNIT ?PR?OUT?ISET + CODE 0C60H 0001H UNIT ?PR?INT?ISET + CODE 0C61H 0001H UNIT ?PR?HLT?ISET + + + +OVERLAY MAP OF MODULE: emu (?C_STARTUP) + + +SEGMENT + +--> CALLED SEGMENT + BL51 BANKED LINKER/LOCATER V6.22 04/15/2014 15:32:12 PAGE 3 + + +--------------------- +?C_C51STARTUP + +--> ?PR?MAIN?MAIN + +?PR?MAIN?MAIN + +--> ?PR?DBGI?MAIN + +?PR?DBGI?MAIN + +--> ?PR?RCV?MAIN + +--> ?PR?STEP?MAIN + +--> ?PR?_GET_WIDE?MEM + +--> ?PR?_SET_FLAG?MEM + +--> ?PR?_GET_FLAG?MEM + +--> ?PR?_SND?MAIN + +?PR?RCV?MAIN + +--> ?PR?GETCHAR?GETCHAR + +?PR?GETCHAR?GETCHAR + +--> ?PR?_GETKEY?_GETKEY + +--> ?PR?PUTCHAR?PUTCHAR + +?PR?STEP?MAIN + +--> ?PR?FETCH?MEM + +--> ?CO?MAIN + +?PR?FETCH?MEM + +--> ?PR?_GET_WIDE?MEM + +--> ?PR?_INC_PC?MEM + +?CO?MAIN + +--> ?PR?NOP?ISET + +--> ?PR?SET?ISET + +--> ?PR?CLR?ISET + +--> ?PR?CPL?ISET + +--> ?PR?XCSD?ISET + +--> ?PR?SFA?ISET + +--> ?PR?LAF?ISET + +--> ?PR?MOV?ISET + +--> ?PR?ANL?ISET + +--> ?PR?ORL?ISET + +--> ?PR?XRL?ISET + +--> ?PR?RL?ISET + +--> ?PR?RLC?ISET + +--> ?PR?RR?ISET + +--> ?PR?RRC?ISET + +--> ?PR?INC?ISET + +--> ?PR?DEC?ISET + +--> ?PR?ADD?ISET + +--> ?PR?ADDC?ISET + +--> ?PR?SUB?ISET + +--> ?PR?SUBB?ISET + +--> ?PR?PJMP?ISET + +--> ?PR?PCALL?ISET + +--> ?PR?DJNZ?ISET + +--> ?PR?CJNE?ISET + +--> ?PR?LJMP?ISET + BL51 BANKED LINKER/LOCATER V6.22 04/15/2014 15:32:12 PAGE 4 + + + +--> ?PR?LCALL?ISET + +--> ?PR?RET?ISET + +--> ?PR?RETI?ISET + +--> ?PR?SJMP?ISET + +--> ?PR?JMP?ISET + +--> ?PR?JZ?ISET + +--> ?PR?JNZ?ISET + +--> ?PR?JC?ISET + +--> ?PR?JNC?ISET + +--> ?PR?JPO?ISET + +--> ?PR?JPE?ISET + +--> ?PR?JS?ISET + +--> ?PR?JNS?ISET + +--> ?PR?PUSH?ISET + +--> ?PR?POP?ISET + +--> ?PR?MUL?ISET + +--> ?PR?DIV?ISET + +--> ?PR?DA?ISET + +--> ?PR?IN?ISET + +--> ?PR?OUT?ISET + +--> ?PR?INT?ISET + +--> ?PR?HLT?ISET + +?PR?SET?ISET + +--> ?PR?_SET_FLAG?MEM + +?PR?CLR?ISET + +--> ?PR?_SET_FLAG?MEM + +?PR?CPL?ISET + +--> ?PR?_GET_FLAG?MEM + +--> ?PR?_SET_FLAG?MEM + +?PR?XCSD?ISET + +--> ?PR?_GET_WIDE?MEM + +--> ?PR?_SET_WIDE?MEM + +?PR?MOV?ISET + +--> ?PR?_GET_WIDE?MEM + +--> ?PR?FETCH?MEM + +--> ?PR?FETCH_WIDE?MEM + +--> ?PR?_SET_WIDE?MEM + +--> ?PR?_GET_REG?MEM + +--> ?PR?_SET_REG?MEM + +?PR?FETCH_WIDE?MEM + +--> ?PR?_GET_WIDE?MEM + +--> ?PR?_INC_PC?MEM + +?PR?_GET_REG?MEM + +--> ?PR?_GET_FLAG?MEM + +?PR?_SET_REG?MEM + +--> ?PR?_GET_FLAG?MEM + +?PR?ANL?ISET + +--> ?PR?_GET_REG?MEM + BL51 BANKED LINKER/LOCATER V6.22 04/15/2014 15:32:12 PAGE 5 + + + +--> ?PR?FETCH?MEM + +--> ?PR?_GET_WIDE?MEM + +--> ?PR?_SET_WIDE?MEM + +--> ?PR?_SET_ZP?MEM + +?PR?_SET_ZP?MEM + +--> ?PR?_SET_FLAG?MEM + +?PR?ORL?ISET + +--> ?PR?_GET_REG?MEM + +--> ?PR?FETCH?MEM + +--> ?PR?_GET_WIDE?MEM + +--> ?PR?_SET_WIDE?MEM + +--> ?PR?_SET_ZP?MEM + +?PR?XRL?ISET + +--> ?PR?_GET_REG?MEM + +--> ?PR?FETCH?MEM + +--> ?PR?_GET_WIDE?MEM + +--> ?PR?_SET_WIDE?MEM + +--> ?PR?_SET_ZP?MEM + +?PR?RLC?ISET + +--> ?PR?_GET_FLAG?MEM + +--> ?PR?_SET_FLAG?MEM + +?PR?RRC?ISET + +--> ?PR?_GET_FLAG?MEM + +--> ?PR?_SET_FLAG?MEM + +?PR?INC?ISET + +--> ?PR?_GET_WIDE?MEM + +--> ?PR?_SET_FLAG?MEM + +--> ?PR?_SET_WIDE?MEM + +--> ?PR?_SET_ZP?MEM + +?PR?DEC?ISET + +--> ?PR?_GET_WIDE?MEM + +--> ?PR?_SET_FLAG?MEM + +--> ?PR?_SET_WIDE?MEM + +--> ?PR?_SET_ZP?MEM + +?PR?ADD?ISET + +--> ?PR?_GET_REG?MEM + +--> ?PR?_SET_FLAG?MEM + +--> ?PR?FETCH?MEM + +--> ?PR?_GET_WIDE?MEM + +--> ?PR?_SET_WIDE?MEM + +--> ?PR?_SET_ZP?MEM + +?PR?SUB?ISET + +--> ?PR?_GET_REG?MEM + +--> ?PR?_SET_FLAG?MEM + +--> ?PR?FETCH?MEM + +--> ?PR?_GET_WIDE?MEM + +--> ?PR?_SET_WIDE?MEM + +--> ?PR?_SET_ZP?MEM + BL51 BANKED LINKER/LOCATER V6.22 04/15/2014 15:32:12 PAGE 6 + + + +?PR?SJMP?ISET + +--> ?PR?_GET_WIDE?MEM + +--> ?PR?FETCH?MEM + +--> ?PR?_SET_WIDE?MEM + +?PR?_SND?MAIN + +--> ?PR?PUTCHAR?PUTCHAR + + + +SYMBOL TABLE OF MODULE: emu (?C_STARTUP) + + VALUE TYPE NAME + ---------------------------------- + + ------- MODULE ?C_STARTUP + C:0C1AH SEGMENT ?C_C51STARTUP + I:003EH SEGMENT ?STACK + C:0000H PUBLIC ?C_STARTUP + D:00E0H SYMBOL ACC + D:00F0H SYMBOL B + D:0083H SYMBOL DPH + D:0082H SYMBOL DPL + N:0000H SYMBOL IBPSTACK + N:0100H SYMBOL IBPSTACKTOP + N:0080H SYMBOL IDATALEN + C:0C1DH SYMBOL IDATALOOP + N:0000H SYMBOL PBPSTACK + N:0100H SYMBOL PBPSTACKTOP + N:0000H SYMBOL PDATALEN + N:0000H SYMBOL PDATASTART + N:0000H SYMBOL PPAGE + N:0000H SYMBOL PPAGEENABLE + D:00A0H SYMBOL PPAGE_SFR + D:0081H SYMBOL SP + C:0C1AH SYMBOL STARTUP1 + N:0000H SYMBOL XBPSTACK + N:0000H SYMBOL XBPSTACKTOP + N:0000H SYMBOL XDATALEN + N:0000H SYMBOL XDATASTART + C:0000H LINE# 126 + C:0C1AH LINE# 133 + C:0C1CH LINE# 134 + C:0C1DH LINE# 135 + C:0C1EH LINE# 136 + C:0C20H LINE# 185 + C:0C23H LINE# 196 + ------- ENDMOD ?C_STARTUP + + ------- MODULE MAIN + C:0000H SYMBOL _ICE_DUMMY_ + D:0090H PUBLIC P1 + D:00B0H PUBLIC P3 + D:00A8H PUBLIC IE + D:0021H PUBLIC flags + C:0507H PUBLIC dbgi + BL51 BANKED LINKER/LOCATER V6.22 04/15/2014 15:32:12 PAGE 7 + + + D:00B8H PUBLIC IP + D:0022H PUBLIC IR + B:0098H.1 PUBLIC TI + C:0BAEH PUBLIC main + D:0023H PUBLIC args + D:0027H PUBLIC regs + D:0098H PUBLIC SCON + D:0037H PUBLIC tmpb + D:0089H PUBLIC TMOD + D:0088H PUBLIC TCON + C:0003H PUBLIC iset + C:0B1EH PUBLIC step + X:0000H PUBLIC mem + D:0038H PUBLIC A + D:0039H PUBLIC ac + C:0C42H PUBLIC _snd + D:003BH PUBLIC tmpw + C:0C36H PUBLIC rcv + D:008DH PUBLIC TH1 + B:0088H.6 PUBLIC TR1 + D:003DH PUBLIC free_run + D:00C8H PUBLIC T2CON + D:00D0H PUBLIC PSW + ------- PROC _SND + D:0007H SYMBOL c + C:0C42H LINE# 50 + C:0C42H LINE# 51 + ------- ENDPROC _SND + ------- PROC RCV + C:0C36H LINE# 55 + C:0C36H LINE# 56 + C:0C39H LINE# 57 + ------- ENDPROC RCV + ------- PROC STEP + C:0B1EH LINE# 60 + C:0B1EH LINE# 61 + C:0B23H LINE# 62 + ------- ENDPROC STEP + ------- PROC DBGI + C:0507H LINE# 65 + C:0507H LINE# 66 + C:050EH LINE# 67 + C:054EH LINE# 70 + C:054EH LINE# 71 + C:0551H LINE# 72 + C:0551H LINE# 75 + C:0551H LINE# 76 + C:0556H LINE# 77 + C:055BH LINE# 78 + C:0564H LINE# 79 + C:0582H LINE# 80 + C:0585H LINE# 81 + C:058FH LINE# 82 + C:058FH LINE# 85 + C:058FH LINE# 86 + C:0594H LINE# 87 + C:0599H LINE# 88 + BL51 BANKED LINKER/LOCATER V6.22 04/15/2014 15:32:12 PAGE 8 + + + C:05A0H LINE# 89 + C:05A1H LINE# 92 + C:05A1H LINE# 93 + C:05A6H LINE# 94 + C:05ACH LINE# 95 + C:05AFH LINE# 98 + C:05AFH LINE# 99 + C:05B4H LINE# 100 + C:05B9H LINE# 101 + C:05C0H LINE# 102 + C:05C0H LINE# 105 + C:05C0H LINE# 106 + C:05C5H LINE# 107 + C:05C8H LINE# 108 + C:05CBH LINE# 111 + C:05CBH LINE# 112 + C:05D0H LINE# 113 + C:05D5H LINE# 114 + C:05DAH LINE# 115 + C:05DFH LINE# 116 + C:05E7H LINE# 117 + C:0605H LINE# 118 + C:0613H LINE# 119 + C:0613H LINE# 120 + C:0613H LINE# 121 + C:0624H LINE# 122 + C:062EH LINE# 123 + C:062EH LINE# 126 + C:062EH LINE# 127 + C:0633H LINE# 128 + C:0638H LINE# 129 + C:063DH LINE# 130 + C:0642H LINE# 131 + C:064AH LINE# 132 + C:0665H LINE# 133 + C:0670H LINE# 134 + C:0670H LINE# 135 + C:0670H LINE# 136 + C:0681H LINE# 137 + C:068BH LINE# 138 + C:068BH LINE# 141 + C:068BH LINE# 142 + C:068DH LINE# 143 + C:068FH LINE# 146 + C:068FH LINE# 147 + C:0691H LINE# 148 + C:0693H LINE# 151 + C:0693H LINE# 152 + C:0695H LINE# 153 + C:0697H LINE# 157 + C:0697H LINE# 158 + C:069CH LINE# 159 + C:069CH LINE# 160 + C:069CH LINE# 161 + C:069CH LINE# 162 + ------- ENDPROC DBGI + ------- PROC MAIN + BL51 BANKED LINKER/LOCATER V6.22 04/15/2014 15:32:12 PAGE 9 + + + C:0BAEH LINE# 165 + C:0BAEH LINE# 172 + C:0BB1H LINE# 173 + C:0BB4H LINE# 174 + C:0BB7H LINE# 175 + C:0BB9H LINE# 176 + C:0BBBH LINE# 178 + C:0BBEH LINE# 179 + C:0BBEH LINE# 180 + C:0BC1H LINE# 181 + ------- ENDPROC MAIN + ------- ENDMOD MAIN + + ------- MODULE MEM + C:0000H SYMBOL _ICE_DUMMY_ + C:0B95H PUBLIC fetch + C:09D9H PUBLIC fetch_wide + C:09A6H PUBLIC _set_zp + C:0A30H PUBLIC _get_flag + C:0A56H PUBLIC _set_flag + C:0BD6H PUBLIC _get_wide + C:0BC3H PUBLIC _set_wide + C:0939H PUBLIC _get_reg + C:0971H PUBLIC _set_reg + C:0B79H PUBLIC _inc_pc + ------- PROC _GET_FLAG + D:0007H SYMBOL flag + C:0A30H LINE# 8 + C:0A30H LINE# 9 + C:0A36H LINE# 10 + C:0A39H LINE# 11 + C:0A39H LINE# 12 + C:0A39H LINE# 13 + C:0A55H LINE# 14 + C:0A55H LINE# 15 + ------- ENDPROC _GET_FLAG + ------- PROC _SET_FLAG + D:0007H SYMBOL flag + D:0005H SYMBOL on + C:0A56H LINE# 20 + C:0A56H LINE# 21 + C:0A5CH LINE# 22 + C:0A5FH LINE# 23 + C:0A6BH LINE# 24 + C:0A6CH LINE# 25 + C:0A6CH LINE# 26 + C:0A79H LINE# 27 + C:0A79H LINE# 28 + C:0A79H LINE# 29 + ------- ENDPROC _SET_FLAG + ------- PROC _SET_ZP + D:0006H SYMBOL val + C:09A6H LINE# 33 + C:09A8H LINE# 34 + C:09ABH LINE# 35 + C:09B2H LINE# 36 + C:09B3H LINE# 37 + BL51 BANKED LINKER/LOCATER V6.22 04/15/2014 15:32:12 PAGE 10 + + + C:09B5H LINE# 38 + C:09B5H LINE# 40 + C:09BBH LINE# 41 + C:09C2H LINE# 42 + C:09C7H LINE# 43 + C:09CAH LINE# 44 + C:09CDH LINE# 45 + C:09CFH LINE# 46 + C:09D1H LINE# 47 + C:09D1H LINE# 48 + C:09D8H LINE# 49 + C:09D8H LINE# 50 + C:09D8H LINE# 51 + ------- ENDPROC _SET_ZP + ------- PROC _GET_WIDE + D:0005H SYMBOL reg + C:0BD6H LINE# 54 + C:0BD8H LINE# 56 + C:0BE6H LINE# 57 + ------- ENDPROC _GET_WIDE + ------- PROC _SET_WIDE + D:0003H SYMBOL reg + D:0004H SYMBOL val + C:0BC3H LINE# 60 + C:0BC5H LINE# 61 + C:0BCDH LINE# 62 + C:0BD5H LINE# 63 + ------- ENDPROC _SET_WIDE + ------- PROC _INC_PC + D:0007H SYMBOL n + C:0B79H LINE# 66 + C:0B79H LINE# 67 + C:0B8DH LINE# 68 + C:0B8FH LINE# 69 + C:0B8FH LINE# 70 + C:0B94H LINE# 71 + ------- ENDPROC _INC_PC + ------- PROC FETCH + ------- DO + D:0006H SYMBOL val + ------- ENDDO + C:0B95H LINE# 74 + C:0B95H LINE# 75 + C:0BA6H LINE# 76 + C:0BABH LINE# 77 + C:0BADH LINE# 78 + ------- ENDPROC FETCH + ------- PROC FETCH_WIDE + ------- DO + D:0002H SYMBOL val + ------- ENDDO + C:09D9H LINE# 81 + C:09D9H LINE# 82 + C:09FFH LINE# 83 + C:0A04H LINE# 84 + C:0A08H LINE# 85 + ------- ENDPROC FETCH_WIDE + BL51 BANKED LINKER/LOCATER V6.22 04/15/2014 15:32:12 PAGE 11 + + + ------- PROC _GET_REG + D:0005H SYMBOL reg + C:0939H LINE# 96 + C:093BH LINE# 97 + C:0941H LINE# 98 + C:0953H LINE# 99 + C:0953H LINE# 100 + C:0953H LINE# 101 + C:0962H LINE# 103 + C:0962H LINE# 104 + C:0965H LINE# 105 + C:0965H LINE# 106 + C:0968H LINE# 107 + C:0968H LINE# 108 + C:096BH LINE# 109 + C:096BH LINE# 110 + C:096EH LINE# 111 + C:096EH LINE# 112 + C:0970H LINE# 113 + C:0970H LINE# 114 + C:0970H LINE# 115 + ------- ENDPROC _GET_REG + ------- PROC _SET_REG + D:0004H SYMBOL reg + D:0005H SYMBOL val + C:0971H LINE# 118 + C:0973H LINE# 119 + C:0979H LINE# 120 + C:098AH LINE# 121 + C:098BH LINE# 122 + C:098BH LINE# 123 + C:099AH LINE# 125 + C:099AH LINE# 126 + C:099CH LINE# 127 + C:099DH LINE# 128 + C:099DH LINE# 129 + C:099FH LINE# 130 + C:09A0H LINE# 131 + C:09A0H LINE# 132 + C:09A2H LINE# 133 + C:09A3H LINE# 134 + C:09A3H LINE# 135 + C:09A5H LINE# 136 + C:09A5H LINE# 137 + C:09A5H LINE# 138 + C:09A5H LINE# 139 + C:09A5H LINE# 140 + C:09A5H LINE# 141 + ------- ENDPROC _SET_REG + ------- ENDMOD MEM + + ------- MODULE ISET + C:0000H SYMBOL _ICE_DUMMY_ + C:0C5DH PUBLIC DA + C:0C53H PUBLIC JC + C:0C46H PUBLIC ADDC + C:0C5EH PUBLIC IN + BL51 BANKED LINKER/LOCATER V6.22 04/15/2014 15:32:12 PAGE 12 + + + C:0C57H PUBLIC JS + C:0BE7H PUBLIC RL + C:0C4BH PUBLIC CJNE + C:0C51H PUBLIC JZ + C:0BF8H PUBLIC RR + C:0C47H PUBLIC SUBB + C:0AFEH PUBLIC XCSD + C:0C4CH PUBLIC LJMP + C:0C4FH PUBLIC RETI + C:0C4AH PUBLIC DJNZ + C:0C48H PUBLIC PJMP + C:0B3DH PUBLIC SJMP + C:0C59H PUBLIC PUSH + C:069DH PUBLIC ADD + C:0831H PUBLIC DEC + C:0C3EH PUBLIC LAF + C:0C3AH PUBLIC SFA + C:07CCH PUBLIC INC + C:0C54H PUBLIC JNC + C:0888H PUBLIC ANL + C:0ADEH PUBLIC CPL + C:0C56H PUBLIC JPE + C:0B5CH PUBLIC RLC + C:0A9CH PUBLIC CLR + C:0C5CH PUBLIC DIV + C:0C50H PUBLIC JMP + C:0ABDH PUBLIC RRC + C:0C61H PUBLIC HLT + C:0C4DH PUBLIC LCALL + C:0C55H PUBLIC JPO + C:073EH PUBLIC SUB + C:0C60H PUBLIC INT + C:0C4EH PUBLIC RET + C:0C58H PUBLIC JNS + C:0A7AH PUBLIC SET + C:0C45H PUBLIC NOP + C:08C3H PUBLIC ORL + C:0C49H PUBLIC PCALL + C:0C5BH PUBLIC MUL + C:0C5AH PUBLIC POP + C:0303H PUBLIC MOV + C:0C52H PUBLIC JNZ + C:08FEH PUBLIC XRL + C:0C5FH PUBLIC OUT + ------- PROC NOP + C:0C45H LINE# 13 + C:0C45H LINE# 14 + ------- ENDPROC NOP + ------- PROC SET + C:0A7AH LINE# 20 + C:0A7AH LINE# 21 + C:0A88H LINE# 23 + C:0A88H LINE# 24 + C:0A8CH LINE# 25 + C:0A8EH LINE# 27 + C:0A8EH LINE# 28 + C:0A92H LINE# 29 + BL51 BANKED LINKER/LOCATER V6.22 04/15/2014 15:32:12 PAGE 13 + + + C:0A94H LINE# 31 + C:0A94H LINE# 32 + C:0A9BH LINE# 33 + C:0A9BH LINE# 35 + C:0A9BH LINE# 36 + C:0A9BH LINE# 37 + C:0A9BH LINE# 38 + ------- ENDPROC SET + ------- PROC CLR + C:0A9CH LINE# 44 + C:0A9CH LINE# 45 + C:0AAAH LINE# 47 + C:0AAAH LINE# 48 + C:0AAEH LINE# 49 + C:0AB0H LINE# 51 + C:0AB0H LINE# 52 + C:0AB3H LINE# 53 + C:0AB5H LINE# 55 + C:0AB5H LINE# 56 + C:0ABCH LINE# 57 + C:0ABCH LINE# 59 + C:0ABCH LINE# 60 + C:0ABCH LINE# 61 + C:0ABCH LINE# 62 + ------- ENDPROC CLR + ------- PROC CPL + C:0ADEH LINE# 67 + C:0ADEH LINE# 68 + C:0AE7H LINE# 70 + C:0AE7H LINE# 71 + C:0AEFH LINE# 72 + C:0AF1H LINE# 73 + C:0AF3H LINE# 74 + C:0AF3H LINE# 75 + C:0AFAH LINE# 76 + C:0AFAH LINE# 78 + C:0AFAH LINE# 79 + C:0AFDH LINE# 80 + C:0AFDH LINE# 82 + C:0AFDH LINE# 83 + C:0AFDH LINE# 84 + C:0AFDH LINE# 85 + ------- ENDPROC CPL + ------- PROC XCSD + C:0AFEH LINE# 89 + C:0AFEH LINE# 90 + C:0B07H LINE# 91 + C:0B15H LINE# 92 + ------- ENDPROC XCSD + ------- PROC SFA + C:0C3AH LINE# 97 + C:0C3AH LINE# 98 + C:0C3DH LINE# 99 + ------- ENDPROC SFA + ------- PROC LAF + C:0C3EH LINE# 103 + C:0C3EH LINE# 104 + BL51 BANKED LINKER/LOCATER V6.22 04/15/2014 15:32:12 PAGE 14 + + + C:0C41H LINE# 105 + ------- ENDPROC LAF + ------- PROC MOV + C:0303H LINE# 117 + C:0303H LINE# 118 + C:0315H LINE# 120 + C:0315H LINE# 121 + C:0340H LINE# 124 + C:0340H LINE# 125 + C:0358H LINE# 128 + C:0358H LINE# 129 + C:035DH LINE# 130 + C:035FH LINE# 133 + C:035FH LINE# 134 + C:0364H LINE# 135 + C:0366H LINE# 138 + C:0366H LINE# 139 + C:036BH LINE# 140 + C:036CH LINE# 143 + C:036CH LINE# 144 + C:0375H LINE# 145 + C:0377H LINE# 148 + C:0377H LINE# 149 + C:0383H LINE# 150 + C:0383H LINE# 152 + C:0383H LINE# 153 + C:0383H LINE# 154 + C:0383H LINE# 155 + C:0383H LINE# 158 + C:0383H LINE# 159 + C:03AEH LINE# 162 + C:03AEH LINE# 163 + C:03B1H LINE# 164 + C:03B1H LINE# 165 + C:03B4H LINE# 168 + C:03B4H LINE# 169 + C:03B7H LINE# 170 + C:03B7H LINE# 171 + C:03BAH LINE# 174 + C:03BAH LINE# 175 + C:03C8H LINE# 176 + C:03C8H LINE# 177 + C:03CAH LINE# 180 + C:03CAH LINE# 181 + C:03DDH LINE# 182 + C:03E0H LINE# 183 + C:03E2H LINE# 186 + C:03E2H LINE# 187 + C:03EEH LINE# 188 + C:0407H LINE# 189 + C:0409H LINE# 192 + C:0409H LINE# 193 + C:0415H LINE# 194 + C:042CH LINE# 195 + C:042EH LINE# 198 + C:042EH LINE# 199 + C:043CH LINE# 200 + BL51 BANKED LINKER/LOCATER V6.22 04/15/2014 15:32:12 PAGE 15 + + + C:044EH LINE# 201 + C:044FH LINE# 204 + C:044FH LINE# 205 + C:045DH LINE# 206 + C:046FH LINE# 207 + C:0470H LINE# 209 + C:0470H LINE# 210 + C:0470H LINE# 211 + C:0470H LINE# 212 + C:0470H LINE# 215 + C:0470H LINE# 216 + C:047EH LINE# 217 + C:049AH LINE# 218 + C:049BH LINE# 221 + C:049BH LINE# 222 + C:04A4H LINE# 223 + C:04A6H LINE# 226 + C:04A6H LINE# 227 + C:04ADH LINE# 228 + C:04AFH LINE# 231 + C:04AFH LINE# 232 + C:04B9H LINE# 233 + C:04BAH LINE# 235 + C:04BAH LINE# 236 + C:04BAH LINE# 237 + C:04BAH LINE# 238 + C:04BAH LINE# 242 + C:04BAH LINE# 243 + C:04CBH LINE# 244 + C:04D8H LINE# 245 + C:04EDH LINE# 246 + C:04EFH LINE# 247 + C:04EFH LINE# 248 + C:0506H LINE# 249 + C:0506H LINE# 250 + C:0506H LINE# 252 + C:0506H LINE# 253 + C:0506H LINE# 254 + C:0506H LINE# 255 + ------- ENDPROC MOV + ------- PROC ANL + C:0888H LINE# 267 + C:0888H LINE# 268 + C:0892H LINE# 269 + C:0895H LINE# 270 + C:0897H LINE# 271 + C:0897H LINE# 272 + C:08A2H LINE# 274 + C:08A2H LINE# 275 + C:08A8H LINE# 276 + C:08AAH LINE# 278 + C:08AAH LINE# 279 + C:08B8H LINE# 280 + C:08BEH LINE# 281 + C:08BEH LINE# 282 + C:08BEH LINE# 283 + C:08BEH LINE# 284 + BL51 BANKED LINKER/LOCATER V6.22 04/15/2014 15:32:12 PAGE 16 + + + ------- ENDPROC ANL + ------- PROC ORL + C:08C3H LINE# 296 + C:08C3H LINE# 297 + C:08CDH LINE# 298 + C:08D0H LINE# 299 + C:08D2H LINE# 300 + C:08D2H LINE# 301 + C:08DDH LINE# 303 + C:08DDH LINE# 304 + C:08E3H LINE# 305 + C:08E5H LINE# 307 + C:08E5H LINE# 308 + C:08F3H LINE# 309 + C:08F9H LINE# 310 + C:08F9H LINE# 311 + C:08F9H LINE# 312 + C:08F9H LINE# 313 + ------- ENDPROC ORL + ------- PROC XRL + C:08FEH LINE# 325 + C:08FEH LINE# 326 + C:0908H LINE# 327 + C:090BH LINE# 328 + C:090DH LINE# 329 + C:090DH LINE# 330 + C:0918H LINE# 332 + C:0918H LINE# 333 + C:091EH LINE# 334 + C:0920H LINE# 336 + C:0920H LINE# 337 + C:092EH LINE# 338 + C:0934H LINE# 339 + C:0934H LINE# 340 + C:0934H LINE# 341 + C:0934H LINE# 342 + ------- ENDPROC XRL + ------- PROC RL + C:0BE7H LINE# 347 + C:0BE7H LINE# 348 + C:0BF7H LINE# 349 + ------- ENDPROC RL + ------- PROC RLC + C:0B5CH LINE# 353 + C:0B5CH LINE# 354 + C:0B5FH LINE# 355 + C:0B6BH LINE# 356 + ------- ENDPROC RLC + ------- PROC RR + C:0BF8H LINE# 361 + C:0BF8H LINE# 362 + C:0C08H LINE# 363 + ------- ENDPROC RR + ------- PROC RRC + C:0ABDH LINE# 367 + C:0ABDH LINE# 368 + C:0AC0H LINE# 369 + BL51 BANKED LINKER/LOCATER V6.22 04/15/2014 15:32:12 PAGE 17 + + + C:0AD4H LINE# 370 + ------- ENDPROC RRC + ------- PROC INC + C:07CCH LINE# 376 + C:07CCH LINE# 377 + C:07D6H LINE# 379 + C:07D6H LINE# 380 + C:07DFH LINE# 381 + C:07F1H LINE# 382 + C:07F8H LINE# 383 + C:07F8H LINE# 384 + C:0806H LINE# 385 + C:080BH LINE# 386 + C:080DH LINE# 387 + C:080FH LINE# 389 + C:080FH LINE# 390 + C:0822H LINE# 391 + C:0829H LINE# 392 + C:0829H LINE# 393 + C:082BH LINE# 394 + C:0830H LINE# 396 + C:0830H LINE# 397 + ------- ENDPROC INC + ------- PROC DEC + C:0831H LINE# 402 + C:0831H LINE# 403 + C:083BH LINE# 405 + C:083BH LINE# 406 + C:0844H LINE# 407 + C:0851H LINE# 408 + C:0858H LINE# 409 + C:0858H LINE# 410 + C:0867H LINE# 411 + C:086CH LINE# 412 + C:0871H LINE# 414 + C:0871H LINE# 415 + C:0879H LINE# 416 + C:0880H LINE# 417 + C:0880H LINE# 418 + C:0882H LINE# 419 + C:0887H LINE# 420 + C:0887H LINE# 421 + ------- ENDPROC DEC + ------- PROC ADD + C:069DH LINE# 432 + C:069DH LINE# 433 + C:06A7H LINE# 434 + C:06BCH LINE# 435 + C:06BEH LINE# 436 + C:06C0H LINE# 437 + C:06C0H LINE# 438 + C:06C7H LINE# 439 + C:06C7H LINE# 440 + C:06D0H LINE# 441 + C:06D0H LINE# 442 + C:06D2H LINE# 443 + C:06D2H LINE# 444 + BL51 BANKED LINKER/LOCATER V6.22 04/15/2014 15:32:12 PAGE 18 + + + C:06DDH LINE# 446 + C:06DDH LINE# 447 + C:06E2H LINE# 448 + C:06F4H LINE# 449 + C:06F6H LINE# 450 + C:06F8H LINE# 451 + C:06F8H LINE# 452 + C:06FFH LINE# 453 + C:06FFH LINE# 454 + C:0701H LINE# 455 + C:0701H LINE# 456 + C:0703H LINE# 458 + C:0703H LINE# 459 + C:0711H LINE# 460 + C:0726H LINE# 461 + C:0728H LINE# 462 + C:072AH LINE# 463 + C:072AH LINE# 464 + C:0731H LINE# 465 + C:0731H LINE# 466 + C:0739H LINE# 467 + C:073DH LINE# 468 + C:073DH LINE# 469 + C:073DH LINE# 470 + C:073DH LINE# 472 + ------- ENDPROC ADD + ------- PROC ADDC + C:0C46H LINE# 475 + C:0C46H LINE# 477 + ------- ENDPROC ADDC + ------- PROC SUB + C:073EH LINE# 488 + C:073EH LINE# 489 + C:0748H LINE# 490 + C:0754H LINE# 491 + C:0756H LINE# 492 + C:0758H LINE# 493 + C:0758H LINE# 494 + C:075FH LINE# 495 + C:075FH LINE# 496 + C:0767H LINE# 497 + C:0767H LINE# 498 + C:0769H LINE# 499 + C:0769H LINE# 500 + C:0774H LINE# 502 + C:0774H LINE# 503 + C:0779H LINE# 504 + C:0783H LINE# 505 + C:0785H LINE# 506 + C:0787H LINE# 507 + C:0787H LINE# 508 + C:078EH LINE# 509 + C:078EH LINE# 510 + C:0793H LINE# 511 + C:0793H LINE# 512 + C:0795H LINE# 514 + C:0795H LINE# 515 + BL51 BANKED LINKER/LOCATER V6.22 04/15/2014 15:32:12 PAGE 19 + + + C:07A3H LINE# 516 + C:07B1H LINE# 517 + C:07B3H LINE# 518 + C:07B5H LINE# 519 + C:07B5H LINE# 520 + C:07BCH LINE# 521 + C:07BCH LINE# 522 + C:07C7H LINE# 523 + C:07CBH LINE# 524 + C:07CBH LINE# 525 + C:07CBH LINE# 526 + C:07CBH LINE# 527 + ------- ENDPROC SUB + ------- PROC SUBB + C:0C47H LINE# 530 + C:0C47H LINE# 532 + ------- ENDPROC SUBB + ------- PROC PJMP + C:0C48H LINE# 535 + C:0C48H LINE# 537 + ------- ENDPROC PJMP + ------- PROC PCALL + C:0C49H LINE# 540 + C:0C49H LINE# 542 + ------- ENDPROC PCALL + ------- PROC DJNZ + C:0C4AH LINE# 549 + C:0C4AH LINE# 550 + ------- ENDPROC DJNZ + ------- PROC CJNE + C:0C4BH LINE# 553 + C:0C4BH LINE# 554 + ------- ENDPROC CJNE + ------- PROC LJMP + C:0C4CH LINE# 558 + C:0C4CH LINE# 559 + ------- ENDPROC LJMP + ------- PROC LCALL + C:0C4DH LINE# 562 + C:0C4DH LINE# 564 + ------- ENDPROC LCALL + ------- PROC RET + C:0C4EH LINE# 567 + C:0C4EH LINE# 569 + ------- ENDPROC RET + ------- PROC RETI + C:0C4FH LINE# 572 + C:0C4FH LINE# 574 + ------- ENDPROC RETI + ------- PROC SJMP + C:0B3DH LINE# 578 + C:0B3DH LINE# 579 + ------- ENDPROC SJMP + ------- PROC JMP + C:0C50H LINE# 585 + C:0C50H LINE# 586 + ------- ENDPROC JMP + BL51 BANKED LINKER/LOCATER V6.22 04/15/2014 15:32:12 PAGE 20 + + + ------- PROC JZ + C:0C51H LINE# 589 + C:0C51H LINE# 590 + ------- ENDPROC JZ + ------- PROC JNZ + C:0C52H LINE# 593 + C:0C52H LINE# 594 + ------- ENDPROC JNZ + ------- PROC JC + C:0C53H LINE# 597 + C:0C53H LINE# 598 + ------- ENDPROC JC + ------- PROC JNC + C:0C54H LINE# 601 + C:0C54H LINE# 602 + ------- ENDPROC JNC + ------- PROC JPO + C:0C55H LINE# 605 + C:0C55H LINE# 606 + ------- ENDPROC JPO + ------- PROC JPE + C:0C56H LINE# 609 + C:0C56H LINE# 610 + ------- ENDPROC JPE + ------- PROC JS + C:0C57H LINE# 613 + C:0C57H LINE# 614 + ------- ENDPROC JS + ------- PROC JNS + C:0C58H LINE# 617 + C:0C58H LINE# 618 + ------- ENDPROC JNS + ------- PROC PUSH + C:0C59H LINE# 621 + C:0C59H LINE# 622 + ------- ENDPROC PUSH + ------- PROC POP + C:0C5AH LINE# 625 + C:0C5AH LINE# 626 + ------- ENDPROC POP + ------- PROC MUL + C:0C5BH LINE# 629 + C:0C5BH LINE# 630 + ------- ENDPROC MUL + ------- PROC DIV + C:0C5CH LINE# 633 + C:0C5CH LINE# 634 + ------- ENDPROC DIV + ------- PROC DA + C:0C5DH LINE# 637 + C:0C5DH LINE# 638 + ------- ENDPROC DA + ------- PROC IN + C:0C5EH LINE# 641 + C:0C5EH LINE# 642 + ------- ENDPROC IN + ------- PROC OUT + BL51 BANKED LINKER/LOCATER V6.22 04/15/2014 15:32:12 PAGE 21 + + + C:0C5FH LINE# 645 + C:0C5FH LINE# 646 + ------- ENDPROC OUT + ------- PROC INT + C:0C60H LINE# 649 + C:0C60H LINE# 650 + ------- ENDPROC INT + ------- PROC HLT + C:0C61H LINE# 654 + C:0C61H LINE# 655 + ------- ENDPROC HLT + ------- ENDMOD ISET + + ------- MODULE ?C?ICALL + C:0C30H PUBLIC ?C?ICALL + C:0C34H PUBLIC ?C?ICALL2 + ------- ENDMOD ?C?ICALL + + ------- MODULE PUTCHAR + C:0A09H PUBLIC _PUTCHAR + ------- ENDMOD PUTCHAR + + ------- MODULE GETCHAR + B:0020H.0 PUBLIC ?C?CHARLOADED + D:0008H PUBLIC ?_UNGETCHAR?BYTE + C:0C09H PUBLIC GETCHAR + ------- ENDMOD GETCHAR + + ------- MODULE _GETKEY + C:0C26H PUBLIC _GETKEY + ------- ENDMOD _GETKEY + +Program Size: data=39.1 xdata=32768 code=3170 +LINK/LOCATE RUN COMPLETE. 0 WARNING(S), 0 ERROR(S)
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--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/emu_MCS-51/emu.lnp Tue Apr 15 15:49:16 2014 +0100 @@ -0,0 +1,7 @@ +"STARTUP.obj", +"main.obj", +"mem.obj", +"iset.obj" +TO "emu" +RAMSIZE(256) +XDATA( 0X0000-0X7FFF )
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/emu_MCS-51/emu.plg Tue Apr 15 15:49:16 2014 +0100 @@ -0,0 +1,165 @@ +<html> +<body> +<pre> +<h1>µVision Build Log</h1> +<h2>Project:</h2> +C:\Documents and Settings\Administrator\My Documents\ede\emu_MCS-51\emu.uvproj +Project File Date: 04/15/2014 + +<h2>Output:</h2> +Build target 'Target 1' +assembling STARTUP.A51... +compiling iset.c... +SRC\ISET.C(443): error C249: 'DATA': SEGMENT TOO LARGE +compiling main.c... +SRC\MAIN.C(10): error C141: syntax error near '(' +SRC\MAIN.C(10): error C231: 'iset': redefinition +SRC\MAIN.C(49): error C129: missing ';' before '*' +compiling mem.c... +SRC\MEM.C(60): error C202: 'g1': undefined identifier +compiling test_mem.c... +SRC\TEST_MEM.C(11): error C141: syntax error near 'unsigned' +SRC\TEST_MEM.C(11): error C202: 'i': undefined identifier +SRC\TEST_MEM.C(12): error C202: 'i': undefined identifier +SRC\TEST_MEM.C(13): error C202: 'i': undefined identifier +SRC\TEST_MEM.C(21): error C202: 'i': undefined identifier +SRC\TEST_MEM.C(22): error C202: 'i': undefined identifier +SRC\TEST_MEM.C(25): error C202: 'i': undefined identifier +SRC\TEST_MEM.C(26): error C202: 'i': undefined identifier +SRC\TEST_MEM.C(41): error C202: 'i': undefined identifier +SRC\TEST_MEM.C(42): error C202: 'i': undefined identifier +SRC\TEST_MEM.C(45): error C141: syntax error near 'unsigned' +SRC\TEST_MEM.C(45): error C202: 'data_pointer': undefined identifier +SRC\TEST_MEM.C(46): error C141: syntax error near 'unsigned' +SRC\TEST_MEM.C(46): error C202: 'program_counter': undefined identifier +SRC\TEST_MEM.C(47): error C141: syntax error near 'unsigned' +SRC\TEST_MEM.C(47): error C202: 'stack_pointer': undefined identifier +SRC\TEST_MEM.C(48): error C141: syntax error near 'unsigned' +SRC\TEST_MEM.C(48): error C202: 'temp': undefined identifier +SRC\TEST_MEM.C(50): error C202: 'data_pointer': undefined identifier +SRC\TEST_MEM.C(51): error C202: 'data_pointer': undefined identifier +SRC\TEST_MEM.C(52): error C202: 'program_counter': undefined identifier +SRC\TEST_MEM.C(53): error C202: 'program_counter': undefined identifier +SRC\TEST_MEM.C(54): error C202: 'stack_pointer': undefined identifier +SRC\TEST_MEM.C(55): error C202: 'stack_pointer': undefined identifier +SRC\TEST_MEM.C(56): error C202: 'temp': undefined identifier +SRC\TEST_MEM.C(57): error C202: 'temp': undefined identifier +SRC\TEST_MEM.C(60): error C141: syntax error near 'int' +SRC\TEST_MEM.C(60): error C202: 'ac': undefined identifier +SRC\TEST_MEM.C(61): error C202: 'ac': undefined identifier +SRC\TEST_MEM.C(62): error C202: 'ac': undefined identifier +SRC\TEST_MEM.C(64): error C202: 'ac': undefined identifier +Target not created +Build target 'Target 1' +assembling STARTUP.A51... +compiling iset.c... +compiling main.c... +SRC\MAIN.C(49): error C129: missing ';' before '*' +compiling mem.c... +Target not created +Build target 'Target 1' +assembling STARTUP.A51... +compiling iset.c... +compiling main.c... +SRC\MAIN.C(177): error C249: 'DATA': SEGMENT TOO LARGE +compiling mem.c... +Target not created +Build target 'Target 1' +assembling STARTUP.A51... +compiling iset.c... +compiling main.c... +SRC\MAIN.C(10): error C141: syntax error near '(' +SRC\MAIN.C(10): error C231: 'iset': redefinition +compiling mem.c... +Target not created +Build target 'Target 1' +assembling STARTUP.A51... +compiling iset.c... +compiling main.c... +SRC\MAIN.C(10): error C141: syntax error near '(' +SRC\MAIN.C(10): error C231: 'iset': redefinition +compiling mem.c... +Target not created +Build target 'Target 1' +assembling STARTUP.A51... +compiling iset.c... +compiling main.c... +SRC\MAIN.C(63): error C141: syntax error near '}' +compiling mem.c... +Target not created +Build target 'Target 1' +assembling STARTUP.A51... +compiling iset.c... +compiling main.c... +compiling mem.c... +linking... +Program Size: data=55.1 xdata=0 code=2258 +"emu" - 0 Error(s), 0 Warning(s). +Build target 'Target 1' +assembling STARTUP.A51... +compiling iset.c... +compiling main.c... +compiling mem.c... +linking... +Program Size: data=39.1 xdata=32768 code=2345 +creating hex file from "emu"... +"emu" - 0 Error(s), 0 Warning(s). +Build target 'Target 1' +assembling STARTUP.A51... +compiling iset.c... +SRC\MEM.H(83): warning C219: long constant truncated +SRC\MEM.H(83): error C136: invalid dimension size: [0] +compiling main.c... +SRC\MEM.H(83): warning C219: long constant truncated +SRC\MEM.H(83): error C136: invalid dimension size: [0] +SRC\MAIN.C(62): error C211: call not to a function +compiling mem.c... +SRC\MEM.H(83): warning C219: long constant truncated +SRC\MEM.H(83): error C136: invalid dimension size: [0] +SRC\MEM.C(68): error C187: not an lvalue +Target not created +Build target 'Target 1' +assembling STARTUP.A51... +compiling iset.c... +compiling main.c... +SRC\MAIN.C(179): error C249: 'DATA': SEGMENT TOO LARGE +compiling mem.c... +Target not created +Build target 'Target 1' +assembling STARTUP.A51... +compiling iset.c... +compiling main.c... +compiling mem.c... +linking... +*** WARNING L16: UNCALLED SEGMENT, IGNORED FOR OVERLAY PROCESS + SEGMENT: ?PR?_SET_ZP?MEM +Program Size: data=39.1 xdata=32768 code=2396 +creating hex file from "emu"... +"emu" - 0 Error(s), 1 Warning(s). +Build target 'Target 1' +assembling STARTUP.A51... +compiling main.c... +compiling mem.c... +compiling iset.c... +linking... +Program Size: data=39.1 xdata=32768 code=3157 +creating hex file from "emu"... +"emu" - 0 Error(s), 0 Warning(s). +Build target 'Target 1' +assembling STARTUP.A51... +compiling main.c... +compiling mem.c... +compiling iset.c... +linking... +Program Size: data=39.1 xdata=32768 code=3170 +creating hex file from "emu"... +"emu" - 0 Error(s), 0 Warning(s). +Build target 'Target 1' +assembling STARTUP.A51... +compiling main.c... +compiling mem.c... +compiling iset.c... +linking... +Program Size: data=39.1 xdata=32768 code=3170 +creating hex file from "emu"... +"emu" - 0 Error(s), 0 Warning(s).
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/emu_MCS-51/emu.uvopt Tue Apr 15 15:49:16 2014 +0100 @@ -0,0 +1,2827 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Extensions> + <cExt>*.c</cExt> + <aExt>*.s*; *.src; *.a*</aExt> + <oExt>*.obj</oExt> + <lExt>*.lib</lExt> + <tExt>*.txt; *.h; *.inc</tExt> + <pExt>*.plm</pExt> + <CppX>*.cpp</CppX> + </Extensions> + + <DaveTm> + <dwLowDateTime>0</dwLowDateTime> + <dwHighDateTime>0</dwHighDateTime> + </DaveTm> + + <Target> + <TargetName>Target 1</TargetName> + <ToolsetNumber>0x0</ToolsetNumber> + <ToolsetName>MCS-51</ToolsetName> + <TargetOption> + <CLK51>12000000</CLK51> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>1</RunSim> + <RunTarget>0</RunTarget> + </OPTTT> + <OPTHX> + <HexSelection>0</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>120</PageWidth> + <PageLength>65</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + 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--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/emu_MCS-51/emu.uvproj Tue Apr 15 15:49:16 2014 +0100 @@ -0,0 +1,380 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>Target 1</TargetName> + <ToolsetNumber>0x0</ToolsetNumber> + <ToolsetName>MCS-51</ToolsetName> + <TargetOption> + <TargetCommonOption> + <Device>AT89S52</Device> + <Vendor>Atmel</Vendor> + <Cpu>IRAM(0-0xFF) IROM(0-0x1FFF) CLOCK(33000000) MODAT2</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile>"LIB\STARTUP.A51" ("Standard 8051 Startup Code")</StartupFile> + <FlashDriverDll></FlashDriverDll> + <DeviceId>3411</DeviceId> + <RegisterFile>REGX51.H</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + 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<UseSimulator>1</UseSimulator> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>1</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <LimitSpeedToRealTime>0</LimitSpeedToRealTime> + </Simulator> + <Target> + <UseTarget>0</UseTarget> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>0</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>0</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + </Target> + <RunDebugAfterBuild>0</RunDebugAfterBuild> + <TargetSelection>-1</TargetSelection> + <SimDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + </SimDlls> + <TargetDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + <Driver></Driver> + </TargetDlls> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>0</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging> + <Capability>0</Capability> + <DriverSelection>-1</DriverSelection> + </Flash1> + <Flash2></Flash2> + <Flash3></Flash3> + <Flash4></Flash4> + </Utilities> + <Target51> + <Target51Misc> + <MemoryModel>0</MemoryModel> + <RTOS>0</RTOS> + <RomSize>2</RomSize> + <DataHold>0</DataHold> + <XDataHold>0</XDataHold> + <UseOnchipRom>0</UseOnchipRom> + <UseOnchipArithmetic>0</UseOnchipArithmetic> + <UseMultipleDPTR>0</UseMultipleDPTR> + <UseOnchipXram>0</UseOnchipXram> + <HadIRAM>1</HadIRAM> + <HadXRAM>0</HadXRAM> + <HadIROM>1</HadIROM> + <Moda2>0</Moda2> + <Moddp2>0</Moddp2> + <Modp2>0</Modp2> + <Mod517dp>0</Mod517dp> + <Mod517au>0</Mod517au> + <Mode2>0</Mode2> + <useCB>0</useCB> + <useXB>0</useXB> + <useL251>0</useL251> + <useA251>0</useA251> + <Mx51>0</Mx51> + <ModC812>0</ModC812> + <ModCont>0</ModCont> + <Lp51>0</Lp51> + <useXBS>0</useXBS> + <ModDA>0</ModDA> + <ModAB2>0</ModAB2> + <Mx51P>0</Mx51P> + <hadXRAM2>0</hadXRAM2> + <uocXram2>0</uocXram2> + <ModC2>0</ModC2> + <ModH2>0</ModH2> + <Mdu_R515>0</Mdu_R515> + <Mdu_F120>0</Mdu_F120> + <Psoc>0</Psoc> + <hadIROM2>0</hadIROM2> + <ModSmx2>0</ModSmx2> + <cBanks>0</cBanks> + <xBanks>0</xBanks> + <OnChipMemories> + <RCB> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x10000</Size> + </RCB> + <RXB> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </RXB> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocr1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x8000</Size> + </Ocr1> + <Ocr2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocr2> + <Ocr3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocr3> + <IRO> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x2000</Size> + </IRO> + <IRA> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x100</Size> + </IRA> + <XRA> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRA> + <XRA512> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRA512> + <IROM512> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </IROM512> + </OnChipMemories> + </Target51Misc> + <C51> + <RegisterColoring>0</RegisterColoring> + <VariablesInOrder>0</VariablesInOrder> + <IntegerPromotion>1</IntegerPromotion> + <uAregs>0</uAregs> + <UseInterruptVector>1</UseInterruptVector> + <Fuzzy>3</Fuzzy> + <Optimize>8</Optimize> + <WarningLevel>2</WarningLevel> + <SizeSpeed>1</SizeSpeed> + <ObjectExtend>1</ObjectExtend> + <ACallAJmp>0</ACallAJmp> + <InterruptVectorAddress>0</InterruptVectorAddress> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </C51> + <Ax51> + <UseMpl>0</UseMpl> + <UseStandard>1</UseStandard> + <UseCase>0</UseCase> + <UseMod51>0</UseMod51> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Ax51> + <Lx51> + <useFile>0</useFile> + <linkonly>0</linkonly> + <UseMemoryFromTarget>0</UseMemoryFromTarget> + <CaseSensitiveSymbols>0</CaseSensitiveSymbols> + <WarningLevel>2</WarningLevel> + <DataOverlaying>1</DataOverlaying> + <OverlayString></OverlayString> + <MiscControls></MiscControls> + <DisableWarningNumbers></DisableWarningNumbers> + <LinkerCmdFile></LinkerCmdFile> + <Assign></Assign> + <ReserveString></ReserveString> + <CClasses></CClasses> + <UserClasses></UserClasses> + <CSection></CSection> + <UserSection></UserSection> + <CodeBaseAddress></CodeBaseAddress> + <XDataBaseAddress>0X0000-0X7FFF</XDataBaseAddress> + <PDataBaseAddress></PDataBaseAddress> + <BitBaseAddress></BitBaseAddress> + <DataBaseAddress></DataBaseAddress> + <IDataBaseAddress></IDataBaseAddress> + <Precede></Precede> + <Stack></Stack> + <CodeSegmentName></CodeSegmentName> + <XDataSegmentName></XDataSegmentName> + <BitSegmentName></BitSegmentName> + <DataSegmentName></DataSegmentName> + <IDataSegmentName></IDataSegmentName> + </Lx51> + </Target51> + </TargetOption> + <Groups> + <Group> + <GroupName>Source Group 1</GroupName> + <Files> + <File> + <FileName>STARTUP.A51</FileName> + <FileType>2</FileType> + <FilePath>.\STARTUP.A51</FilePath> + </File> + <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>.\src\main.c</FilePath> + </File> + <File> + <FileName>mem.h</FileName> + <FileType>5</FileType> + <FilePath>.\src\mem.h</FilePath> + </File> + <File> + <FileName>mem.c</FileName> + <FileType>1</FileType> + <FilePath>.\src\mem.c</FilePath> + </File> + <File> + <FileName>iset.c</FileName> + <FileType>1</FileType> + <FilePath>.\src\iset.c</FilePath> + </File> + </Files> + </Group> + </Groups> + </Target> + </Targets> + +</Project>
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/emu_MCS-51/emu_uvopt.bak Tue Apr 15 15:49:16 2014 +0100 @@ -0,0 +1,1527 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Extensions> + <cExt>*.c</cExt> + <aExt>*.s*; *.src; *.a*</aExt> + <oExt>*.obj</oExt> + <lExt>*.lib</lExt> + <tExt>*.txt; *.h; *.inc</tExt> + <pExt>*.plm</pExt> + <CppX>*.cpp</CppX> + </Extensions> + + <DaveTm> + <dwLowDateTime>0</dwLowDateTime> + <dwHighDateTime>0</dwHighDateTime> + </DaveTm> + + <Target> + <TargetName>Target 1</TargetName> + <ToolsetNumber>0x0</ToolsetNumber> + <ToolsetName>MCS-51</ToolsetName> + <TargetOption> + <CLK51>12000000</CLK51> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>1</RunSim> + <RunTarget>0</RunTarget> + </OPTTT> + <OPTHX> + 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+ </OrigResetItems> + </ToolBar> + <ControlBarsSummary> + <Bars>0</Bars> + <ScreenCX>1280</ScreenCX> + <ScreenCY>1024</ScreenCY> + </ControlBarsSummary> + </ViewEx> + </WinLayoutEx> + + <MDIGroups> + <Orientation>1</Orientation> + <ActiveMDIGroup>0</ActiveMDIGroup> + <MDIGroup> + <Size>100</Size> + <ActiveTab>2</ActiveTab> + <Documents> + <Doc> + <Name>.\src\main.c</Name> + <ColumnNumber>19</ColumnNumber> + <TopLine>1</TopLine> + <CurrentLine>1</CurrentLine> + </Doc> + <Doc> + <Name>.\src\mem.c</Name> + <ColumnNumber>63</ColumnNumber> + <TopLine>43</TopLine> + <CurrentLine>44</CurrentLine> + </Doc> + <Doc> + <Name>SRC\MEM.H</Name> + <ColumnNumber>17</ColumnNumber> + <TopLine>61</TopLine> + <CurrentLine>83</CurrentLine> + </Doc> + <Doc> + <Name>.\src\iset.c</Name> + <ColumnNumber>18</ColumnNumber> + <TopLine>1</TopLine> + <CurrentLine>2</CurrentLine> + </Doc> + <Doc> + <Name>SRC\ISET.H</Name> + <ColumnNumber>14</ColumnNumber> + <TopLine>1</TopLine> + <CurrentLine>16</CurrentLine> + </Doc> + </Documents> + </MDIGroup> + </MDIGroups> + +</ProjectOpt>
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/emu_MCS-51/emu_uvproj.bak Tue Apr 15 15:49:16 2014 +0100 @@ -0,0 +1,385 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>Target 1</TargetName> + <ToolsetNumber>0x0</ToolsetNumber> + <ToolsetName>MCS-51</ToolsetName> + <TargetOption> + <TargetCommonOption> + <Device>AT89S52</Device> + <Vendor>Atmel</Vendor> + <Cpu>IRAM(0-0xFF) IROM(0-0x1FFF) CLOCK(33000000) MODAT2</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile>"LIB\STARTUP.A51" ("Standard 8051 Startup Code")</StartupFile> + <FlashDriverDll></FlashDriverDll> + <DeviceId>3411</DeviceId> + <RegisterFile>REGX51.H</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath>Atmel\</RegisterFilePath> + <DBRegisterFilePath>Atmel\</DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\</OutputDirectory> + <OutputName>emu</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>1</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>1</BrowseInformation> + <ListingPath>.\</ListingPath> + <HexFormatSelection>0</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </BeforeMake> + <AfterMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + <BankNo>65535</BankNo> + </CommonProperty> + <DllOption> + <SimDllName>S8051.DLL</SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDll>DP51.DLL</SimDlgDll> + <SimDlgDllArguments>-pAT52</SimDlgDllArguments> + <TargetDllName>S8051.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDll>TP51.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pAT52</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>0</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + <Simulator> + <UseSimulator>1</UseSimulator> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>1</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <LimitSpeedToRealTime>0</LimitSpeedToRealTime> + </Simulator> + <Target> + <UseTarget>0</UseTarget> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>0</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>0</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + </Target> + <RunDebugAfterBuild>0</RunDebugAfterBuild> + <TargetSelection>-1</TargetSelection> + <SimDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + </SimDlls> + <TargetDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + <Driver></Driver> + </TargetDlls> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>0</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging> + <Capability>0</Capability> + <DriverSelection>-1</DriverSelection> + </Flash1> + <Flash2></Flash2> + <Flash3></Flash3> + <Flash4></Flash4> + </Utilities> + <Target51> + <Target51Misc> + <MemoryModel>0</MemoryModel> + <RTOS>0</RTOS> + <RomSize>2</RomSize> + <DataHold>0</DataHold> + <XDataHold>0</XDataHold> + <UseOnchipRom>0</UseOnchipRom> + <UseOnchipArithmetic>0</UseOnchipArithmetic> + <UseMultipleDPTR>0</UseMultipleDPTR> + <UseOnchipXram>0</UseOnchipXram> + <HadIRAM>1</HadIRAM> + <HadXRAM>0</HadXRAM> + <HadIROM>1</HadIROM> + <Moda2>0</Moda2> + <Moddp2>0</Moddp2> + <Modp2>0</Modp2> + <Mod517dp>0</Mod517dp> + <Mod517au>0</Mod517au> + <Mode2>0</Mode2> + <useCB>0</useCB> + <useXB>0</useXB> + <useL251>0</useL251> + <useA251>0</useA251> + <Mx51>0</Mx51> + <ModC812>0</ModC812> + <ModCont>0</ModCont> + <Lp51>0</Lp51> + <useXBS>0</useXBS> + <ModDA>0</ModDA> + <ModAB2>0</ModAB2> + <Mx51P>0</Mx51P> + <hadXRAM2>0</hadXRAM2> + <uocXram2>0</uocXram2> + <ModC2>0</ModC2> + <ModH2>0</ModH2> + <Mdu_R515>0</Mdu_R515> + <Mdu_F120>0</Mdu_F120> + <Psoc>0</Psoc> + <hadIROM2>0</hadIROM2> + <ModSmx2>0</ModSmx2> + <cBanks>0</cBanks> + <xBanks>0</xBanks> + <OnChipMemories> + <RCB> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x10000</Size> + </RCB> + <RXB> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </RXB> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocr1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x8000</Size> + </Ocr1> + <Ocr2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocr2> + <Ocr3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocr3> + <IRO> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x2000</Size> + </IRO> + <IRA> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x100</Size> + </IRA> + <XRA> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRA> + <XRA512> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRA512> + <IROM512> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </IROM512> + </OnChipMemories> + </Target51Misc> + <C51> + <RegisterColoring>0</RegisterColoring> + <VariablesInOrder>0</VariablesInOrder> + <IntegerPromotion>1</IntegerPromotion> + <uAregs>0</uAregs> + <UseInterruptVector>1</UseInterruptVector> + <Fuzzy>3</Fuzzy> + <Optimize>8</Optimize> + <WarningLevel>2</WarningLevel> + <SizeSpeed>1</SizeSpeed> + <ObjectExtend>1</ObjectExtend> + <ACallAJmp>0</ACallAJmp> + <InterruptVectorAddress>0</InterruptVectorAddress> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </C51> + <Ax51> + <UseMpl>0</UseMpl> + <UseStandard>1</UseStandard> + <UseCase>0</UseCase> + <UseMod51>0</UseMod51> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Ax51> + <Lx51> + <useFile>0</useFile> + <linkonly>0</linkonly> + <UseMemoryFromTarget>0</UseMemoryFromTarget> + <CaseSensitiveSymbols>0</CaseSensitiveSymbols> + <WarningLevel>2</WarningLevel> + <DataOverlaying>1</DataOverlaying> + <OverlayString></OverlayString> + <MiscControls></MiscControls> + <DisableWarningNumbers></DisableWarningNumbers> + <LinkerCmdFile></LinkerCmdFile> + <Assign></Assign> + <ReserveString></ReserveString> + <CClasses></CClasses> + <UserClasses></UserClasses> + <CSection></CSection> + <UserSection></UserSection> + <CodeBaseAddress></CodeBaseAddress> + <XDataBaseAddress>0X0000-0X7FFF</XDataBaseAddress> + <PDataBaseAddress></PDataBaseAddress> + <BitBaseAddress></BitBaseAddress> + <DataBaseAddress></DataBaseAddress> + <IDataBaseAddress></IDataBaseAddress> + <Precede></Precede> + <Stack></Stack> + <CodeSegmentName></CodeSegmentName> + <XDataSegmentName></XDataSegmentName> + <BitSegmentName></BitSegmentName> + <DataSegmentName></DataSegmentName> + <IDataSegmentName></IDataSegmentName> + </Lx51> + </Target51> + </TargetOption> + <Groups> + <Group> + <GroupName>Source Group 1</GroupName> + <Files> + <File> + <FileName>STARTUP.A51</FileName> + <FileType>2</FileType> + <FilePath>.\STARTUP.A51</FilePath> + </File> + <File> + <FileName>iset.c</FileName> + <FileType>1</FileType> + <FilePath>.\src\iset.c</FilePath> + </File> + <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>.\src\main.c</FilePath> + </File> + <File> + <FileName>mem.c</FileName> + <FileType>1</FileType> + <FilePath>.\src\mem.c</FilePath> + </File> + <File> + <FileName>iset.h</FileName> + <FileType>5</FileType> + <FilePath>.\src\iset.h</FilePath> + </File> + <File> + <FileName>mem.h</FileName> + <FileType>5</FileType> + <FilePath>.\src\mem.h</FilePath> + </File> + </Files> + </Group> + </Groups> + </Target> + </Targets> + +</Project>
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/emu_MCS-51/iset.c Tue Apr 15 15:49:16 2014 +0100 @@ -0,0 +1,655 @@ +/* iset.c + * IR functions */ +#include <stdlib.h> +#include "iset.h" +#include "mem.h" + +/* useful macros */ +#define NNN (IR & 0x07) +#define MMM ((IR & 0x38) >> 3) + +/* 0x00 - NOP */ +void +NOP(void) { +} + +/* 0x08 - SET C + * 0x0A - SET BS + * 0x0C - SET IE */ +void +SET(void) { + switch (IR) { + + case 0x08: + set_flag(C, 0x01); + break; + + case 0x0A: + set_flag(BS, 0x01); + break; + + case 0x0C: + set_flag(IE, 0x01); + break; + + default: + break; + } +} + +/* 0x09 - CLR C + * 0x0B - CLR BS + * 0x0D - CLR IE */ +void +CLR(void) { + switch (IR) { + + case 0x09: + set_flag(C, 0x00); + break; + + case 0x0B: + set_flag(BS, 0x00); + break; + + case 0x0D: + set_flag(IE, 0x00); + break; + + default: + break; + } +} + +/* 0x0E - CPL C + * 0x0F - CPL A */ +void +CPL(void) { + switch (IR) { + + case 0x0E: + if (get_flag(C) == 0) { + set_flag(C, 0x01); + } + else { + set_flag(C, 0x00); + } + + case 0x0F: + A = ~A; + break; + + default: + break; + } +} + +/* 0x10 - XCSD */ +void +XCSD(void) { + tmpw = get_wide(SP); + set_wide(SP, get_wide(DPTR)); + set_wide(DPTR, tmpw); +} + +/* 0x11 - SFA */ +void +SFA(void) { + A = flags; +} + +/* 0x12 - LAF */ +void +LAF(void) { + flags = A; +} + +/* 0b00010XXX - special MOVs + * 0b00011XXX - direct, indirect and indexed MOVs + * 0b00100nnn - register-indirect MOVs - MOV @DPTR, Rn + * 0b00101nnn - immediate movs - MOV Rn, #data8 + * 0b00110nnn - MOV Rn, A + * 0b00111nnn - MOV A, Rn + * 0b01mmmnnn - 64 register move instructions + * + * this is a mess */ +void +MOV(void) { + switch (IR & 0x40) { + + case 0x00: + switch (IR & 0xF8) { + + /* 0b00010XXX - special MOVs*/ + case 0x10: + switch (NNN) { + + /* MOV DPTR, SP */ + case 3: + set_wide(DPTR, get_wide(SP)); + break; + + /* MOV SP, DPTR */ + case 4: + set_wide(SP, get_wide(DPTR)); + break; + + /* MOV A, #data8 */ + case 5: + A = fetch(); + break; + + /* MOV SP, #data16 */ + case 6: + set_wide(SP, fetch_wide()); + break; + + /* MOV DPTR, #data16 */ + case 7: + set_wide(DPTR, fetch_wide()); + break; + + default: + break; + } + break; + + /* 0b00011XXX - direct, indirect and indexed MOVs*/ + case 0x18: + switch (NNN) { + + /* MOV A, addr16 */ + case 0: + set_wide(TMP, fetch_wide()); + A = mem[get_wide(TMP)]; + break; + + /* MOV addr16, A */ + case 1: + set_wide(TMP, fetch_wide()); + mem[get_wide(TMP)] = A; + break; + + /* MOV A, @A+DPTR */ + case 2: + set_wide(TMP, A + get_wide(DPTR)); + A = mem[get_wide(TMP)]; + break; + + /* MOV A, @A+PC */ + case 3: + set_wide(TMP, A + get_wide(PC)); + A = mem[TMP]; + break; + + /* MOV A, @addr16 */ + case 4: + set_wide(TMP, fetch_wide()); + A = mem[mem[get_wide(TMP)]]; + break; + + /* MOV @addr16, A */ + case 5: + set_wide(TMP, fetch_wide()); + mem[mem[get_wide(TMP)]] = A; + break; + + /* MOV A, @DPTR */ + case 6: + set_wide(TMP, get_wide(DPTR)); + A = mem[get_wide(TMP)]; + break; + + /* MOV @DPTR, A */ + case 7: + set_wide(TMP, get_wide(DPTR)); + mem[get_wide(TMP)] = A; + break; + + default: + break; + } + break; + + /* 0b00100nnn - MOV @DPTR, Rn*/ + case 0x20: + set_wide(TMP, get_wide(DPTR)); + mem[get_wide(TMP)] = get_reg(NNN); + break; + + /* 0b00101nnn - immediate movs - MOV Rn, #data8*/ + case 0x28: + set_reg(NNN, fetch()); + break; + + /* 0b00110nnn - MOV Rn, A */ + case 0x30: + set_reg(NNN, A); + break; + + /* 0b00111nnn MOV A, Rn */ + case 0x38: + A = get_reg(NNN); + break; + + default: + break; + } + break;; + + /* 0b01mmmnnn MOV Rm Rn + * if m == n: MOV Rm, @DPTR */ + case 0x40: + if (NNN == MMM) { + set_wide(TMP, get_wide(DPTR)); + set_reg(NNN, mem[get_wide(TMP)]); + } + else { + set_reg(MMM, get_reg(NNN)); + } + break; + + default: + break; + } +} + + +/* 0x80 - ANL A, R0 + * 0x81 - ANL A, R1 + * 0x82 - ANL A, R2 + * 0x83 - ANL A, R3 + * 0x84 - ANL A, DPH + * 0x85 - ANL A, DPL + * 0x86 - ANL A, #data8 + * 0x87 - ANL A, @DPTR */ +void +ANL(void) { + if (NNN < 6) { + A = A & get_reg(NNN); + } + else { + switch (NNN) { + + case 6: + A = A & fetch(); + break; + + case 7: + set_wide(TMP, get_wide(DPTR)); + A = A & mem[TMP]; + break; + } + } + set_zp(A); +} + +/* 0x88 - ORL A, R0 + * 0x89 - ORL A, R1 + * 0x8A - ORL A, R2 + * 0x8B - ORL A, R3 + * 0x8C - ORL A, DPH + * 0x8D - ORL A, DPL + * 0x8E - ORL A, #data8 + * 0x8F - ORL A, @DPTR */ +void +ORL(void) { + if (NNN < 6) { + A = A | get_reg(NNN); + } + else { + switch (NNN) { + + case 6: + A = A | fetch(); + break; + + case 7: + set_wide(TMP, get_wide(DPTR)); + A = A | mem[TMP]; + break; + } + } + set_zp(A); +} + +/* 0x90 - XRL A, R0 + * 0x91 - XRL A, R1 + * 0x92 - XRL A, R2 + * 0x93 - XRL A, R3 + * 0x94 - XRL A, DPH + * 0x95 - XRL A, DPL + * 0x96 - XRL A, #data8 + * 0x97 - XRL A, @DPTR */ +void +XRL(void) { + if (NNN < 6) { + A = A ^ get_reg(NNN); + } + else { + switch (NNN) { + + case 6: + A = A ^ fetch(); + break; + + case 7: + set_wide(TMP, get_wide(DPTR)); + A = A ^ mem[TMP]; + break; + } + } + set_zp(A); +} + +/* 0x98 - RL A */ +void +RL(void) { + A = (A << 1) | (A >> 7); +} + +/* 0x99 - RLC A */ +void +RLC(void) { + tmpb = A; + A = (A << 1) | get_flag(C); + set_flag(C, tmpb >> 7); +} + +/* 0x9A - RR A */ +void +RR(void) { + A = (A >> 1) | (A << 7); +} + +/* 0x9B - RRC A */ +void +RRC(void) { + tmpb = A; + A = (A >> 1) | (get_flag(C) << 7); + set_flag(C, tmpb & 0x01); +} + +/* 0x9C - INC DPTR + * 0x9E - INC A */ +void +INC(void) { + switch (IR) { + + case 0x9C: + tmpw = get_wide(DPTR); + if ((tmpw + 1) > 0xFFFF) { + set_flag(OV, 1); + } + set_wide(DPTR, tmpw + 1); + set_zp(DPL); + set_zp(DPH); + break; + + case 0x9E: + if ((A + 1) > 0xFF) { + set_flag(OV, 1); + } + A++; + set_zp(A); + + } +} + +/* 0x9D - DEC DPTR + * 0x9F - DEC A */ +void +DEC(void) { + switch (IR) { + + case 0x9D: + tmpw = get_wide(DPTR); + if ((tmpw - 1) < 0) { + set_flag(OV, 1); + } + set_wide(DPTR, tmpw - 1); + set_zp(DPL); + set_zp(DPH); + + case 0x9F: + if ((A - 1) < 0) { + set_flag(OV, 1); + } + A--; + set_zp(A); + } +} + +/* 0xA0 - ADD A, R0 + * 0xA1 - ADD A, R1 + * 0xA2 - ADD A, R2 + * 0xA3 - ADD A, R3 + * 0xA4 - ADD A, DPH + * 0xA5 - ADD A, DPL + * 0xA6 - ADD A, #data8 + * 0xA7 - ADD A, @DPTR */ +void +ADD(void) { + if (NNN < 6) { + if ((A + get_reg(NNN)) > 0xFF) { + set_flag(OV, 1); + } + else { + set_flag(OV, 0); + } + A = A + get_reg(NNN); + set_zp(A); + } + else { + switch (NNN) { + + case 6: + tmpb = fetch(); + if ((A + tmpb) > 0xFF) { + set_flag(OV, 1); + } + else { + set_flag(OV, 0); + } + A = A + tmpb; + set_zp(A); + break; + + case 7: + set_wide(TMP, get_wide(DPTR)); + if ((A + mem[TMP]) > 0xFF) { + set_flag(OV, 1); + } + else { + set_flag(OV, 0); + } + A = A + mem[TMP]; + set_zp(A); + break; + } + } + +} + +void +ADDC(void) { +/* implement me */ +} + +/* 0xB0 - SUB A, R0 + * 0xB1 - SUB A, R1 + * 0xB2 - SUB A, R2 + * 0xB3 - SUB A, R3 + * 0xB4 - SUB A, DPH + * 0xB5 - SUB A, DPL + * 0xB6 - SUB A, #data8 + * 0xB7 - SUB A, @DPTR */ +void +SUB(void) { + if (NNN < 6) { + if ((A - get_reg(NNN)) < 0){ + set_flag(OV, 1); + } + else { + set_flag(OV, 0); + } + A = A - get_reg(NNN); + set_zp(A); + } + else { + switch (NNN) { + + case 6: + tmpb = fetch(); + if ((A - tmpb) < 0) { + set_flag(OV, 1); + } + else { + set_flag(OV, 0); + } + A = A - tmpb; + set_zp(A); + break; + + case 7: + set_wide(TMP, get_wide(DPTR)); + if ((A - mem[TMP]) < 0) { + set_flag(OV, 1); + } + else { + set_flag(OV, 0); + } + A = A - mem[TMP]; + set_zp(A); + break; + } + } +} + +void +SUBB(void) { + /* implement me */ +} + +void +PJMP(void) { + /* implement me */ +} + +void +PCALL(void) { + /* implement me */ +} + +/* 0xD0 - DJNZ R0, rel8 + * 0xD1 - DJNZ R1, rel8 + * 0xD2 - DJNZ R2, rel8 + * 0xD3 - DJNZ R3, rel8 */ +void +DJNZ(void) { +} + +void +CJNE(void) { +} + +/* 0xD8 - LJMP addr16 */ +void +LJMP(void) { +} + +void +LCALL(void) { + /* implement me */ +} + +void +RET(void) { + /* implement me */ +} + +void +RETI(void) { + /* implement me */ +} + +/* 0xDC - SJMP rel8 */ +void +SJMP(void) { + set_wide(PC, get_wide(PC) + (signed char)fetch()); +} + +/* 0xDD - JMP @A+DPTR + * 0xDE - JMP @DPTR */ +void +JMP(void) { +} + +void +JZ(void) { +} + +void +JNZ(void) { +} + +void +JC(void) { +} + +void +JNC(void) { +} + +void +JPO(void) { +} + +void +JPE(void) { +} + +void +JS(void) { +} + +void +JNS(void) { +} + +void +PUSH(void) { +} + +void +POP(void) { +} + +void +MUL(void) { +} + +void +DIV(void) { +} + +void +DA(void) { +} + +void +IN(void) { +} + +void +OUT(void) { +} + +void +INT(void) { +} + +/* 0xFF - HLT */ +void +HLT(void) { +}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/emu_MCS-51/iset.h Tue Apr 15 15:49:16 2014 +0100 @@ -0,0 +1,164 @@ +/* iset.h + * op function definitions */ +#ifndef ISET_H +#define ISET_H + + +#if defined MAIN +#define EXTERN +#else +#define EXTERN extern +#endif + + +/* instruction pointer table */ +typedef struct { + void (*ops[256])(void); +} FUNCTION_TABLE; + +EXTERN void +JNS(void); + +EXTERN void +LJMP(void); + +EXTERN void +SET(void); + +EXTERN void +JPO(void); + +EXTERN void +ANL(void); + +EXTERN void +JNZ(void); + +EXTERN void +HLT(void); + +EXTERN void +RRC(void); + +EXTERN void +POP(void); + +EXTERN void +JNC(void); + +EXTERN void +SUBB(void); + +EXTERN void +PCALL(void); + +EXTERN void +IN(void); + +EXTERN void +INC(void); + +EXTERN void +XRL(void); + +EXTERN void +SUB(void); + +EXTERN void +RR(void); + +EXTERN void +SJMP(void); + +EXTERN void +RETI(void); + +EXTERN void +RET(void); + +EXTERN void +INT(void); + +EXTERN void +ADD(void); + +EXTERN void +ADDC(void); + +EXTERN void +RL(void); + +EXTERN void +MUL(void); + +EXTERN void +JC(void); + +EXTERN void +JMP(void); + +EXTERN void +DJNZ(void); + +EXTERN void +CLR(void); + +EXTERN void +JZ(void); + +EXTERN void +JPE(void); + +EXTERN void +LAF(void); + +EXTERN void +MOV(void); + +EXTERN void +RLC(void); + +EXTERN void +JS(void); + +EXTERN void +ORL(void); + +EXTERN void +CJNE(void); + +EXTERN void +XCSD(void); + +EXTERN void +LCALL(void); + +EXTERN void +DA(void); + +EXTERN void +NOP(void); + +EXTERN void +SFA(void); + +EXTERN void +CPL(void); + +EXTERN void +PUSH(void); + +EXTERN void +DIV(void); + +EXTERN void +DEC(void); + +EXTERN void +OUT(void); + +EXTERN void +PJMP(void); + +#endif +
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/emu_MCS-51/iset.lst Tue Apr 15 15:49:16 2014 +0100 @@ -0,0 +1,698 @@ +C51 COMPILER V9.02 ISET 04/15/2014 15:32:11 PAGE 1 + + +C51 COMPILER V9.02, COMPILATION OF MODULE ISET +OBJECT MODULE PLACED IN iset.obj +COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE src\iset.c BROWSE DEBUG OBJECTEXTEND PRINT(.\iset.lst) OBJECT(iset.obj) + +line level source + + 1 /* iset.c + 2 * IR functions */ + 3 #include <stdlib.h> + 4 #include "iset.h" + 5 #include "mem.h" + 6 + 7 /* useful macros */ + 8 #define NNN (IR & 0x07) + 9 #define MMM ((IR & 0x38) >> 3) + 10 + 11 /* 0x00 - NOP */ + 12 void + 13 NOP(void) { + 14 1 } + 15 + 16 /* 0x08 - SET C + 17 * 0x0A - SET BS + 18 * 0x0C - SET IE */ + 19 void + 20 SET(void) { + 21 1 switch (IR) { + 22 2 + 23 2 case 0x08: + 24 2 set_flag(C, 0x01); + 25 2 break; + 26 2 + 27 2 case 0x0A: + 28 2 set_flag(BS, 0x01); + 29 2 break; + 30 2 + 31 2 case 0x0C: + 32 2 set_flag(IE, 0x01); + 33 2 break; + 34 2 + 35 2 default: + 36 2 break; + 37 2 } + 38 1 } + 39 + 40 /* 0x09 - CLR C + 41 * 0x0B - CLR BS + 42 * 0x0D - CLR IE */ + 43 void + 44 CLR(void) { + 45 1 switch (IR) { + 46 2 + 47 2 case 0x09: + 48 2 set_flag(C, 0x00); + 49 2 break; + 50 2 + 51 2 case 0x0B: + 52 2 set_flag(BS, 0x00); + 53 2 break; + 54 2 + 55 2 case 0x0D: + C51 COMPILER V9.02 ISET 04/15/2014 15:32:11 PAGE 2 + + 56 2 set_flag(IE, 0x00); + 57 2 break; + 58 2 + 59 2 default: + 60 2 break; + 61 2 } + 62 1 } + 63 + 64 /* 0x0E - CPL C + 65 * 0x0F - CPL A */ + 66 void + 67 CPL(void) { + 68 1 switch (IR) { + 69 2 + 70 2 case 0x0E: + 71 2 if (get_flag(C) == 0) { + 72 3 set_flag(C, 0x01); + 73 3 } + 74 2 else { + 75 3 set_flag(C, 0x00); + 76 3 } + 77 2 + 78 2 case 0x0F: + 79 2 A = ~A; + 80 2 break; + 81 2 + 82 2 default: + 83 2 break; + 84 2 } + 85 1 } + 86 + 87 /* 0x10 - XCSD */ + 88 void + 89 XCSD(void) { + 90 1 tmpw = get_wide(SP); + 91 1 set_wide(SP, get_wide(DPTR)); + 92 1 set_wide(DPTR, tmpw); + 93 1 } + 94 + 95 /* 0x11 - SFA */ + 96 void + 97 SFA(void) { + 98 1 A = flags; + 99 1 } + 100 + 101 /* 0x12 - LAF */ + 102 void + 103 LAF(void) { + 104 1 flags = A; + 105 1 } + 106 + 107 /* 0b00010XXX - special MOVs + 108 * 0b00011XXX - direct, indirect and indexed MOVs + 109 * 0b00100nnn - register-indirect MOVs - MOV @DPTR, Rn + 110 * 0b00101nnn - immediate movs - MOV Rn, #data8 + 111 * 0b00110nnn - MOV Rn, A + 112 * 0b00111nnn - MOV A, Rn + 113 * 0b01mmmnnn - 64 register move instructions + 114 * + 115 * this is a mess */ + 116 void + 117 MOV(void) { + C51 COMPILER V9.02 ISET 04/15/2014 15:32:11 PAGE 3 + + 118 1 switch (IR & 0x40) { + 119 2 + 120 2 case 0x00: + 121 2 switch (IR & 0xF8) { + 122 3 + 123 3 /* 0b00010XXX - special MOVs*/ + 124 3 case 0x10: + 125 3 switch (NNN) { + 126 4 + 127 4 /* MOV DPTR, SP */ + 128 4 case 3: + 129 4 set_wide(DPTR, get_wide(SP)); + 130 4 break; + 131 4 + 132 4 /* MOV SP, DPTR */ + 133 4 case 4: + 134 4 set_wide(SP, get_wide(DPTR)); + 135 4 break; + 136 4 + 137 4 /* MOV A, #data8 */ + 138 4 case 5: + 139 4 A = fetch(); + 140 4 break; + 141 4 + 142 4 /* MOV SP, #data16 */ + 143 4 case 6: + 144 4 set_wide(SP, fetch_wide()); + 145 4 break; + 146 4 + 147 4 /* MOV DPTR, #data16 */ + 148 4 case 7: + 149 4 set_wide(DPTR, fetch_wide()); + 150 4 break; + 151 4 + 152 4 default: + 153 4 break; + 154 4 } + 155 3 break; + 156 3 + 157 3 /* 0b00011XXX - direct, indirect and indexed MOVs*/ + 158 3 case 0x18: + 159 3 switch (NNN) { + 160 4 + 161 4 /* MOV A, addr16 */ + 162 4 case 0: + 163 4 set_wide(TMP, fetch_wide()); + 164 4 A = mem[get_wide(TMP)]; + 165 4 break; + 166 4 + 167 4 /* MOV addr16, A */ + 168 4 case 1: + 169 4 set_wide(TMP, fetch_wide()); + 170 4 mem[get_wide(TMP)] = A; + 171 4 break; + 172 4 + 173 4 /* MOV A, @A+DPTR */ + 174 4 case 2: + 175 4 set_wide(TMP, A + get_wide(DPTR)); + 176 4 A = mem[get_wide(TMP)]; + 177 4 break; + 178 4 + 179 4 /* MOV A, @A+PC */ + C51 COMPILER V9.02 ISET 04/15/2014 15:32:11 PAGE 4 + + 180 4 case 3: + 181 4 set_wide(TMP, A + get_wide(PC)); + 182 4 A = mem[TMP]; + 183 4 break; + 184 4 + 185 4 /* MOV A, @addr16 */ + 186 4 case 4: + 187 4 set_wide(TMP, fetch_wide()); + 188 4 A = mem[mem[get_wide(TMP)]]; + 189 4 break; + 190 4 + 191 4 /* MOV @addr16, A */ + 192 4 case 5: + 193 4 set_wide(TMP, fetch_wide()); + 194 4 mem[mem[get_wide(TMP)]] = A; + 195 4 break; + 196 4 + 197 4 /* MOV A, @DPTR */ + 198 4 case 6: + 199 4 set_wide(TMP, get_wide(DPTR)); + 200 4 A = mem[get_wide(TMP)]; + 201 4 break; + 202 4 + 203 4 /* MOV @DPTR, A */ + 204 4 case 7: + 205 4 set_wide(TMP, get_wide(DPTR)); + 206 4 mem[get_wide(TMP)] = A; + 207 4 break; + 208 4 + 209 4 default: + 210 4 break; + 211 4 } + 212 3 break; + 213 3 + 214 3 /* 0b00100nnn - MOV @DPTR, Rn*/ + 215 3 case 0x20: + 216 3 set_wide(TMP, get_wide(DPTR)); + 217 3 mem[get_wide(TMP)] = get_reg(NNN); + 218 3 break; + 219 3 + 220 3 /* 0b00101nnn - immediate movs - MOV Rn, #data8*/ + 221 3 case 0x28: + 222 3 set_reg(NNN, fetch()); + 223 3 break; + 224 3 + 225 3 /* 0b00110nnn - MOV Rn, A */ + 226 3 case 0x30: + 227 3 set_reg(NNN, A); + 228 3 break; + 229 3 + 230 3 /* 0b00111nnn MOV A, Rn */ + 231 3 case 0x38: + 232 3 A = get_reg(NNN); + 233 3 break; + 234 3 + 235 3 default: + 236 3 break; + 237 3 } + 238 2 break;; + 239 2 + 240 2 /* 0b01mmmnnn MOV Rm Rn + 241 2 * if m == n: MOV Rm, @DPTR */ + C51 COMPILER V9.02 ISET 04/15/2014 15:32:11 PAGE 5 + + 242 2 case 0x40: + 243 2 if (NNN == MMM) { + 244 3 set_wide(TMP, get_wide(DPTR)); + 245 3 set_reg(NNN, mem[get_wide(TMP)]); + 246 3 } + 247 2 else { + 248 3 set_reg(MMM, get_reg(NNN)); + 249 3 } + 250 2 break; + 251 2 + 252 2 default: + 253 2 break; + 254 2 } + 255 1 } + 256 + 257 + 258 /* 0x80 - ANL A, R0 + 259 * 0x81 - ANL A, R1 + 260 * 0x82 - ANL A, R2 + 261 * 0x83 - ANL A, R3 + 262 * 0x84 - ANL A, DPH + 263 * 0x85 - ANL A, DPL + 264 * 0x86 - ANL A, #data8 + 265 * 0x87 - ANL A, @DPTR */ + 266 void + 267 ANL(void) { + 268 1 if (NNN < 6) { + 269 2 A = A & get_reg(NNN); + 270 2 } + 271 1 else { + 272 2 switch (NNN) { + 273 3 + 274 3 case 6: + 275 3 A = A & fetch(); + 276 3 break; + 277 3 + 278 3 case 7: + 279 3 set_wide(TMP, get_wide(DPTR)); + 280 3 A = A & mem[TMP]; + 281 3 break; + 282 3 } + 283 2 } + 284 1 set_zp(A); + 285 1 } + 286 + 287 /* 0x88 - ORL A, R0 + 288 * 0x89 - ORL A, R1 + 289 * 0x8A - ORL A, R2 + 290 * 0x8B - ORL A, R3 + 291 * 0x8C - ORL A, DPH + 292 * 0x8D - ORL A, DPL + 293 * 0x8E - ORL A, #data8 + 294 * 0x8F - ORL A, @DPTR */ + 295 void + 296 ORL(void) { + 297 1 if (NNN < 6) { + 298 2 A = A | get_reg(NNN); + 299 2 } + 300 1 else { + 301 2 switch (NNN) { + 302 3 + 303 3 case 6: + C51 COMPILER V9.02 ISET 04/15/2014 15:32:11 PAGE 6 + + 304 3 A = A | fetch(); + 305 3 break; + 306 3 + 307 3 case 7: + 308 3 set_wide(TMP, get_wide(DPTR)); + 309 3 A = A | mem[TMP]; + 310 3 break; + 311 3 } + 312 2 } + 313 1 set_zp(A); + 314 1 } + 315 + 316 /* 0x90 - XRL A, R0 + 317 * 0x91 - XRL A, R1 + 318 * 0x92 - XRL A, R2 + 319 * 0x93 - XRL A, R3 + 320 * 0x94 - XRL A, DPH + 321 * 0x95 - XRL A, DPL + 322 * 0x96 - XRL A, #data8 + 323 * 0x97 - XRL A, @DPTR */ + 324 void + 325 XRL(void) { + 326 1 if (NNN < 6) { + 327 2 A = A ^ get_reg(NNN); + 328 2 } + 329 1 else { + 330 2 switch (NNN) { + 331 3 + 332 3 case 6: + 333 3 A = A ^ fetch(); + 334 3 break; + 335 3 + 336 3 case 7: + 337 3 set_wide(TMP, get_wide(DPTR)); + 338 3 A = A ^ mem[TMP]; + 339 3 break; + 340 3 } + 341 2 } + 342 1 set_zp(A); + 343 1 } + 344 + 345 /* 0x98 - RL A */ + 346 void + 347 RL(void) { + 348 1 A = (A << 1) | (A >> 7); + 349 1 } + 350 + 351 /* 0x99 - RLC A */ + 352 void + 353 RLC(void) { + 354 1 tmpb = A; + 355 1 A = (A << 1) | get_flag(C); + 356 1 set_flag(C, tmpb >> 7); + 357 1 } + 358 + 359 /* 0x9A - RR A */ + 360 void + 361 RR(void) { + 362 1 A = (A >> 1) | (A << 7); + 363 1 } + 364 + 365 /* 0x9B - RRC A */ + C51 COMPILER V9.02 ISET 04/15/2014 15:32:11 PAGE 7 + + 366 void + 367 RRC(void) { + 368 1 tmpb = A; + 369 1 A = (A >> 1) | (get_flag(C) << 7); + 370 1 set_flag(C, tmpb & 0x01); + 371 1 } + 372 + 373 /* 0x9C - INC DPTR + 374 * 0x9E - INC A */ + 375 void + 376 INC(void) { + 377 1 switch (IR) { + 378 2 + 379 2 case 0x9C: + 380 2 tmpw = get_wide(DPTR); + 381 2 if ((tmpw + 1) > 0xFFFF) { + 382 3 set_flag(OV, 1); + 383 3 } + 384 2 set_wide(DPTR, tmpw + 1); + 385 2 set_zp(DPL); + 386 2 set_zp(DPH); + 387 2 break; + 388 2 + 389 2 case 0x9E: + 390 2 if ((A + 1) > 0xFF) { + 391 3 set_flag(OV, 1); + 392 3 } + 393 2 A++; + 394 2 set_zp(A); + 395 2 + 396 2 } + 397 1 } + 398 + 399 /* 0x9D - DEC DPTR + 400 * 0x9F - DEC A */ + 401 void + 402 DEC(void) { + 403 1 switch (IR) { + 404 2 + 405 2 case 0x9D: + 406 2 tmpw = get_wide(DPTR); + 407 2 if ((tmpw - 1) < 0) { + 408 3 set_flag(OV, 1); + 409 3 } + 410 2 set_wide(DPTR, tmpw - 1); + 411 2 set_zp(DPL); + 412 2 set_zp(DPH); + 413 2 + 414 2 case 0x9F: + 415 2 if ((A - 1) < 0) { + 416 3 set_flag(OV, 1); + 417 3 } + 418 2 A--; + 419 2 set_zp(A); + 420 2 } + 421 1 } + 422 + 423 /* 0xA0 - ADD A, R0 + 424 * 0xA1 - ADD A, R1 + 425 * 0xA2 - ADD A, R2 + 426 * 0xA3 - ADD A, R3 + 427 * 0xA4 - ADD A, DPH + C51 COMPILER V9.02 ISET 04/15/2014 15:32:11 PAGE 8 + + 428 * 0xA5 - ADD A, DPL + 429 * 0xA6 - ADD A, #data8 + 430 * 0xA7 - ADD A, @DPTR */ + 431 void + 432 ADD(void) { + 433 1 if (NNN < 6) { + 434 2 if ((A + get_reg(NNN)) > 0xFF) { + 435 3 set_flag(OV, 1); + 436 3 } + 437 2 else { + 438 3 set_flag(OV, 0); + 439 3 } + 440 2 A = A + get_reg(NNN); + 441 2 set_zp(A); + 442 2 } + 443 1 else { + 444 2 switch (NNN) { + 445 3 + 446 3 case 6: + 447 3 tmpb = fetch(); + 448 3 if ((A + tmpb) > 0xFF) { + 449 4 set_flag(OV, 1); + 450 4 } + 451 3 else { + 452 4 set_flag(OV, 0); + 453 4 } + 454 3 A = A + tmpb; + 455 3 set_zp(A); + 456 3 break; + 457 3 + 458 3 case 7: + 459 3 set_wide(TMP, get_wide(DPTR)); + 460 3 if ((A + mem[TMP]) > 0xFF) { + 461 4 set_flag(OV, 1); + 462 4 } + 463 3 else { + 464 4 set_flag(OV, 0); + 465 4 } + 466 3 A = A + mem[TMP]; + 467 3 set_zp(A); + 468 3 break; + 469 3 } + 470 2 } + 471 1 + 472 1 } + 473 + 474 void + 475 ADDC(void) { + 476 1 /* implement me */ + 477 1 } + 478 + 479 /* 0xB0 - SUB A, R0 + 480 * 0xB1 - SUB A, R1 + 481 * 0xB2 - SUB A, R2 + 482 * 0xB3 - SUB A, R3 + 483 * 0xB4 - SUB A, DPH + 484 * 0xB5 - SUB A, DPL + 485 * 0xB6 - SUB A, #data8 + 486 * 0xB7 - SUB A, @DPTR */ + 487 void + 488 SUB(void) { + 489 1 if (NNN < 6) { + C51 COMPILER V9.02 ISET 04/15/2014 15:32:11 PAGE 9 + + 490 2 if ((A - get_reg(NNN)) < 0){ + 491 3 set_flag(OV, 1); + 492 3 } + 493 2 else { + 494 3 set_flag(OV, 0); + 495 3 } + 496 2 A = A - get_reg(NNN); + 497 2 set_zp(A); + 498 2 } + 499 1 else { + 500 2 switch (NNN) { + 501 3 + 502 3 case 6: + 503 3 tmpb = fetch(); + 504 3 if ((A - tmpb) < 0) { + 505 4 set_flag(OV, 1); + 506 4 } + 507 3 else { + 508 4 set_flag(OV, 0); + 509 4 } + 510 3 A = A - tmpb; + 511 3 set_zp(A); + 512 3 break; + 513 3 + 514 3 case 7: + 515 3 set_wide(TMP, get_wide(DPTR)); + 516 3 if ((A - mem[TMP]) < 0) { + 517 4 set_flag(OV, 1); + 518 4 } + 519 3 else { + 520 4 set_flag(OV, 0); + 521 4 } + 522 3 A = A - mem[TMP]; + 523 3 set_zp(A); + 524 3 break; + 525 3 } + 526 2 } + 527 1 } + 528 + 529 void + 530 SUBB(void) { + 531 1 /* implement me */ + 532 1 } + 533 + 534 void + 535 PJMP(void) { + 536 1 /* implement me */ + 537 1 } + 538 + 539 void + 540 PCALL(void) { + 541 1 /* implement me */ + 542 1 } + 543 + 544 /* 0xD0 - DJNZ R0, rel8 + 545 * 0xD1 - DJNZ R1, rel8 + 546 * 0xD2 - DJNZ R2, rel8 + 547 * 0xD3 - DJNZ R3, rel8 */ + 548 void + 549 DJNZ(void) { + 550 1 } + 551 + C51 COMPILER V9.02 ISET 04/15/2014 15:32:11 PAGE 10 + + 552 void + 553 CJNE(void) { + 554 1 } + 555 + 556 /* 0xD8 - LJMP addr16 */ + 557 void + 558 LJMP(void) { + 559 1 } + 560 + 561 void + 562 LCALL(void) { + 563 1 /* implement me */ + 564 1 } + 565 + 566 void + 567 RET(void) { + 568 1 /* implement me */ + 569 1 } + 570 + 571 void + 572 RETI(void) { + 573 1 /* implement me */ + 574 1 } + 575 + 576 /* 0xDC - SJMP rel8 */ + 577 void + 578 SJMP(void) { + 579 1 set_wide(PC, get_wide(PC) + (signed char)fetch()); + 580 1 } + 581 + 582 /* 0xDD - JMP @A+DPTR + 583 * 0xDE - JMP @DPTR */ + 584 void + 585 JMP(void) { + 586 1 } + 587 + 588 void + 589 JZ(void) { + 590 1 } + 591 + 592 void + 593 JNZ(void) { + 594 1 } + 595 + 596 void + 597 JC(void) { + 598 1 } + 599 + 600 void + 601 JNC(void) { + 602 1 } + 603 + 604 void + 605 JPO(void) { + 606 1 } + 607 + 608 void + 609 JPE(void) { + 610 1 } + 611 + 612 void + 613 JS(void) { + C51 COMPILER V9.02 ISET 04/15/2014 15:32:11 PAGE 11 + + 614 1 } + 615 + 616 void + 617 JNS(void) { + 618 1 } + 619 + 620 void + 621 PUSH(void) { + 622 1 } + 623 + 624 void + 625 POP(void) { + 626 1 } + 627 + 628 void + 629 MUL(void) { + 630 1 } + 631 + 632 void + 633 DIV(void) { + 634 1 } + 635 + 636 void + 637 DA(void) { + 638 1 } + 639 + 640 void + 641 IN(void) { + 642 1 } + 643 + 644 void + 645 OUT(void) { + 646 1 } + 647 + 648 void + 649 INT(void) { + 650 1 } + 651 + 652 /* 0xFF - HLT */ + 653 void + 654 HLT(void) { + 655 1 } + + +MODULE INFORMATION: STATIC OVERLAYABLE + CODE SIZE = 1479 ---- + CONSTANT SIZE = ---- ---- + XDATA SIZE = ---- ---- + PDATA SIZE = ---- ---- + DATA SIZE = ---- ---- + IDATA SIZE = ---- ---- + BIT SIZE = ---- ---- +END OF MODULE INFORMATION. + + +C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/emu_MCS-51/main.c Tue Apr 15 15:49:16 2014 +0100 @@ -0,0 +1,183 @@ +#include <reg52.h> +#include <stdio.h> + +#define MAIN +#include "mem.h" +#include "iset.h" + +/* fill instruction table + * MCS-51 - this needs to be stored in code memory */ +FUNCTION_TABLE const code iset = { + NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, + SET, CLR, SET, CLR, SET, CLR, CPL, CPL, + XCSD, SFA, LAF, MOV, MOV, MOV, MOV, MOV, + MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + ANL, ANL, ANL, ANL, ANL, ANL, ANL, ANL, + ORL, ORL, ORL, ORL, ORL, ORL, ORL, ORL, + XRL, XRL, XRL, XRL, XRL, XRL, XRL, XRL, + RL, RLC, RR, RRC, INC, DEC, INC, DEC, + ADD, ADD, ADD, ADD, ADD, ADD, ADD, ADD, + ADDC, ADDC, ADDC, ADDC, ADDC, ADDC, ADDC, ADDC, + SUB, SUB, SUB, SUB, SUB, SUB, SUB, SUB, + SUBB, SUBB, SUBB, SUBB, SUBB, SUBB, SUBB, SUBB, + PJMP, PJMP, PJMP, PJMP, PJMP, PJMP, PJMP, PJMP, + PCALL, PCALL, PCALL, PCALL, PCALL, PCALL, PCALL, PCALL, + DJNZ, DJNZ, DJNZ, DJNZ, CJNE, CJNE, CJNE, CJNE, + LJMP, LCALL, RET, RETI, SJMP, JMP, JMP, CJNE, + JZ, JNZ, JC, JNC, JPO, JPE, JS, JNS, + PUSH, PUSH, PUSH, PUSH, PUSH, PUSH, PUSH, PUSH, + POP, POP, POP, POP, POP, POP, POP, POP, + MUL, DIV, DA, NOP, IN, OUT, INT, HLT +}; + +BYTE free_run; /* free run if not 0 */ +WIDE ac; /* address counter */ +BYTE args[4]; /* dbg args */ + +void +snd(BYTE c) { + putchar(c); +} + +BYTE +rcv(void) { + return getchar(); +} + +void +step(void) { + IR = fetch(); + iset.ops[IR](); +} + +void dbgi() { + if (free_run == 0) { + switch (rcv()) { + + /* step */ + case 0x00: + step(); + break; + + /* run */ + case 0x01: + args[0] = rcv(); /* length high */ + args[1] = rcv(); /* length low */ + tmpw = get_wide(PC); + for (ac = tmpw ; ac < tmpw + MWIDE(args[0], args[1]) ; ac++) { + step(); + } + break; + + /* set reg */ + case 0x02: + args[0] = rcv(); /* reg */ + args[1] = rcv(); /* val */ + regs[args[0]] = args[1]; + break; + + /* get reg */ + case 0x03: + args[0] = rcv(); /* reg */ + snd(regs[args[0]]); + break; + + /* set flag */ + case 0x04: + args[0] = rcv(); /* flag */ + args[1] = rcv(); /* on? */ + set_flag(args[0], args[1]); + break; + + /* get flag */ + case 0x05: + args[0] = rcv(); /* flag */ + snd(get_flag(args[0])); + break; + + /* write mem block */ + case 0x06: + args[0] = rcv(); /* addr high */ + args[1] = rcv(); /* addr low */ + args[2] = rcv(); /* length high */ + args[3] = rcv(); /* length low */ + tmpw = MWIDE(args[0], args[1]); + for (ac = tmpw; ac < tmpw + MWIDE(args[2], args[3]); ac++) { + if (ac >= 0xFFFF) { + break; + } + mem[ac] = rcv(); + } + break; + + /* read mem block */ + case 0x07: + args[0] = rcv(); /* addr high */ + args[1] = rcv(); /* addr low */ + args[2] = rcv(); /* length high */ + args[3] = rcv(); /* length low */ + tmpw = MWIDE(args[0], args[1]); + for (ac = tmpw; ac < tmpw + MWIDE(args[2], args[3]); ac++) { + if (ac >= 0xFFFF) { + break; + } + snd(mem[ac]); + } + break; + + /* get A */ + case 0x09: + snd(A); + break; + + /* get flags */ + case 0x0A: + snd(flags); + break; + + /* get instruction register */ + case 0x0B: + snd(IR); + break; + + /* test case */ + + case 0x54: + snd('A'); + break; + } + } +} + +void +main(void) { + /* serial set up + * SCON - mode 1, 8-bit UART, enable rcvr + * TMOD - timer 1, mode 2, 8-bit reload + * TH1 - reload value for 1200 baud @ 12MHz + * TR1 - timer 1 run + * TI - set TI to send first char of UART */ + SCON = 0x50; + TMOD |= 0x20; + TH1 = 0xE8; + TR1 = 1; + TI = 1; + /* dont go into free run on restart */ + free_run = 0; + for (;;) { + dbgi(); + } +} +
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/emu_MCS-51/main.lst Tue Apr 15 15:49:16 2014 +0100 @@ -0,0 +1,212 @@ +C51 COMPILER V9.02 MAIN 04/15/2014 15:32:09 PAGE 1 + + +C51 COMPILER V9.02, COMPILATION OF MODULE MAIN +OBJECT MODULE PLACED IN main.obj +COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE src\main.c BROWSE DEBUG OBJECTEXTEND PRINT(.\main.lst) OBJECT(main.obj) + +line level source + + 1 #include <reg52.h> + 2 #include <stdio.h> + 3 + 4 #define MAIN + 5 #include "mem.h" + 6 #include "iset.h" + 7 + 8 /* fill instruction table + 9 * MCS-51 - this needs to be stored in code memory */ + 10 FUNCTION_TABLE const code iset = { + 11 NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, + 12 SET, CLR, SET, CLR, SET, CLR, CPL, CPL, + 13 XCSD, SFA, LAF, MOV, MOV, MOV, MOV, MOV, + 14 MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + 15 MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + 16 MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + 17 MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + 18 MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + 19 MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + 20 MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + 21 MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + 22 MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + 23 MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + 24 MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + 25 MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + 26 MOV, MOV, MOV, MOV, MOV, MOV, MOV, MOV, + 27 ANL, ANL, ANL, ANL, ANL, ANL, ANL, ANL, + 28 ORL, ORL, ORL, ORL, ORL, ORL, ORL, ORL, + 29 XRL, XRL, XRL, XRL, XRL, XRL, XRL, XRL, + 30 RL, RLC, RR, RRC, INC, DEC, INC, DEC, + 31 ADD, ADD, ADD, ADD, ADD, ADD, ADD, ADD, + 32 ADDC, ADDC, ADDC, ADDC, ADDC, ADDC, ADDC, ADDC, + 33 SUB, SUB, SUB, SUB, SUB, SUB, SUB, SUB, + 34 SUBB, SUBB, SUBB, SUBB, SUBB, SUBB, SUBB, SUBB, + 35 PJMP, PJMP, PJMP, PJMP, PJMP, PJMP, PJMP, PJMP, + 36 PCALL, PCALL, PCALL, PCALL, PCALL, PCALL, PCALL, PCALL, + 37 DJNZ, DJNZ, DJNZ, DJNZ, CJNE, CJNE, CJNE, CJNE, + 38 LJMP, LCALL, RET, RETI, SJMP, JMP, JMP, CJNE, + 39 JZ, JNZ, JC, JNC, JPO, JPE, JS, JNS, + 40 PUSH, PUSH, PUSH, PUSH, PUSH, PUSH, PUSH, PUSH, + 41 POP, POP, POP, POP, POP, POP, POP, POP, + 42 MUL, DIV, DA, NOP, IN, OUT, INT, HLT + 43 }; + 44 + 45 BYTE free_run; /* free run if not 0 */ + 46 WIDE ac; /* address counter */ + 47 BYTE args[4]; /* dbg args */ + 48 + 49 void + 50 snd(BYTE c) { + 51 1 putchar(c); + 52 1 } + 53 + 54 BYTE + 55 rcv(void) { + C51 COMPILER V9.02 MAIN 04/15/2014 15:32:09 PAGE 2 + + 56 1 return getchar(); + 57 1 } + 58 + 59 void + 60 step(void) { + 61 1 IR = fetch(); + 62 1 iset.ops[IR](); + 63 1 } + 64 + 65 void dbgi() { + 66 1 if (free_run == 0) { + 67 2 switch (rcv()) { + 68 3 + 69 3 /* step */ + 70 3 case 0x00: + 71 3 step(); + 72 3 break; + 73 3 + 74 3 /* run */ + 75 3 case 0x01: + 76 3 args[0] = rcv(); /* length high */ + 77 3 args[1] = rcv(); /* length low */ + 78 3 tmpw = get_wide(PC); + 79 3 for (ac = tmpw ; ac < tmpw + MWIDE(args[0], args[1]) ; ac++) { + 80 4 step(); + 81 4 } + 82 3 break; + 83 3 + 84 3 /* set reg */ + 85 3 case 0x02: + 86 3 args[0] = rcv(); /* reg */ + 87 3 args[1] = rcv(); /* val */ + 88 3 regs[args[0]] = args[1]; + 89 3 break; + 90 3 + 91 3 /* get reg */ + 92 3 case 0x03: + 93 3 args[0] = rcv(); /* reg */ + 94 3 snd(regs[args[0]]); + 95 3 break; + 96 3 + 97 3 /* set flag */ + 98 3 case 0x04: + 99 3 args[0] = rcv(); /* flag */ + 100 3 args[1] = rcv(); /* on? */ + 101 3 set_flag(args[0], args[1]); + 102 3 break; + 103 3 + 104 3 /* get flag */ + 105 3 case 0x05: + 106 3 args[0] = rcv(); /* flag */ + 107 3 snd(get_flag(args[0])); + 108 3 break; + 109 3 + 110 3 /* write mem block */ + 111 3 case 0x06: + 112 3 args[0] = rcv(); /* addr high */ + 113 3 args[1] = rcv(); /* addr low */ + 114 3 args[2] = rcv(); /* length high */ + 115 3 args[3] = rcv(); /* length low */ + 116 3 tmpw = MWIDE(args[0], args[1]); + 117 3 for (ac = tmpw; ac < tmpw + MWIDE(args[2], args[3]); ac++) { + C51 COMPILER V9.02 MAIN 04/15/2014 15:32:09 PAGE 3 + + 118 4 if (ac >= 0xFFFF) { + 119 5 break; + 120 5 } + 121 4 mem[ac] = rcv(); + 122 4 } + 123 3 break; + 124 3 + 125 3 /* read mem block */ + 126 3 case 0x07: + 127 3 args[0] = rcv(); /* addr high */ + 128 3 args[1] = rcv(); /* addr low */ + 129 3 args[2] = rcv(); /* length high */ + 130 3 args[3] = rcv(); /* length low */ + 131 3 tmpw = MWIDE(args[0], args[1]); + 132 3 for (ac = tmpw; ac < tmpw + MWIDE(args[2], args[3]); ac++) { + 133 4 if (ac >= 0xFFFF) { + 134 5 break; + 135 5 } + 136 4 snd(mem[ac]); + 137 4 } + 138 3 break; + 139 3 + 140 3 /* get A */ + 141 3 case 0x09: + 142 3 snd(A); + 143 3 break; + 144 3 + 145 3 /* get flags */ + 146 3 case 0x0A: + 147 3 snd(flags); + 148 3 break; + 149 3 + 150 3 /* get instruction register */ + 151 3 case 0x0B: + 152 3 snd(IR); + 153 3 break; + 154 3 + 155 3 /* test case */ + 156 3 + 157 3 case 0x54: + 158 3 snd('A'); + 159 3 break; + 160 3 } + 161 2 } + 162 1 } + 163 + 164 void + 165 main(void) { + 166 1 /* serial set up + 167 1 * SCON - mode 1, 8-bit UART, enable rcvr + 168 1 * TMOD - timer 1, mode 2, 8-bit reload + 169 1 * TH1 - reload value for 1200 baud @ 12MHz + 170 1 * TR1 - timer 1 run + 171 1 * TI - set TI to send first char of UART */ + 172 1 SCON = 0x50; + 173 1 TMOD |= 0x20; + 174 1 TH1 = 0xE8; + 175 1 TR1 = 1; + 176 1 TI = 1; + 177 1 /* dont go into free run on restart */ + 178 1 free_run = 0; + 179 1 for (;;) { + C51 COMPILER V9.02 MAIN 04/15/2014 15:32:09 PAGE 4 + + 180 2 dbgi(); + 181 2 } + 182 1 } + 183 + + +MODULE INFORMATION: STATIC OVERLAYABLE + CODE SIZE = 465 ---- + CONSTANT SIZE = 768 ---- + XDATA SIZE = 32768 ---- + PDATA SIZE = ---- ---- + DATA SIZE = 29 ---- + IDATA SIZE = ---- ---- + BIT SIZE = ---- ---- +END OF MODULE INFORMATION. + + +C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/emu_MCS-51/mem.c Tue Apr 15 15:49:16 2014 +0100 @@ -0,0 +1,141 @@ +/* mem.c + * functions for accessing emulator memory */ +#include "mem.h" + +/* get flag value + * if invalid flag is requested value is 0 */ +BYTE +get_flag(BYTE flag) { + if (flag > 7) { + return 0; + } + else { + return GBIT(flags, flag); + } +} + +/* set flag to 0 if on == 0 + * otherwise set flag to 1 */ +void +set_flag(BYTE flag, BYTE on) { + if (flag <= 7) { + if (on == 0x00) { + flags = CBIT(flags, flag); + } + else { + flags = SBIT(flags, flag); + } + } +} + +/* sets zero and parity flags based on content of byte */ +void +set_zp(BYTE val){ + if (val == 0) { + set_flag(Z, 1); + set_flag(P, 0); + } + else { + /* think of this as folding */ + val ^= val >> 4; + val ^= val >> 2; + val ^= val >> 1; + val &= 1; + if (val == 0) { + set_flag(P, 1); + } + else { + set_flag(P, 0); + } + } +} + +WIDE +get_wide(BYTE reg) { + /* high, low */ + return MWIDE(regs[reg + 4], regs[reg + 12]); +} + +void +set_wide(BYTE reg, WIDE val) { + regs[reg + 4] = GHIGH(val); /* high */ + regs[reg + 12] = GLOW(val); /* low */ +} + +void +inc_pc(BYTE n) { + if ((regs[PCL] + n) > 0xFF) { + regs[PCH]++; + } + regs[PCL] += n; +} + +BYTE +fetch(void) { + BYTE val = mem[get_wide(PC)]; + inc_pc(1); + return val; +} + +WIDE +fetch_wide(void) { + WIDE val = MWIDE(mem[get_wide(PC)], mem[get_wide(PC) + 1]); + inc_pc(2); + return val; +} + +/* 0b000 = R0 + * 0b001 = R1 + * 0b010 = R2 + * 0b011 = R3 + * 0b100 = DPH + * 0b101 = DPL + * 0b110 = SPH + * 0b111 = SPL */ +BYTE +get_reg(BYTE reg) { + if (reg < 4) { + return regs[reg | (get_flag(BS) << 3)]; + } + else { + switch (reg) { + + case 4: + return regs[DPH]; + case 5: + return regs[DPL]; + case 6: + return regs[SPH]; + case 7: + return regs[SPL]; + default: + return 0; + } + } +} + +void +set_reg(BYTE reg, BYTE val) { + if (reg < 4) { + regs[reg | (get_flag(BS) << 3)] = val; + } + else { + switch (reg) { + + case 4: + regs[DPH] = val; + break; + case 5: + regs[DPL] = val; + break; + case 6: + regs[SPH] = val; + break; + case 7: + regs[SPL] = val; + break; + default: + break; + } + } +}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/emu_MCS-51/mem.h Tue Apr 15 15:49:16 2014 +0100 @@ -0,0 +1,133 @@ +/* mem.h */ +#ifndef MEM_H +#define MEM_H + +#if defined MAIN +#define EXTERN +#else +#define EXTERN extern +#endif + +/* 8 bit register encodings */ +#define R0 (0 | (get_flag(0) << 3)) +#define R1 (1 | (get_flag(0) << 3)) +#define R2 (2 | (get_flag(0) << 3)) +#define R3 (3 | (get_flag(0) << 3)) +#define DPH 4 +#define SPH 5 +#define PCH 6 +#define TMPH 7 +#define DPL 12 +#define SPL 13 +#define PCL 14 +#define TMPL 15 + +/* 16 bit register encodings */ +#define DPTR 0 +#define SP 1 +#define PC 2 +#define TMP 3 + +/* flag bits numbered from LSB -> MSB + * 7 6 5 4 3 2 1 0 + * C Z AC P S OV IE BS */ +#define BS 0 +#define IE 1 +#define OV 2 +#define S 3 +#define P 4 +#define AC 5 +#define Z 6 +#define C 7 + +/* for getting and setting flags */ +#define GBIT(byte, n) (byte & (0x01 << n) ? 1 : 0) +#define SBIT(byte, n) (byte | (0x01 << n)) +#define CBIT(byte, n) (byte ^ (0x01 << n)) + +/* for making and breaking 16 bit values */ +#define MWIDE(high, low) (low | (high << 8)) +#define GHIGH(wide) ((wide >> 8) & 0xFF) +#define GLOW(wide) (wide & 0xFF) + +typedef unsigned char BYTE; +typedef unsigned short WIDE; + +/* these are needed for some operations */ +EXTERN BYTE tmpb; +EXTERN WIDE tmpw; + +EXTERN BYTE IR; +EXTERN BYTE A; +EXTERN BYTE flags; + +/* 0x00 0b0000 r0 bank 0 + 0x01 0b0001 r1 bank 0 + 0x02 0b0010 r2 bank 0 + 0x03 0b0011 r3 bank 0 + 0x04 0b0100 dph + 0x05 0b0101 sph + 0x06 0b0110 pch + 0x07 0b0111 tmph + 0x08 0b1000 r0 bank 1 + 0x09 0b1001 r1 bank 1 + 0x0A 0b1010 r2 bank 1 + 0x0B 0b1011 r3 bank 1 + 0x0C 0b1100 dpl + 0x0D 0b1101 spl + 0x0E 0b1110 pcl + 0x0F 0b1111 tmpl */ +EXTERN BYTE regs[0x10]; + +/* 64K Von Neumann memory */ +EXTERN BYTE xdata mem[0x8000]; + +/* functions to dealing with flags */ +EXTERN BYTE +get_flag(BYTE flag); + +EXTERN void +set_flag(BYTE flag, BYTE on); + +EXTERN void +set_zp(BYTE val); + +/* this function a byte and returns a byte + * with zero and parity flags set or unset. + * result should be or'd with flags reg */ +EXTERN BYTE +gen_flags(BYTE val); + +/* functions for dealing with 16-bit registers + * access the 16 bit registers. + * register map for these function: + * 0b00 dptr + * 0b01 sp + * 0b10 pc + * 0b11 tmp */ +EXTERN WIDE +get_wide(BYTE reg); + +EXTERN void +set_wide(BYTE reg, WIDE val); + +/* functions to fetch data at PC */ +EXTERN void +inc_pc(BYTE n); + +EXTERN BYTE +fetch(); + +EXTERN WIDE +fetch_wide(); + +/* for mapping the register encoding in the instruction + * set to the register address */ +EXTERN BYTE +get_reg(BYTE reg); + +EXTERN void +set_reg(BYTE reg, BYTE val); + + +#endif
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/emu_MCS-51/mem.lst Tue Apr 15 15:49:16 2014 +0100 @@ -0,0 +1,168 @@ +C51 COMPILER V9.02 MEM 04/15/2014 15:32:10 PAGE 1 + + +C51 COMPILER V9.02, COMPILATION OF MODULE MEM +OBJECT MODULE PLACED IN mem.obj +COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE src\mem.c BROWSE DEBUG OBJECTEXTEND PRINT(.\mem.lst) OBJECT(mem.obj) + +line level source + + 1 /* mem.c + 2 * functions for accessing emulator memory */ + 3 #include "mem.h" + 4 + 5 /* get flag value + 6 * if invalid flag is requested value is 0 */ + 7 BYTE + 8 get_flag(BYTE flag) { + 9 1 if (flag > 7) { + 10 2 return 0; + 11 2 } + 12 1 else { + 13 2 return GBIT(flags, flag); + 14 2 } + 15 1 } + 16 + 17 /* set flag to 0 if on == 0 + 18 * otherwise set flag to 1 */ + 19 void + 20 set_flag(BYTE flag, BYTE on) { + 21 1 if (flag <= 7) { + 22 2 if (on == 0x00) { + 23 3 flags = CBIT(flags, flag); + 24 3 } + 25 2 else { + 26 3 flags = SBIT(flags, flag); + 27 3 } + 28 2 } + 29 1 } + 30 + 31 /* sets zero and parity flags based on content of byte */ + 32 void + 33 set_zp(BYTE val){ + 34 1 if (val == 0) { + 35 2 set_flag(Z, 1); + 36 2 set_flag(P, 0); + 37 2 } + 38 1 else { + 39 2 /* think of this as folding */ + 40 2 val ^= val >> 4; + 41 2 val ^= val >> 2; + 42 2 val ^= val >> 1; + 43 2 val &= 1; + 44 2 if (val == 0) { + 45 3 set_flag(P, 1); + 46 3 } + 47 2 else { + 48 3 set_flag(P, 0); + 49 3 } + 50 2 } + 51 1 } + 52 + 53 WIDE + 54 get_wide(BYTE reg) { + 55 1 /* high, low */ + C51 COMPILER V9.02 MEM 04/15/2014 15:32:10 PAGE 2 + + 56 1 return MWIDE(regs[reg + 4], regs[reg + 12]); + 57 1 } + 58 + 59 void + 60 set_wide(BYTE reg, WIDE val) { + 61 1 regs[reg + 4] = GHIGH(val); /* high */ + 62 1 regs[reg + 12] = GLOW(val); /* low */ + 63 1 } + 64 + 65 void + 66 inc_pc(BYTE n) { + 67 1 if ((regs[PCL] + n) > 0xFF) { + 68 2 regs[PCH]++; + 69 2 } + 70 1 regs[PCL] += n; + 71 1 } + 72 + 73 BYTE + 74 fetch(void) { + 75 1 BYTE val = mem[get_wide(PC)]; + 76 1 inc_pc(1); + 77 1 return val; + 78 1 } + 79 + 80 WIDE + 81 fetch_wide(void) { + 82 1 WIDE val = MWIDE(mem[get_wide(PC)], mem[get_wide(PC) + 1]); + 83 1 inc_pc(2); + 84 1 return val; + 85 1 } + 86 + 87 /* 0b000 = R0 + 88 * 0b001 = R1 + 89 * 0b010 = R2 + 90 * 0b011 = R3 + 91 * 0b100 = DPH + 92 * 0b101 = DPL + 93 * 0b110 = SPH + 94 * 0b111 = SPL */ + 95 BYTE + 96 get_reg(BYTE reg) { + 97 1 if (reg < 4) { + 98 2 return regs[reg | (get_flag(BS) << 3)]; + 99 2 } + 100 1 else { + 101 2 switch (reg) { + 102 3 + 103 3 case 4: + 104 3 return regs[DPH]; + 105 3 case 5: + 106 3 return regs[DPL]; + 107 3 case 6: + 108 3 return regs[SPH]; + 109 3 case 7: + 110 3 return regs[SPL]; + 111 3 default: + 112 3 return 0; + 113 3 } + 114 2 } + 115 1 } + 116 + 117 void + C51 COMPILER V9.02 MEM 04/15/2014 15:32:10 PAGE 3 + + 118 set_reg(BYTE reg, BYTE val) { + 119 1 if (reg < 4) { + 120 2 regs[reg | (get_flag(BS) << 3)] = val; + 121 2 } + 122 1 else { + 123 2 switch (reg) { + 124 3 + 125 3 case 4: + 126 3 regs[DPH] = val; + 127 3 break; + 128 3 case 5: + 129 3 regs[DPL] = val; + 130 3 break; + 131 3 case 6: + 132 3 regs[SPH] = val; + 133 3 break; + 134 3 case 7: + 135 3 regs[SPL] = val; + 136 3 break; + 137 3 default: + 138 3 break; + 139 3 } + 140 2 } + 141 1 } + + +MODULE INFORMATION: STATIC OVERLAYABLE + CODE SIZE = 371 ---- + CONSTANT SIZE = ---- ---- + XDATA SIZE = ---- ---- + PDATA SIZE = ---- ---- + DATA SIZE = ---- ---- + IDATA SIZE = ---- ---- + BIT SIZE = ---- ---- +END OF MODULE INFORMATION. + + +C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)