comparison pru_rtaudio.p @ 283:bfe2e929304b prerelease

Updated PRU code -- same idea for muxes 4-7
author andrewm
date Tue, 17 May 2016 18:31:43 +0100
parents 5b490c00488f
children c6a15a8dee02
comparison
equal deleted inserted replaced
282:5b490c00488f 283:bfe2e929304b
580 AND r28, reg_pru1_mux_pins, r28 // Mask out low 3 bits of r30 580 AND r28, reg_pru1_mux_pins, r28 // Mask out low 3 bits of r30
581 OR r28, r28, r27 // Combine with new value 581 OR r28, r28, r27 // Combine with new value
582 MOV reg_pru1_mux_pins, r28 // Move back to r30 to propagate to pins 582 MOV reg_pru1_mux_pins, r28 // Move back to r30 to propagate to pins
583 DONE: 583 DONE:
584 .endm 584 .endm
585
586 // Multiplexer Capelet: Increment channel on muxes 4-7
587 .macro MUX_INCREMENT_4_TO_7
588 MOV r28, FLAG_MASK_MUX_CONFIG
589 AND r28, reg_flags, r28 // Check flags
590 QBEQ DONE, r28, 0 // Skip if disabled
591 LSR r28, r28, FLAG_BIT_MUX_CONFIG0
592 AND r27, reg_pru1_mux_pins, 0x38 // Current mux channel in r30 bits 5-3
593 ADD r27, r27, 8 // Increment channel (+1 LSB starting at bit 3)
594 AND r27, r27, 0x38 // Mask to 8 channels
595 QBEQ UPDATE, r28, 0x03
596 AND r27, r27, 0x18 // Mask to 4 channels
597 QBEQ UPDATE, r28, 0x02
598 AND r27, r27, 0x08 // Mask to 2 channels
599 UPDATE:
600 MOV r28, 0xFFFFFFC7
601 AND r28, reg_pru1_mux_pins, r28 // Mask out bits 5-3 of r30
602 OR r28, r28, r27 // Combine with new value
603 MOV reg_pru1_mux_pins, r28 // Move back to r30 to propagate to pins
604 DONE:
605 .endm
606
585 607
586 START: 608 START:
587 // Load useful registers for addressing SPI 609 // Load useful registers for addressing SPI
588 MOV reg_comm_addr, SHARED_COMM_MEM_BASE 610 MOV reg_comm_addr, SHARED_COMM_MEM_BASE
589 MOV reg_spi_addr, SPI_BASE 611 MOV reg_spi_addr, SPI_BASE
1019 1041
1020 // If enabled, update the multiplexer settings 1042 // If enabled, update the multiplexer settings
1021 QBNE MUX_0_3_DONE, r1, 3 // Change mux settings for ch0-3 after reading ch. 3 1043 QBNE MUX_0_3_DONE, r1, 3 // Change mux settings for ch0-3 after reading ch. 3
1022 MUX_INCREMENT_0_TO_3 1044 MUX_INCREMENT_0_TO_3
1023 MUX_0_3_DONE: 1045 MUX_0_3_DONE:
1046 QBNE MUX_4_7_DONE, r1, 7 // Change mux settings for ch4-7 after reading ch. 7
1047 MUX_INCREMENT_4_TO_7
1048 MUX_4_7_DONE:
1024 1049
1025 // Toggle the high/low word for McASP control (since we send one word out of 1050 // Toggle the high/low word for McASP control (since we send one word out of
1026 // 32 bits for each pair of SPI channels) 1051 // 32 bits for each pair of SPI channels)
1027 XOR reg_flags, reg_flags, (1 << FLAG_BIT_MCASP_HWORD) 1052 XOR reg_flags, reg_flags, (1 << FLAG_BIT_MCASP_HWORD)
1028 1053