cannam@167: TODO before FFTW-$2\pi$:
cannam@167: 
cannam@167: * figure out how to autodetect NEON at runtime
cannam@167: 
cannam@167: * figure out the arm cycle counter business
cannam@167: 
cannam@167: * Wisdom: make it clear that it is specific to the exact fftw version
cannam@167:   and configuration.  Report error codes when reading wisdom.  Maybe
cannam@167:   have multiple system wisdom files, one per version?
cannam@167: 
cannam@167: * DCT/DST codelets?  which kinds?
cannam@167: 
cannam@167: * investigate the addition-chain trig computation
cannam@167: 
cannam@167: * I can't believe that there isn't a closed form for the omega
cannam@167:   array in Rader.
cannam@167: 
cannam@167: * convolution problem type(s)
cannam@167: 
cannam@167: * Explore the idea of having n < 0 in tensors, possibly to mean
cannam@167:   inverse DFT.
cannam@167: 
cannam@167: * better estimator: possibly, let "other" cost be coef * n, where
cannam@167:   coef is a per-solver constant determined via some big numerical
cannam@167:   optimization/fit.
cannam@167: 
cannam@167: * vector radix, multidimensional codelets
cannam@167: 
cannam@167: * it may be a good idea to unify all those little loops that do
cannam@167:   copying, (X[i], X[n-i]) <- (X[i] + X[n-i], X[i] - X[n-i]),
cannam@167:   and multiplication of vectors by twiddle factors.
cannam@167: 
cannam@167: * Pruned FFTs (basically, a vecloop that skips zeros).
cannam@167: 
cannam@167: * Try FFTPACK-style back-and-forth (Stockham) FFT.  (We tried this a
cannam@167:   few years ago and it was slower, but perhaps matters have changed.)
cannam@167: 
cannam@167: * Generate assembly directly for more processors, or maybe fork gcc.  =)
cannam@167: 
cannam@167: * ensure that threaded solvers generate (block_size % 4 == 0)
cannam@167:   to allow SIMD to be used.
cannam@167: 
cannam@167: * memoize triggen.