cannam@154: /* Copyright (c) 2014, Cisco Systems, INC
cannam@154:    Written by XiangMingZhu WeiZhou MinPeng YanWang
cannam@154: 
cannam@154:    Redistribution and use in source and binary forms, with or without
cannam@154:    modification, are permitted provided that the following conditions
cannam@154:    are met:
cannam@154: 
cannam@154:    - Redistributions of source code must retain the above copyright
cannam@154:    notice, this list of conditions and the following disclaimer.
cannam@154: 
cannam@154:    - Redistributions in binary form must reproduce the above copyright
cannam@154:    notice, this list of conditions and the following disclaimer in the
cannam@154:    documentation and/or other materials provided with the distribution.
cannam@154: 
cannam@154:    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
cannam@154:    ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
cannam@154:    LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
cannam@154:    A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
cannam@154:    OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
cannam@154:    EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
cannam@154:    PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
cannam@154:    PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
cannam@154:    LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
cannam@154:    NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
cannam@154:    SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
cannam@154: */
cannam@154: 
cannam@154: #ifdef HAVE_CONFIG_H
cannam@154: #include "config.h"
cannam@154: #endif
cannam@154: 
cannam@154: #include "cpu_support.h"
cannam@154: #include "macros.h"
cannam@154: #include "main.h"
cannam@154: #include "pitch.h"
cannam@154: #include "x86cpu.h"
cannam@154: 
cannam@154: #if (defined(OPUS_X86_MAY_HAVE_SSE) && !defined(OPUS_X86_PRESUME_SSE)) || \
cannam@154:   (defined(OPUS_X86_MAY_HAVE_SSE2) && !defined(OPUS_X86_PRESUME_SSE2)) || \
cannam@154:   (defined(OPUS_X86_MAY_HAVE_SSE4_1) && !defined(OPUS_X86_PRESUME_SSE4_1)) || \
cannam@154:   (defined(OPUS_X86_MAY_HAVE_AVX) && !defined(OPUS_X86_PRESUME_AVX))
cannam@154: 
cannam@154: 
cannam@154: #if defined(_MSC_VER)
cannam@154: 
cannam@154: #include <intrin.h>
cannam@154: static _inline void cpuid(unsigned int CPUInfo[4], unsigned int InfoType)
cannam@154: {
cannam@154:     __cpuid((int*)CPUInfo, InfoType);
cannam@154: }
cannam@154: 
cannam@154: #else
cannam@154: 
cannam@154: #if defined(CPU_INFO_BY_C)
cannam@154: #include <cpuid.h>
cannam@154: #endif
cannam@154: 
cannam@154: static void cpuid(unsigned int CPUInfo[4], unsigned int InfoType)
cannam@154: {
cannam@154: #if defined(CPU_INFO_BY_ASM)
cannam@154: #if defined(__i386__) && defined(__PIC__)
cannam@154: /* %ebx is PIC register in 32-bit, so mustn't clobber it. */
cannam@154:     __asm__ __volatile__ (
cannam@154:         "xchg %%ebx, %1\n"
cannam@154:         "cpuid\n"
cannam@154:         "xchg %%ebx, %1\n":
cannam@154:         "=a" (CPUInfo[0]),
cannam@154:         "=r" (CPUInfo[1]),
cannam@154:         "=c" (CPUInfo[2]),
cannam@154:         "=d" (CPUInfo[3]) :
cannam@154:         "0" (InfoType)
cannam@154:     );
cannam@154: #else
cannam@154:     __asm__ __volatile__ (
cannam@154:         "cpuid":
cannam@154:         "=a" (CPUInfo[0]),
cannam@154:         "=b" (CPUInfo[1]),
cannam@154:         "=c" (CPUInfo[2]),
cannam@154:         "=d" (CPUInfo[3]) :
cannam@154:         "0" (InfoType)
cannam@154:     );
cannam@154: #endif
cannam@154: #elif defined(CPU_INFO_BY_C)
cannam@154:     __get_cpuid(InfoType, &(CPUInfo[0]), &(CPUInfo[1]), &(CPUInfo[2]), &(CPUInfo[3]));
cannam@154: #endif
cannam@154: }
cannam@154: 
cannam@154: #endif
cannam@154: 
cannam@154: typedef struct CPU_Feature{
cannam@154:     /*  SIMD: 128-bit */
cannam@154:     int HW_SSE;
cannam@154:     int HW_SSE2;
cannam@154:     int HW_SSE41;
cannam@154:     /*  SIMD: 256-bit */
cannam@154:     int HW_AVX;
cannam@154: } CPU_Feature;
cannam@154: 
cannam@154: static void opus_cpu_feature_check(CPU_Feature *cpu_feature)
cannam@154: {
cannam@154:     unsigned int info[4] = {0};
cannam@154:     unsigned int nIds = 0;
cannam@154: 
cannam@154:     cpuid(info, 0);
cannam@154:     nIds = info[0];
cannam@154: 
cannam@154:     if (nIds >= 1){
cannam@154:         cpuid(info, 1);
cannam@154:         cpu_feature->HW_SSE = (info[3] & (1 << 25)) != 0;
cannam@154:         cpu_feature->HW_SSE2 = (info[3] & (1 << 26)) != 0;
cannam@154:         cpu_feature->HW_SSE41 = (info[2] & (1 << 19)) != 0;
cannam@154:         cpu_feature->HW_AVX = (info[2] & (1 << 28)) != 0;
cannam@154:     }
cannam@154:     else {
cannam@154:         cpu_feature->HW_SSE = 0;
cannam@154:         cpu_feature->HW_SSE2 = 0;
cannam@154:         cpu_feature->HW_SSE41 = 0;
cannam@154:         cpu_feature->HW_AVX = 0;
cannam@154:     }
cannam@154: }
cannam@154: 
cannam@154: int opus_select_arch(void)
cannam@154: {
cannam@154:     CPU_Feature cpu_feature;
cannam@154:     int arch;
cannam@154: 
cannam@154:     opus_cpu_feature_check(&cpu_feature);
cannam@154: 
cannam@154:     arch = 0;
cannam@154:     if (!cpu_feature.HW_SSE)
cannam@154:     {
cannam@154:        return arch;
cannam@154:     }
cannam@154:     arch++;
cannam@154: 
cannam@154:     if (!cpu_feature.HW_SSE2)
cannam@154:     {
cannam@154:        return arch;
cannam@154:     }
cannam@154:     arch++;
cannam@154: 
cannam@154:     if (!cpu_feature.HW_SSE41)
cannam@154:     {
cannam@154:         return arch;
cannam@154:     }
cannam@154:     arch++;
cannam@154: 
cannam@154:     if (!cpu_feature.HW_AVX)
cannam@154:     {
cannam@154:         return arch;
cannam@154:     }
cannam@154:     arch++;
cannam@154: 
cannam@154:     return arch;
cannam@154: }
cannam@154: 
cannam@154: #endif