cannam@95: /* cannam@95: * Copyright (c) 2003, 2007-11 Matteo Frigo cannam@95: * Copyright (c) 2003, 2007-11 Massachusetts Institute of Technology cannam@95: * cannam@95: * This program is free software; you can redistribute it and/or modify cannam@95: * it under the terms of the GNU General Public License as published by cannam@95: * the Free Software Foundation; either version 2 of the License, or cannam@95: * (at your option) any later version. cannam@95: * cannam@95: * This program is distributed in the hope that it will be useful, cannam@95: * but WITHOUT ANY WARRANTY; without even the implied warranty of cannam@95: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the cannam@95: * GNU General Public License for more details. cannam@95: * cannam@95: * You should have received a copy of the GNU General Public License cannam@95: * along with this program; if not, write to the Free Software cannam@95: * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA cannam@95: * cannam@95: */ cannam@95: cannam@95: /* This file was automatically generated --- DO NOT EDIT */ cannam@95: /* Generated on Sun Nov 25 07:39:33 EST 2012 */ cannam@95: cannam@95: #include "codelet-dft.h" cannam@95: cannam@95: #ifdef HAVE_FMA cannam@95: cannam@95: /* Generated by: ../../../genfft/gen_twidsq_c.native -fma -reorder-insns -schedule-for-pipeline -simd -compact -variables 4 -pipeline-latency 8 -n 2 -dif -name q1bv_2 -include q1b.h -sign 1 */ cannam@95: cannam@95: /* cannam@95: * This function contains 6 FP additions, 4 FP multiplications, cannam@95: * (or, 6 additions, 4 multiplications, 0 fused multiply/add), cannam@95: * 8 stack variables, 0 constants, and 8 memory accesses cannam@95: */ cannam@95: #include "q1b.h" cannam@95: cannam@95: static void q1bv_2(R *ri, R *ii, const R *W, stride rs, stride vs, INT mb, INT me, INT ms) cannam@95: { cannam@95: { cannam@95: INT m; cannam@95: R *x; cannam@95: x = ii; cannam@95: for (m = mb, W = W + (mb * ((TWVL / VL) * 2)); m < me; m = m + VL, x = x + (VL * ms), W = W + (TWVL * 2), MAKE_VOLATILE_STRIDE(4, rs), MAKE_VOLATILE_STRIDE(4, vs)) { cannam@95: V T1, T2, T4, T5, T3, T6; cannam@95: T1 = LD(&(x[0]), ms, &(x[0])); cannam@95: T2 = LD(&(x[WS(rs, 1)]), ms, &(x[WS(rs, 1)])); cannam@95: T4 = LD(&(x[WS(vs, 1)]), ms, &(x[WS(vs, 1)])); cannam@95: T5 = LD(&(x[WS(vs, 1) + WS(rs, 1)]), ms, &(x[WS(vs, 1) + WS(rs, 1)])); cannam@95: ST(&(x[0]), VADD(T1, T2), ms, &(x[0])); cannam@95: T3 = BYTW(&(W[0]), VSUB(T1, T2)); cannam@95: ST(&(x[WS(rs, 1)]), VADD(T4, T5), ms, &(x[WS(rs, 1)])); cannam@95: T6 = BYTW(&(W[0]), VSUB(T4, T5)); cannam@95: ST(&(x[WS(vs, 1)]), T3, ms, &(x[WS(vs, 1)])); cannam@95: ST(&(x[WS(vs, 1) + WS(rs, 1)]), T6, ms, &(x[WS(vs, 1) + WS(rs, 1)])); cannam@95: } cannam@95: } cannam@95: VLEAVE(); cannam@95: } cannam@95: cannam@95: static const tw_instr twinstr[] = { cannam@95: VTW(0, 1), cannam@95: {TW_NEXT, VL, 0} cannam@95: }; cannam@95: cannam@95: static const ct_desc desc = { 2, XSIMD_STRING("q1bv_2"), twinstr, &GENUS, {6, 4, 0, 0}, 0, 0, 0 }; cannam@95: cannam@95: void XSIMD(codelet_q1bv_2) (planner *p) { cannam@95: X(kdft_difsq_register) (p, q1bv_2, &desc); cannam@95: } cannam@95: #else /* HAVE_FMA */ cannam@95: cannam@95: /* Generated by: ../../../genfft/gen_twidsq_c.native -simd -compact -variables 4 -pipeline-latency 8 -n 2 -dif -name q1bv_2 -include q1b.h -sign 1 */ cannam@95: cannam@95: /* cannam@95: * This function contains 6 FP additions, 4 FP multiplications, cannam@95: * (or, 6 additions, 4 multiplications, 0 fused multiply/add), cannam@95: * 8 stack variables, 0 constants, and 8 memory accesses cannam@95: */ cannam@95: #include "q1b.h" cannam@95: cannam@95: static void q1bv_2(R *ri, R *ii, const R *W, stride rs, stride vs, INT mb, INT me, INT ms) cannam@95: { cannam@95: { cannam@95: INT m; cannam@95: R *x; cannam@95: x = ii; cannam@95: for (m = mb, W = W + (mb * ((TWVL / VL) * 2)); m < me; m = m + VL, x = x + (VL * ms), W = W + (TWVL * 2), MAKE_VOLATILE_STRIDE(4, rs), MAKE_VOLATILE_STRIDE(4, vs)) { cannam@95: V T1, T2, T3, T4, T5, T6; cannam@95: T1 = LD(&(x[0]), ms, &(x[0])); cannam@95: T2 = LD(&(x[WS(rs, 1)]), ms, &(x[WS(rs, 1)])); cannam@95: T3 = BYTW(&(W[0]), VSUB(T1, T2)); cannam@95: T4 = LD(&(x[WS(vs, 1)]), ms, &(x[WS(vs, 1)])); cannam@95: T5 = LD(&(x[WS(vs, 1) + WS(rs, 1)]), ms, &(x[WS(vs, 1) + WS(rs, 1)])); cannam@95: T6 = BYTW(&(W[0]), VSUB(T4, T5)); cannam@95: ST(&(x[WS(vs, 1)]), T3, ms, &(x[WS(vs, 1)])); cannam@95: ST(&(x[WS(vs, 1) + WS(rs, 1)]), T6, ms, &(x[WS(vs, 1) + WS(rs, 1)])); cannam@95: ST(&(x[0]), VADD(T1, T2), ms, &(x[0])); cannam@95: ST(&(x[WS(rs, 1)]), VADD(T4, T5), ms, &(x[WS(rs, 1)])); cannam@95: } cannam@95: } cannam@95: VLEAVE(); cannam@95: } cannam@95: cannam@95: static const tw_instr twinstr[] = { cannam@95: VTW(0, 1), cannam@95: {TW_NEXT, VL, 0} cannam@95: }; cannam@95: cannam@95: static const ct_desc desc = { 2, XSIMD_STRING("q1bv_2"), twinstr, &GENUS, {6, 4, 0, 0}, 0, 0, 0 }; cannam@95: cannam@95: void XSIMD(codelet_q1bv_2) (planner *p) { cannam@95: X(kdft_difsq_register) (p, q1bv_2, &desc); cannam@95: } cannam@95: #endif /* HAVE_FMA */