Chris@10: /* Chris@10: * Copyright (c) 2003, 2007-11 Matteo Frigo Chris@10: * Copyright (c) 2003, 2007-11 Massachusetts Institute of Technology Chris@10: * Chris@10: * This program is free software; you can redistribute it and/or modify Chris@10: * it under the terms of the GNU General Public License as published by Chris@10: * the Free Software Foundation; either version 2 of the License, or Chris@10: * (at your option) any later version. Chris@10: * Chris@10: * This program is distributed in the hope that it will be useful, Chris@10: * but WITHOUT ANY WARRANTY; without even the implied warranty of Chris@10: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the Chris@10: * GNU General Public License for more details. Chris@10: * Chris@10: * You should have received a copy of the GNU General Public License Chris@10: * along with this program; if not, write to the Free Software Chris@10: * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA Chris@10: * Chris@10: */ Chris@10: Chris@10: /* This file was automatically generated --- DO NOT EDIT */ Chris@10: /* Generated on Sun Nov 25 07:39:33 EST 2012 */ Chris@10: Chris@10: #include "codelet-dft.h" Chris@10: Chris@10: #ifdef HAVE_FMA Chris@10: Chris@10: /* Generated by: ../../../genfft/gen_twidsq_c.native -fma -reorder-insns -schedule-for-pipeline -simd -compact -variables 4 -pipeline-latency 8 -n 2 -dif -name q1bv_2 -include q1b.h -sign 1 */ Chris@10: Chris@10: /* Chris@10: * This function contains 6 FP additions, 4 FP multiplications, Chris@10: * (or, 6 additions, 4 multiplications, 0 fused multiply/add), Chris@10: * 8 stack variables, 0 constants, and 8 memory accesses Chris@10: */ Chris@10: #include "q1b.h" Chris@10: Chris@10: static void q1bv_2(R *ri, R *ii, const R *W, stride rs, stride vs, INT mb, INT me, INT ms) Chris@10: { Chris@10: { Chris@10: INT m; Chris@10: R *x; Chris@10: x = ii; Chris@10: for (m = mb, W = W + (mb * ((TWVL / VL) * 2)); m < me; m = m + VL, x = x + (VL * ms), W = W + (TWVL * 2), MAKE_VOLATILE_STRIDE(4, rs), MAKE_VOLATILE_STRIDE(4, vs)) { Chris@10: V T1, T2, T4, T5, T3, T6; Chris@10: T1 = LD(&(x[0]), ms, &(x[0])); Chris@10: T2 = LD(&(x[WS(rs, 1)]), ms, &(x[WS(rs, 1)])); Chris@10: T4 = LD(&(x[WS(vs, 1)]), ms, &(x[WS(vs, 1)])); Chris@10: T5 = LD(&(x[WS(vs, 1) + WS(rs, 1)]), ms, &(x[WS(vs, 1) + WS(rs, 1)])); Chris@10: ST(&(x[0]), VADD(T1, T2), ms, &(x[0])); Chris@10: T3 = BYTW(&(W[0]), VSUB(T1, T2)); Chris@10: ST(&(x[WS(rs, 1)]), VADD(T4, T5), ms, &(x[WS(rs, 1)])); Chris@10: T6 = BYTW(&(W[0]), VSUB(T4, T5)); Chris@10: ST(&(x[WS(vs, 1)]), T3, ms, &(x[WS(vs, 1)])); Chris@10: ST(&(x[WS(vs, 1) + WS(rs, 1)]), T6, ms, &(x[WS(vs, 1) + WS(rs, 1)])); Chris@10: } Chris@10: } Chris@10: VLEAVE(); Chris@10: } Chris@10: Chris@10: static const tw_instr twinstr[] = { Chris@10: VTW(0, 1), Chris@10: {TW_NEXT, VL, 0} Chris@10: }; Chris@10: Chris@10: static const ct_desc desc = { 2, XSIMD_STRING("q1bv_2"), twinstr, &GENUS, {6, 4, 0, 0}, 0, 0, 0 }; Chris@10: Chris@10: void XSIMD(codelet_q1bv_2) (planner *p) { Chris@10: X(kdft_difsq_register) (p, q1bv_2, &desc); Chris@10: } Chris@10: #else /* HAVE_FMA */ Chris@10: Chris@10: /* Generated by: ../../../genfft/gen_twidsq_c.native -simd -compact -variables 4 -pipeline-latency 8 -n 2 -dif -name q1bv_2 -include q1b.h -sign 1 */ Chris@10: Chris@10: /* Chris@10: * This function contains 6 FP additions, 4 FP multiplications, Chris@10: * (or, 6 additions, 4 multiplications, 0 fused multiply/add), Chris@10: * 8 stack variables, 0 constants, and 8 memory accesses Chris@10: */ Chris@10: #include "q1b.h" Chris@10: Chris@10: static void q1bv_2(R *ri, R *ii, const R *W, stride rs, stride vs, INT mb, INT me, INT ms) Chris@10: { Chris@10: { Chris@10: INT m; Chris@10: R *x; Chris@10: x = ii; Chris@10: for (m = mb, W = W + (mb * ((TWVL / VL) * 2)); m < me; m = m + VL, x = x + (VL * ms), W = W + (TWVL * 2), MAKE_VOLATILE_STRIDE(4, rs), MAKE_VOLATILE_STRIDE(4, vs)) { Chris@10: V T1, T2, T3, T4, T5, T6; Chris@10: T1 = LD(&(x[0]), ms, &(x[0])); Chris@10: T2 = LD(&(x[WS(rs, 1)]), ms, &(x[WS(rs, 1)])); Chris@10: T3 = BYTW(&(W[0]), VSUB(T1, T2)); Chris@10: T4 = LD(&(x[WS(vs, 1)]), ms, &(x[WS(vs, 1)])); Chris@10: T5 = LD(&(x[WS(vs, 1) + WS(rs, 1)]), ms, &(x[WS(vs, 1) + WS(rs, 1)])); Chris@10: T6 = BYTW(&(W[0]), VSUB(T4, T5)); Chris@10: ST(&(x[WS(vs, 1)]), T3, ms, &(x[WS(vs, 1)])); Chris@10: ST(&(x[WS(vs, 1) + WS(rs, 1)]), T6, ms, &(x[WS(vs, 1) + WS(rs, 1)])); Chris@10: ST(&(x[0]), VADD(T1, T2), ms, &(x[0])); Chris@10: ST(&(x[WS(rs, 1)]), VADD(T4, T5), ms, &(x[WS(rs, 1)])); Chris@10: } Chris@10: } Chris@10: VLEAVE(); Chris@10: } Chris@10: Chris@10: static const tw_instr twinstr[] = { Chris@10: VTW(0, 1), Chris@10: {TW_NEXT, VL, 0} Chris@10: }; Chris@10: Chris@10: static const ct_desc desc = { 2, XSIMD_STRING("q1bv_2"), twinstr, &GENUS, {6, 4, 0, 0}, 0, 0, 0 }; Chris@10: Chris@10: void XSIMD(codelet_q1bv_2) (planner *p) { Chris@10: X(kdft_difsq_register) (p, q1bv_2, &desc); Chris@10: } Chris@10: #endif /* HAVE_FMA */