Mercurial > hg > sv-dependency-builds
comparison src/fftw-3.3.8/dft/simd/common/n1fv_4.c @ 167:bd3cc4d1df30
Add FFTW 3.3.8 source, and a Linux build
author | Chris Cannam <cannam@all-day-breakfast.com> |
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date | Tue, 19 Nov 2019 14:52:55 +0000 |
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166:cbd6d7e562c7 | 167:bd3cc4d1df30 |
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1 /* | |
2 * Copyright (c) 2003, 2007-14 Matteo Frigo | |
3 * Copyright (c) 2003, 2007-14 Massachusetts Institute of Technology | |
4 * | |
5 * This program is free software; you can redistribute it and/or modify | |
6 * it under the terms of the GNU General Public License as published by | |
7 * the Free Software Foundation; either version 2 of the License, or | |
8 * (at your option) any later version. | |
9 * | |
10 * This program is distributed in the hope that it will be useful, | |
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 * GNU General Public License for more details. | |
14 * | |
15 * You should have received a copy of the GNU General Public License | |
16 * along with this program; if not, write to the Free Software | |
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA | |
18 * | |
19 */ | |
20 | |
21 /* This file was automatically generated --- DO NOT EDIT */ | |
22 /* Generated on Thu May 24 08:04:51 EDT 2018 */ | |
23 | |
24 #include "dft/codelet-dft.h" | |
25 | |
26 #if defined(ARCH_PREFERS_FMA) || defined(ISA_EXTENSION_PREFERS_FMA) | |
27 | |
28 /* Generated by: ../../../genfft/gen_notw_c.native -fma -simd -compact -variables 4 -pipeline-latency 8 -n 4 -name n1fv_4 -include dft/simd/n1f.h */ | |
29 | |
30 /* | |
31 * This function contains 8 FP additions, 2 FP multiplications, | |
32 * (or, 6 additions, 0 multiplications, 2 fused multiply/add), | |
33 * 11 stack variables, 0 constants, and 8 memory accesses | |
34 */ | |
35 #include "dft/simd/n1f.h" | |
36 | |
37 static void n1fv_4(const R *ri, const R *ii, R *ro, R *io, stride is, stride os, INT v, INT ivs, INT ovs) | |
38 { | |
39 { | |
40 INT i; | |
41 const R *xi; | |
42 R *xo; | |
43 xi = ri; | |
44 xo = ro; | |
45 for (i = v; i > 0; i = i - VL, xi = xi + (VL * ivs), xo = xo + (VL * ovs), MAKE_VOLATILE_STRIDE(8, is), MAKE_VOLATILE_STRIDE(8, os)) { | |
46 V T3, T7, T6, T8; | |
47 { | |
48 V T1, T2, T4, T5; | |
49 T1 = LD(&(xi[0]), ivs, &(xi[0])); | |
50 T2 = LD(&(xi[WS(is, 2)]), ivs, &(xi[0])); | |
51 T3 = VSUB(T1, T2); | |
52 T7 = VADD(T1, T2); | |
53 T4 = LD(&(xi[WS(is, 1)]), ivs, &(xi[WS(is, 1)])); | |
54 T5 = LD(&(xi[WS(is, 3)]), ivs, &(xi[WS(is, 1)])); | |
55 T6 = VSUB(T4, T5); | |
56 T8 = VADD(T4, T5); | |
57 } | |
58 ST(&(xo[WS(os, 1)]), VFNMSI(T6, T3), ovs, &(xo[WS(os, 1)])); | |
59 ST(&(xo[0]), VADD(T7, T8), ovs, &(xo[0])); | |
60 ST(&(xo[WS(os, 3)]), VFMAI(T6, T3), ovs, &(xo[WS(os, 1)])); | |
61 ST(&(xo[WS(os, 2)]), VSUB(T7, T8), ovs, &(xo[0])); | |
62 } | |
63 } | |
64 VLEAVE(); | |
65 } | |
66 | |
67 static const kdft_desc desc = { 4, XSIMD_STRING("n1fv_4"), {6, 0, 2, 0}, &GENUS, 0, 0, 0, 0 }; | |
68 | |
69 void XSIMD(codelet_n1fv_4) (planner *p) { | |
70 X(kdft_register) (p, n1fv_4, &desc); | |
71 } | |
72 | |
73 #else | |
74 | |
75 /* Generated by: ../../../genfft/gen_notw_c.native -simd -compact -variables 4 -pipeline-latency 8 -n 4 -name n1fv_4 -include dft/simd/n1f.h */ | |
76 | |
77 /* | |
78 * This function contains 8 FP additions, 0 FP multiplications, | |
79 * (or, 8 additions, 0 multiplications, 0 fused multiply/add), | |
80 * 11 stack variables, 0 constants, and 8 memory accesses | |
81 */ | |
82 #include "dft/simd/n1f.h" | |
83 | |
84 static void n1fv_4(const R *ri, const R *ii, R *ro, R *io, stride is, stride os, INT v, INT ivs, INT ovs) | |
85 { | |
86 { | |
87 INT i; | |
88 const R *xi; | |
89 R *xo; | |
90 xi = ri; | |
91 xo = ro; | |
92 for (i = v; i > 0; i = i - VL, xi = xi + (VL * ivs), xo = xo + (VL * ovs), MAKE_VOLATILE_STRIDE(8, is), MAKE_VOLATILE_STRIDE(8, os)) { | |
93 V T3, T7, T6, T8; | |
94 { | |
95 V T1, T2, T4, T5; | |
96 T1 = LD(&(xi[0]), ivs, &(xi[0])); | |
97 T2 = LD(&(xi[WS(is, 2)]), ivs, &(xi[0])); | |
98 T3 = VSUB(T1, T2); | |
99 T7 = VADD(T1, T2); | |
100 T4 = LD(&(xi[WS(is, 1)]), ivs, &(xi[WS(is, 1)])); | |
101 T5 = LD(&(xi[WS(is, 3)]), ivs, &(xi[WS(is, 1)])); | |
102 T6 = VBYI(VSUB(T4, T5)); | |
103 T8 = VADD(T4, T5); | |
104 } | |
105 ST(&(xo[WS(os, 1)]), VSUB(T3, T6), ovs, &(xo[WS(os, 1)])); | |
106 ST(&(xo[0]), VADD(T7, T8), ovs, &(xo[0])); | |
107 ST(&(xo[WS(os, 3)]), VADD(T3, T6), ovs, &(xo[WS(os, 1)])); | |
108 ST(&(xo[WS(os, 2)]), VSUB(T7, T8), ovs, &(xo[0])); | |
109 } | |
110 } | |
111 VLEAVE(); | |
112 } | |
113 | |
114 static const kdft_desc desc = { 4, XSIMD_STRING("n1fv_4"), {8, 0, 0, 0}, &GENUS, 0, 0, 0, 0 }; | |
115 | |
116 void XSIMD(codelet_n1fv_4) (planner *p) { | |
117 X(kdft_register) (p, n1fv_4, &desc); | |
118 } | |
119 | |
120 #endif |