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comparison src/fftw-3.3.3/dft/simd/common/q1bv_4.c @ 10:37bf6b4a2645

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Add FFTW3
author Chris Cannam
date Wed, 20 Mar 2013 15:35:50 +0000
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9:c0fb53affa76 10:37bf6b4a2645
1 /*
2 * Copyright (c) 2003, 2007-11 Matteo Frigo
3 * Copyright (c) 2003, 2007-11 Massachusetts Institute of Technology
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
18 *
19 */
20
21 /* This file was automatically generated --- DO NOT EDIT */
22 /* Generated on Sun Nov 25 07:39:33 EST 2012 */
23
24 #include "codelet-dft.h"
25
26 #ifdef HAVE_FMA
27
28 /* Generated by: ../../../genfft/gen_twidsq_c.native -fma -reorder-insns -schedule-for-pipeline -simd -compact -variables 4 -pipeline-latency 8 -n 4 -dif -name q1bv_4 -include q1b.h -sign 1 */
29
30 /*
31 * This function contains 44 FP additions, 32 FP multiplications,
32 * (or, 36 additions, 24 multiplications, 8 fused multiply/add),
33 * 38 stack variables, 0 constants, and 32 memory accesses
34 */
35 #include "q1b.h"
36
37 static void q1bv_4(R *ri, R *ii, const R *W, stride rs, stride vs, INT mb, INT me, INT ms)
38 {
39 {
40 INT m;
41 R *x;
42 x = ii;
43 for (m = mb, W = W + (mb * ((TWVL / VL) * 6)); m < me; m = m + VL, x = x + (VL * ms), W = W + (TWVL * 6), MAKE_VOLATILE_STRIDE(8, rs), MAKE_VOLATILE_STRIDE(8, vs)) {
44 V Tb, Tm, Tx, TI;
45 {
46 V Tc, T9, T3, TG, TA, TH, TD, Ta, T6, Td, Tn, To, Tq, Tr, Tf;
47 V Tg;
48 {
49 V T1, T2, Ty, Tz, TB, TC, T4, T5;
50 T1 = LD(&(x[0]), ms, &(x[0]));
51 T2 = LD(&(x[WS(rs, 2)]), ms, &(x[0]));
52 Ty = LD(&(x[WS(vs, 3)]), ms, &(x[WS(vs, 3)]));
53 Tz = LD(&(x[WS(vs, 3) + WS(rs, 2)]), ms, &(x[WS(vs, 3)]));
54 TB = LD(&(x[WS(vs, 3) + WS(rs, 1)]), ms, &(x[WS(vs, 3) + WS(rs, 1)]));
55 TC = LD(&(x[WS(vs, 3) + WS(rs, 3)]), ms, &(x[WS(vs, 3) + WS(rs, 1)]));
56 T4 = LD(&(x[WS(rs, 1)]), ms, &(x[WS(rs, 1)]));
57 T5 = LD(&(x[WS(rs, 3)]), ms, &(x[WS(rs, 1)]));
58 Tc = LD(&(x[WS(vs, 1)]), ms, &(x[WS(vs, 1)]));
59 T9 = VADD(T1, T2);
60 T3 = VSUB(T1, T2);
61 TG = VADD(Ty, Tz);
62 TA = VSUB(Ty, Tz);
63 TH = VADD(TB, TC);
64 TD = VSUB(TB, TC);
65 Ta = VADD(T4, T5);
66 T6 = VSUB(T4, T5);
67 Td = LD(&(x[WS(vs, 1) + WS(rs, 2)]), ms, &(x[WS(vs, 1)]));
68 Tn = LD(&(x[WS(vs, 2)]), ms, &(x[WS(vs, 2)]));
69 To = LD(&(x[WS(vs, 2) + WS(rs, 2)]), ms, &(x[WS(vs, 2)]));
70 Tq = LD(&(x[WS(vs, 2) + WS(rs, 1)]), ms, &(x[WS(vs, 2) + WS(rs, 1)]));
71 Tr = LD(&(x[WS(vs, 2) + WS(rs, 3)]), ms, &(x[WS(vs, 2) + WS(rs, 1)]));
72 Tf = LD(&(x[WS(vs, 1) + WS(rs, 1)]), ms, &(x[WS(vs, 1) + WS(rs, 1)]));
73 Tg = LD(&(x[WS(vs, 1) + WS(rs, 3)]), ms, &(x[WS(vs, 1) + WS(rs, 1)]));
74 }
75 {
76 V Tk, Te, Tv, Tp, Tw, Ts, Tl, Th, T7, TE, Tu, TF;
77 ST(&(x[0]), VADD(T9, Ta), ms, &(x[0]));
78 Tk = VADD(Tc, Td);
79 Te = VSUB(Tc, Td);
80 Tv = VADD(Tn, To);
81 Tp = VSUB(Tn, To);
82 Tw = VADD(Tq, Tr);
83 Ts = VSUB(Tq, Tr);
84 Tl = VADD(Tf, Tg);
85 Th = VSUB(Tf, Tg);
86 ST(&(x[WS(rs, 3)]), VADD(TG, TH), ms, &(x[WS(rs, 1)]));
87 T7 = BYTW(&(W[TWVL * 4]), VFNMSI(T6, T3));
88 TE = BYTW(&(W[TWVL * 4]), VFNMSI(TD, TA));
89 {
90 V Tt, Ti, Tj, T8;
91 T8 = BYTW(&(W[0]), VFMAI(T6, T3));
92 ST(&(x[WS(rs, 2)]), VADD(Tv, Tw), ms, &(x[0]));
93 Tt = BYTW(&(W[TWVL * 4]), VFNMSI(Ts, Tp));
94 ST(&(x[WS(rs, 1)]), VADD(Tk, Tl), ms, &(x[WS(rs, 1)]));
95 Ti = BYTW(&(W[TWVL * 4]), VFNMSI(Th, Te));
96 Tj = BYTW(&(W[0]), VFMAI(Th, Te));
97 ST(&(x[WS(vs, 3)]), T7, ms, &(x[WS(vs, 3)]));
98 ST(&(x[WS(vs, 3) + WS(rs, 3)]), TE, ms, &(x[WS(vs, 3) + WS(rs, 1)]));
99 ST(&(x[WS(vs, 1)]), T8, ms, &(x[WS(vs, 1)]));
100 Tu = BYTW(&(W[0]), VFMAI(Ts, Tp));
101 ST(&(x[WS(vs, 3) + WS(rs, 2)]), Tt, ms, &(x[WS(vs, 3)]));
102 TF = BYTW(&(W[0]), VFMAI(TD, TA));
103 ST(&(x[WS(vs, 3) + WS(rs, 1)]), Ti, ms, &(x[WS(vs, 3) + WS(rs, 1)]));
104 ST(&(x[WS(vs, 1) + WS(rs, 1)]), Tj, ms, &(x[WS(vs, 1) + WS(rs, 1)]));
105 }
106 Tb = BYTW(&(W[TWVL * 2]), VSUB(T9, Ta));
107 Tm = BYTW(&(W[TWVL * 2]), VSUB(Tk, Tl));
108 Tx = BYTW(&(W[TWVL * 2]), VSUB(Tv, Tw));
109 ST(&(x[WS(vs, 1) + WS(rs, 2)]), Tu, ms, &(x[WS(vs, 1)]));
110 TI = BYTW(&(W[TWVL * 2]), VSUB(TG, TH));
111 ST(&(x[WS(vs, 1) + WS(rs, 3)]), TF, ms, &(x[WS(vs, 1) + WS(rs, 1)]));
112 }
113 }
114 ST(&(x[WS(vs, 2)]), Tb, ms, &(x[WS(vs, 2)]));
115 ST(&(x[WS(vs, 2) + WS(rs, 1)]), Tm, ms, &(x[WS(vs, 2) + WS(rs, 1)]));
116 ST(&(x[WS(vs, 2) + WS(rs, 2)]), Tx, ms, &(x[WS(vs, 2)]));
117 ST(&(x[WS(vs, 2) + WS(rs, 3)]), TI, ms, &(x[WS(vs, 2) + WS(rs, 1)]));
118 }
119 }
120 VLEAVE();
121 }
122
123 static const tw_instr twinstr[] = {
124 VTW(0, 1),
125 VTW(0, 2),
126 VTW(0, 3),
127 {TW_NEXT, VL, 0}
128 };
129
130 static const ct_desc desc = { 4, XSIMD_STRING("q1bv_4"), twinstr, &GENUS, {36, 24, 8, 0}, 0, 0, 0 };
131
132 void XSIMD(codelet_q1bv_4) (planner *p) {
133 X(kdft_difsq_register) (p, q1bv_4, &desc);
134 }
135 #else /* HAVE_FMA */
136
137 /* Generated by: ../../../genfft/gen_twidsq_c.native -simd -compact -variables 4 -pipeline-latency 8 -n 4 -dif -name q1bv_4 -include q1b.h -sign 1 */
138
139 /*
140 * This function contains 44 FP additions, 24 FP multiplications,
141 * (or, 44 additions, 24 multiplications, 0 fused multiply/add),
142 * 22 stack variables, 0 constants, and 32 memory accesses
143 */
144 #include "q1b.h"
145
146 static void q1bv_4(R *ri, R *ii, const R *W, stride rs, stride vs, INT mb, INT me, INT ms)
147 {
148 {
149 INT m;
150 R *x;
151 x = ii;
152 for (m = mb, W = W + (mb * ((TWVL / VL) * 6)); m < me; m = m + VL, x = x + (VL * ms), W = W + (TWVL * 6), MAKE_VOLATILE_STRIDE(8, rs), MAKE_VOLATILE_STRIDE(8, vs)) {
153 V T3, T9, TA, TG, TD, TH, T6, Ta, Te, Tk, Tp, Tv, Ts, Tw, Th;
154 V Tl;
155 {
156 V T1, T2, Ty, Tz;
157 T1 = LD(&(x[0]), ms, &(x[0]));
158 T2 = LD(&(x[WS(rs, 2)]), ms, &(x[0]));
159 T3 = VSUB(T1, T2);
160 T9 = VADD(T1, T2);
161 Ty = LD(&(x[WS(vs, 3)]), ms, &(x[WS(vs, 3)]));
162 Tz = LD(&(x[WS(vs, 3) + WS(rs, 2)]), ms, &(x[WS(vs, 3)]));
163 TA = VSUB(Ty, Tz);
164 TG = VADD(Ty, Tz);
165 }
166 {
167 V TB, TC, T4, T5;
168 TB = LD(&(x[WS(vs, 3) + WS(rs, 1)]), ms, &(x[WS(vs, 3) + WS(rs, 1)]));
169 TC = LD(&(x[WS(vs, 3) + WS(rs, 3)]), ms, &(x[WS(vs, 3) + WS(rs, 1)]));
170 TD = VBYI(VSUB(TB, TC));
171 TH = VADD(TB, TC);
172 T4 = LD(&(x[WS(rs, 1)]), ms, &(x[WS(rs, 1)]));
173 T5 = LD(&(x[WS(rs, 3)]), ms, &(x[WS(rs, 1)]));
174 T6 = VBYI(VSUB(T4, T5));
175 Ta = VADD(T4, T5);
176 }
177 {
178 V Tc, Td, Tn, To;
179 Tc = LD(&(x[WS(vs, 1)]), ms, &(x[WS(vs, 1)]));
180 Td = LD(&(x[WS(vs, 1) + WS(rs, 2)]), ms, &(x[WS(vs, 1)]));
181 Te = VSUB(Tc, Td);
182 Tk = VADD(Tc, Td);
183 Tn = LD(&(x[WS(vs, 2)]), ms, &(x[WS(vs, 2)]));
184 To = LD(&(x[WS(vs, 2) + WS(rs, 2)]), ms, &(x[WS(vs, 2)]));
185 Tp = VSUB(Tn, To);
186 Tv = VADD(Tn, To);
187 }
188 {
189 V Tq, Tr, Tf, Tg;
190 Tq = LD(&(x[WS(vs, 2) + WS(rs, 1)]), ms, &(x[WS(vs, 2) + WS(rs, 1)]));
191 Tr = LD(&(x[WS(vs, 2) + WS(rs, 3)]), ms, &(x[WS(vs, 2) + WS(rs, 1)]));
192 Ts = VBYI(VSUB(Tq, Tr));
193 Tw = VADD(Tq, Tr);
194 Tf = LD(&(x[WS(vs, 1) + WS(rs, 1)]), ms, &(x[WS(vs, 1) + WS(rs, 1)]));
195 Tg = LD(&(x[WS(vs, 1) + WS(rs, 3)]), ms, &(x[WS(vs, 1) + WS(rs, 1)]));
196 Th = VBYI(VSUB(Tf, Tg));
197 Tl = VADD(Tf, Tg);
198 }
199 ST(&(x[0]), VADD(T9, Ta), ms, &(x[0]));
200 ST(&(x[WS(rs, 1)]), VADD(Tk, Tl), ms, &(x[WS(rs, 1)]));
201 ST(&(x[WS(rs, 2)]), VADD(Tv, Tw), ms, &(x[0]));
202 ST(&(x[WS(rs, 3)]), VADD(TG, TH), ms, &(x[WS(rs, 1)]));
203 {
204 V T7, Ti, Tt, TE;
205 T7 = BYTW(&(W[TWVL * 4]), VSUB(T3, T6));
206 ST(&(x[WS(vs, 3)]), T7, ms, &(x[WS(vs, 3)]));
207 Ti = BYTW(&(W[TWVL * 4]), VSUB(Te, Th));
208 ST(&(x[WS(vs, 3) + WS(rs, 1)]), Ti, ms, &(x[WS(vs, 3) + WS(rs, 1)]));
209 Tt = BYTW(&(W[TWVL * 4]), VSUB(Tp, Ts));
210 ST(&(x[WS(vs, 3) + WS(rs, 2)]), Tt, ms, &(x[WS(vs, 3)]));
211 TE = BYTW(&(W[TWVL * 4]), VSUB(TA, TD));
212 ST(&(x[WS(vs, 3) + WS(rs, 3)]), TE, ms, &(x[WS(vs, 3) + WS(rs, 1)]));
213 }
214 {
215 V T8, Tj, Tu, TF;
216 T8 = BYTW(&(W[0]), VADD(T3, T6));
217 ST(&(x[WS(vs, 1)]), T8, ms, &(x[WS(vs, 1)]));
218 Tj = BYTW(&(W[0]), VADD(Te, Th));
219 ST(&(x[WS(vs, 1) + WS(rs, 1)]), Tj, ms, &(x[WS(vs, 1) + WS(rs, 1)]));
220 Tu = BYTW(&(W[0]), VADD(Tp, Ts));
221 ST(&(x[WS(vs, 1) + WS(rs, 2)]), Tu, ms, &(x[WS(vs, 1)]));
222 TF = BYTW(&(W[0]), VADD(TA, TD));
223 ST(&(x[WS(vs, 1) + WS(rs, 3)]), TF, ms, &(x[WS(vs, 1) + WS(rs, 1)]));
224 }
225 {
226 V Tb, Tm, Tx, TI;
227 Tb = BYTW(&(W[TWVL * 2]), VSUB(T9, Ta));
228 ST(&(x[WS(vs, 2)]), Tb, ms, &(x[WS(vs, 2)]));
229 Tm = BYTW(&(W[TWVL * 2]), VSUB(Tk, Tl));
230 ST(&(x[WS(vs, 2) + WS(rs, 1)]), Tm, ms, &(x[WS(vs, 2) + WS(rs, 1)]));
231 Tx = BYTW(&(W[TWVL * 2]), VSUB(Tv, Tw));
232 ST(&(x[WS(vs, 2) + WS(rs, 2)]), Tx, ms, &(x[WS(vs, 2)]));
233 TI = BYTW(&(W[TWVL * 2]), VSUB(TG, TH));
234 ST(&(x[WS(vs, 2) + WS(rs, 3)]), TI, ms, &(x[WS(vs, 2) + WS(rs, 1)]));
235 }
236 }
237 }
238 VLEAVE();
239 }
240
241 static const tw_instr twinstr[] = {
242 VTW(0, 1),
243 VTW(0, 2),
244 VTW(0, 3),
245 {TW_NEXT, VL, 0}
246 };
247
248 static const ct_desc desc = { 4, XSIMD_STRING("q1bv_4"), twinstr, &GENUS, {44, 24, 0, 0}, 0, 0, 0 };
249
250 void XSIMD(codelet_q1bv_4) (planner *p) {
251 X(kdft_difsq_register) (p, q1bv_4, &desc);
252 }
253 #endif /* HAVE_FMA */