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comparison src/fftw-3.3.3/dft/simd/common/q1bv_2.c @ 10:37bf6b4a2645

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Add FFTW3
author Chris Cannam
date Wed, 20 Mar 2013 15:35:50 +0000
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9:c0fb53affa76 10:37bf6b4a2645
1 /*
2 * Copyright (c) 2003, 2007-11 Matteo Frigo
3 * Copyright (c) 2003, 2007-11 Massachusetts Institute of Technology
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
18 *
19 */
20
21 /* This file was automatically generated --- DO NOT EDIT */
22 /* Generated on Sun Nov 25 07:39:33 EST 2012 */
23
24 #include "codelet-dft.h"
25
26 #ifdef HAVE_FMA
27
28 /* Generated by: ../../../genfft/gen_twidsq_c.native -fma -reorder-insns -schedule-for-pipeline -simd -compact -variables 4 -pipeline-latency 8 -n 2 -dif -name q1bv_2 -include q1b.h -sign 1 */
29
30 /*
31 * This function contains 6 FP additions, 4 FP multiplications,
32 * (or, 6 additions, 4 multiplications, 0 fused multiply/add),
33 * 8 stack variables, 0 constants, and 8 memory accesses
34 */
35 #include "q1b.h"
36
37 static void q1bv_2(R *ri, R *ii, const R *W, stride rs, stride vs, INT mb, INT me, INT ms)
38 {
39 {
40 INT m;
41 R *x;
42 x = ii;
43 for (m = mb, W = W + (mb * ((TWVL / VL) * 2)); m < me; m = m + VL, x = x + (VL * ms), W = W + (TWVL * 2), MAKE_VOLATILE_STRIDE(4, rs), MAKE_VOLATILE_STRIDE(4, vs)) {
44 V T1, T2, T4, T5, T3, T6;
45 T1 = LD(&(x[0]), ms, &(x[0]));
46 T2 = LD(&(x[WS(rs, 1)]), ms, &(x[WS(rs, 1)]));
47 T4 = LD(&(x[WS(vs, 1)]), ms, &(x[WS(vs, 1)]));
48 T5 = LD(&(x[WS(vs, 1) + WS(rs, 1)]), ms, &(x[WS(vs, 1) + WS(rs, 1)]));
49 ST(&(x[0]), VADD(T1, T2), ms, &(x[0]));
50 T3 = BYTW(&(W[0]), VSUB(T1, T2));
51 ST(&(x[WS(rs, 1)]), VADD(T4, T5), ms, &(x[WS(rs, 1)]));
52 T6 = BYTW(&(W[0]), VSUB(T4, T5));
53 ST(&(x[WS(vs, 1)]), T3, ms, &(x[WS(vs, 1)]));
54 ST(&(x[WS(vs, 1) + WS(rs, 1)]), T6, ms, &(x[WS(vs, 1) + WS(rs, 1)]));
55 }
56 }
57 VLEAVE();
58 }
59
60 static const tw_instr twinstr[] = {
61 VTW(0, 1),
62 {TW_NEXT, VL, 0}
63 };
64
65 static const ct_desc desc = { 2, XSIMD_STRING("q1bv_2"), twinstr, &GENUS, {6, 4, 0, 0}, 0, 0, 0 };
66
67 void XSIMD(codelet_q1bv_2) (planner *p) {
68 X(kdft_difsq_register) (p, q1bv_2, &desc);
69 }
70 #else /* HAVE_FMA */
71
72 /* Generated by: ../../../genfft/gen_twidsq_c.native -simd -compact -variables 4 -pipeline-latency 8 -n 2 -dif -name q1bv_2 -include q1b.h -sign 1 */
73
74 /*
75 * This function contains 6 FP additions, 4 FP multiplications,
76 * (or, 6 additions, 4 multiplications, 0 fused multiply/add),
77 * 8 stack variables, 0 constants, and 8 memory accesses
78 */
79 #include "q1b.h"
80
81 static void q1bv_2(R *ri, R *ii, const R *W, stride rs, stride vs, INT mb, INT me, INT ms)
82 {
83 {
84 INT m;
85 R *x;
86 x = ii;
87 for (m = mb, W = W + (mb * ((TWVL / VL) * 2)); m < me; m = m + VL, x = x + (VL * ms), W = W + (TWVL * 2), MAKE_VOLATILE_STRIDE(4, rs), MAKE_VOLATILE_STRIDE(4, vs)) {
88 V T1, T2, T3, T4, T5, T6;
89 T1 = LD(&(x[0]), ms, &(x[0]));
90 T2 = LD(&(x[WS(rs, 1)]), ms, &(x[WS(rs, 1)]));
91 T3 = BYTW(&(W[0]), VSUB(T1, T2));
92 T4 = LD(&(x[WS(vs, 1)]), ms, &(x[WS(vs, 1)]));
93 T5 = LD(&(x[WS(vs, 1) + WS(rs, 1)]), ms, &(x[WS(vs, 1) + WS(rs, 1)]));
94 T6 = BYTW(&(W[0]), VSUB(T4, T5));
95 ST(&(x[WS(vs, 1)]), T3, ms, &(x[WS(vs, 1)]));
96 ST(&(x[WS(vs, 1) + WS(rs, 1)]), T6, ms, &(x[WS(vs, 1) + WS(rs, 1)]));
97 ST(&(x[0]), VADD(T1, T2), ms, &(x[0]));
98 ST(&(x[WS(rs, 1)]), VADD(T4, T5), ms, &(x[WS(rs, 1)]));
99 }
100 }
101 VLEAVE();
102 }
103
104 static const tw_instr twinstr[] = {
105 VTW(0, 1),
106 {TW_NEXT, VL, 0}
107 };
108
109 static const ct_desc desc = { 2, XSIMD_STRING("q1bv_2"), twinstr, &GENUS, {6, 4, 0, 0}, 0, 0, 0 };
110
111 void XSIMD(codelet_q1bv_2) (planner *p) {
112 X(kdft_difsq_register) (p, q1bv_2, &desc);
113 }
114 #endif /* HAVE_FMA */