annotate src/fftw-3.3.5/simd-support/x86-cpuid.h @ 148:b4bfdf10c4b3

Update Win64 capnp builds to v0.6
author Chris Cannam <cannam@all-day-breakfast.com>
date Mon, 22 May 2017 18:56:49 +0100
parents 7867fa7e1b6b
children
rev   line source
cannam@127 1 /*
cannam@127 2 * Copyright (c) 2003, 2007-14 Matteo Frigo
cannam@127 3 * Copyright (c) 2003, 2007-14 Massachusetts Institute of Technology
cannam@127 4 *
cannam@127 5 * This program is free software; you can redistribute it and/or modify
cannam@127 6 * it under the terms of the GNU General Public License as published by
cannam@127 7 * the Free Software Foundation; either version 2 of the License, or
cannam@127 8 * (at your option) any later version.
cannam@127 9 *
cannam@127 10 * This program is distributed in the hope that it will be useful,
cannam@127 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
cannam@127 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
cannam@127 13 * GNU General Public License for more details.
cannam@127 14 *
cannam@127 15 * You should have received a copy of the GNU General Public License
cannam@127 16 * along with this program; if not, write to the Free Software
cannam@127 17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
cannam@127 18 *
cannam@127 19 */
cannam@127 20
cannam@127 21
cannam@127 22 /* this code was kindly donated by Eric J. Korpela */
cannam@127 23
cannam@127 24 #ifdef _MSC_VER
cannam@127 25 #ifndef inline
cannam@127 26 #define inline __inline
cannam@127 27 #endif
cannam@127 28 #endif
cannam@127 29
cannam@127 30 static inline int is_386()
cannam@127 31 {
cannam@127 32 #ifdef _MSC_VER
cannam@127 33 unsigned int result,tst;
cannam@127 34 _asm {
cannam@127 35 pushfd
cannam@127 36 pop eax
cannam@127 37 mov edx,eax
cannam@127 38 xor eax,40000h
cannam@127 39 push eax
cannam@127 40 popfd
cannam@127 41 pushfd
cannam@127 42 pop eax
cannam@127 43 push edx
cannam@127 44 popfd
cannam@127 45 mov tst,edx
cannam@127 46 mov result,eax
cannam@127 47 }
cannam@127 48 #else
cannam@127 49 register unsigned int result,tst;
cannam@127 50 __asm__ (
cannam@127 51 "pushfl\n\t"
cannam@127 52 "popl %0\n\t"
cannam@127 53 "movl %0,%1\n\t"
cannam@127 54 "xorl $0x40000,%0\n\t"
cannam@127 55 "pushl %0\n\t"
cannam@127 56 "popfl\n\t"
cannam@127 57 "pushfl\n\t"
cannam@127 58 "popl %0\n\t"
cannam@127 59 "pushl %1\n\t"
cannam@127 60 "popfl"
cannam@127 61 : "=r" (result), "=r" (tst) /* output */
cannam@127 62 : /* no inputs */
cannam@127 63 );
cannam@127 64 #endif
cannam@127 65 return (result == tst);
cannam@127 66 }
cannam@127 67
cannam@127 68 static inline int has_cpuid()
cannam@127 69 {
cannam@127 70 #ifdef _MSC_VER
cannam@127 71 unsigned int result,tst;
cannam@127 72 _asm {
cannam@127 73 pushfd
cannam@127 74 pop eax
cannam@127 75 mov edx,eax
cannam@127 76 xor eax,200000h
cannam@127 77 push eax
cannam@127 78 popfd
cannam@127 79 pushfd
cannam@127 80 pop eax
cannam@127 81 push edx
cannam@127 82 popfd
cannam@127 83 mov tst,edx
cannam@127 84 mov result,eax
cannam@127 85 }
cannam@127 86 #else
cannam@127 87 register unsigned int result,tst;
cannam@127 88 __asm__ (
cannam@127 89 "pushfl\n\t"
cannam@127 90 "pop %0\n\t"
cannam@127 91 "movl %0,%1\n\t"
cannam@127 92 "xorl $0x200000,%0\n\t"
cannam@127 93 "pushl %0\n\t"
cannam@127 94 "popfl\n\t"
cannam@127 95 "pushfl\n\t"
cannam@127 96 "popl %0\n\t"
cannam@127 97 "pushl %1\n\t"
cannam@127 98 "popfl"
cannam@127 99 : "=r" (result), "=r" (tst) /* output */
cannam@127 100 : /* no inputs */
cannam@127 101 );
cannam@127 102 #endif
cannam@127 103 return (result != tst);
cannam@127 104 }
cannam@127 105
cannam@127 106 /* cpuid version to get all registers. Donated by Erik Lindahl from Gromacs. */
cannam@127 107 static inline void
cannam@127 108 cpuid_all(int level, int ecxval, int *eax, int *ebx, int *ecx, int *edx)
cannam@127 109 {
cannam@127 110 #if (defined _MSC_VER)
cannam@127 111 int CPUInfo[4];
cannam@127 112
cannam@127 113 # if (_MSC_VER > 1500) || (_MSC_VER == 1500 & _MSC_FULL_VER >= 150030729)
cannam@127 114 /* MSVC 9.0 SP1 or later */
cannam@127 115 __cpuidex(CPUInfo, level, ecxval);
cannam@127 116 rc = 0;
cannam@127 117 # else
cannam@127 118 __cpuid(CPUInfo, level);
cannam@127 119 /* Set an error code if the user wanted a non-zero ecxval, since we did not have cpuidex */
cannam@127 120 rc = (ecxval > 0) ? -1 : 0;
cannam@127 121 # endif
cannam@127 122 *eax = CPUInfo[0];
cannam@127 123 *ebx = CPUInfo[1];
cannam@127 124 *ecx = CPUInfo[2];
cannam@127 125 *edx = CPUInfo[3];
cannam@127 126
cannam@127 127 #else
cannam@127 128 /* Not MSVC */
cannam@127 129 *eax = level;
cannam@127 130 *ecx = ecxval;
cannam@127 131 *ebx = 0;
cannam@127 132 *edx = 0;
cannam@127 133 /* Avoid clobbering global offset table in 32-bit pic code (ebx) */
cannam@127 134 # if defined(__PIC__)
cannam@127 135 __asm__ ("xchgl %%ebx, %1 \n\t"
cannam@127 136 "cpuid \n\t"
cannam@127 137 "xchgl %%ebx, %1 \n\t"
cannam@127 138 : "+a" (*eax), "+r" (*ebx), "+c" (*ecx), "+d" (*edx));
cannam@127 139 # else
cannam@127 140 /* No need to save ebx if we are not in pic mode */
cannam@127 141 __asm__ ("cpuid \n\t"
cannam@127 142 : "+a" (*eax), "+b" (*ebx), "+c" (*ecx), "+d" (*edx));
cannam@127 143 # endif
cannam@127 144 #endif
cannam@127 145 }
cannam@127 146
cannam@127 147 static inline int cpuid_edx(int op)
cannam@127 148 {
cannam@127 149 # ifdef _MSC_VER
cannam@127 150 int result;
cannam@127 151 _asm {
cannam@127 152 push ebx
cannam@127 153 mov eax,op
cannam@127 154 cpuid
cannam@127 155 mov result,edx
cannam@127 156 pop ebx
cannam@127 157 }
cannam@127 158 return result;
cannam@127 159 # else
cannam@127 160 int eax, ecx, edx;
cannam@127 161
cannam@127 162 __asm__("push %%ebx\n\tcpuid\n\tpop %%ebx"
cannam@127 163 : "=a" (eax), "=c" (ecx), "=d" (edx)
cannam@127 164 : "a" (op));
cannam@127 165 return edx;
cannam@127 166 # endif
cannam@127 167 }
cannam@127 168
cannam@127 169 static inline int cpuid_ecx(int op)
cannam@127 170 {
cannam@127 171 # ifdef _MSC_VER
cannam@127 172 int result;
cannam@127 173 _asm {
cannam@127 174 push ebx
cannam@127 175 mov eax,op
cannam@127 176 cpuid
cannam@127 177 mov result,ecx
cannam@127 178 pop ebx
cannam@127 179 }
cannam@127 180 return result;
cannam@127 181 # else
cannam@127 182 int eax, ecx, edx;
cannam@127 183
cannam@127 184 __asm__("push %%ebx\n\tcpuid\n\tpop %%ebx"
cannam@127 185 : "=a" (eax), "=c" (ecx), "=d" (edx)
cannam@127 186 : "a" (op));
cannam@127 187 return ecx;
cannam@127 188 # endif
cannam@127 189 }
cannam@127 190
cannam@127 191 static inline int xgetbv_eax(int op)
cannam@127 192 {
cannam@127 193 # ifdef _MSC_VER
cannam@127 194 int veax, vedx;
cannam@127 195 _asm {
cannam@127 196 mov ecx,op
cannam@127 197 # if defined(__INTEL_COMPILER) || (_MSC_VER >= 1600)
cannam@127 198 xgetbv
cannam@127 199 # else
cannam@127 200 __emit 15
cannam@127 201 __emit 1
cannam@127 202 __emit 208
cannam@127 203 # endif
cannam@127 204 mov veax,eax
cannam@127 205 mov vedx,edx
cannam@127 206 }
cannam@127 207 return veax;
cannam@127 208 # else
cannam@127 209 int eax, edx;
cannam@127 210 __asm__ (".byte 0x0f, 0x01, 0xd0" : "=a"(eax), "=d"(edx) : "c" (op));
cannam@127 211 return eax;
cannam@127 212 #endif
cannam@127 213 }