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annotate src/opus-1.3/celt/x86/x86cpu.c @ 77:4edcd14160a5 pa_catalina

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Duplicate for patch testing
author Chris Cannam
date Wed, 30 Oct 2019 11:25:10 +0000
parents 7aeed7906520
children
rev   line source
Chris@69 1 /* Copyright (c) 2014, Cisco Systems, INC
Chris@69 2 Written by XiangMingZhu WeiZhou MinPeng YanWang
Chris@69 3
Chris@69 4 Redistribution and use in source and binary forms, with or without
Chris@69 5 modification, are permitted provided that the following conditions
Chris@69 6 are met:
Chris@69 7
Chris@69 8 - Redistributions of source code must retain the above copyright
Chris@69 9 notice, this list of conditions and the following disclaimer.
Chris@69 10
Chris@69 11 - Redistributions in binary form must reproduce the above copyright
Chris@69 12 notice, this list of conditions and the following disclaimer in the
Chris@69 13 documentation and/or other materials provided with the distribution.
Chris@69 14
Chris@69 15 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
Chris@69 16 ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
Chris@69 17 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
Chris@69 18 A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
Chris@69 19 OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
Chris@69 20 EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
Chris@69 21 PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
Chris@69 22 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
Chris@69 23 LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
Chris@69 24 NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
Chris@69 25 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Chris@69 26 */
Chris@69 27
Chris@69 28 #ifdef HAVE_CONFIG_H
Chris@69 29 #include "config.h"
Chris@69 30 #endif
Chris@69 31
Chris@69 32 #include "cpu_support.h"
Chris@69 33 #include "macros.h"
Chris@69 34 #include "main.h"
Chris@69 35 #include "pitch.h"
Chris@69 36 #include "x86cpu.h"
Chris@69 37
Chris@69 38 #if (defined(OPUS_X86_MAY_HAVE_SSE) && !defined(OPUS_X86_PRESUME_SSE)) || \
Chris@69 39 (defined(OPUS_X86_MAY_HAVE_SSE2) && !defined(OPUS_X86_PRESUME_SSE2)) || \
Chris@69 40 (defined(OPUS_X86_MAY_HAVE_SSE4_1) && !defined(OPUS_X86_PRESUME_SSE4_1)) || \
Chris@69 41 (defined(OPUS_X86_MAY_HAVE_AVX) && !defined(OPUS_X86_PRESUME_AVX))
Chris@69 42
Chris@69 43
Chris@69 44 #if defined(_MSC_VER)
Chris@69 45
Chris@69 46 #include <intrin.h>
Chris@69 47 static _inline void cpuid(unsigned int CPUInfo[4], unsigned int InfoType)
Chris@69 48 {
Chris@69 49 __cpuid((int*)CPUInfo, InfoType);
Chris@69 50 }
Chris@69 51
Chris@69 52 #else
Chris@69 53
Chris@69 54 #if defined(CPU_INFO_BY_C)
Chris@69 55 #include <cpuid.h>
Chris@69 56 #endif
Chris@69 57
Chris@69 58 static void cpuid(unsigned int CPUInfo[4], unsigned int InfoType)
Chris@69 59 {
Chris@69 60 #if defined(CPU_INFO_BY_ASM)
Chris@69 61 #if defined(__i386__) && defined(__PIC__)
Chris@69 62 /* %ebx is PIC register in 32-bit, so mustn't clobber it. */
Chris@69 63 __asm__ __volatile__ (
Chris@69 64 "xchg %%ebx, %1\n"
Chris@69 65 "cpuid\n"
Chris@69 66 "xchg %%ebx, %1\n":
Chris@69 67 "=a" (CPUInfo[0]),
Chris@69 68 "=r" (CPUInfo[1]),
Chris@69 69 "=c" (CPUInfo[2]),
Chris@69 70 "=d" (CPUInfo[3]) :
Chris@69 71 "0" (InfoType)
Chris@69 72 );
Chris@69 73 #else
Chris@69 74 __asm__ __volatile__ (
Chris@69 75 "cpuid":
Chris@69 76 "=a" (CPUInfo[0]),
Chris@69 77 "=b" (CPUInfo[1]),
Chris@69 78 "=c" (CPUInfo[2]),
Chris@69 79 "=d" (CPUInfo[3]) :
Chris@69 80 "0" (InfoType)
Chris@69 81 );
Chris@69 82 #endif
Chris@69 83 #elif defined(CPU_INFO_BY_C)
Chris@69 84 __get_cpuid(InfoType, &(CPUInfo[0]), &(CPUInfo[1]), &(CPUInfo[2]), &(CPUInfo[3]));
Chris@69 85 #endif
Chris@69 86 }
Chris@69 87
Chris@69 88 #endif
Chris@69 89
Chris@69 90 typedef struct CPU_Feature{
Chris@69 91 /* SIMD: 128-bit */
Chris@69 92 int HW_SSE;
Chris@69 93 int HW_SSE2;
Chris@69 94 int HW_SSE41;
Chris@69 95 /* SIMD: 256-bit */
Chris@69 96 int HW_AVX;
Chris@69 97 } CPU_Feature;
Chris@69 98
Chris@69 99 static void opus_cpu_feature_check(CPU_Feature *cpu_feature)
Chris@69 100 {
Chris@69 101 unsigned int info[4] = {0};
Chris@69 102 unsigned int nIds = 0;
Chris@69 103
Chris@69 104 cpuid(info, 0);
Chris@69 105 nIds = info[0];
Chris@69 106
Chris@69 107 if (nIds >= 1){
Chris@69 108 cpuid(info, 1);
Chris@69 109 cpu_feature->HW_SSE = (info[3] & (1 << 25)) != 0;
Chris@69 110 cpu_feature->HW_SSE2 = (info[3] & (1 << 26)) != 0;
Chris@69 111 cpu_feature->HW_SSE41 = (info[2] & (1 << 19)) != 0;
Chris@69 112 cpu_feature->HW_AVX = (info[2] & (1 << 28)) != 0;
Chris@69 113 }
Chris@69 114 else {
Chris@69 115 cpu_feature->HW_SSE = 0;
Chris@69 116 cpu_feature->HW_SSE2 = 0;
Chris@69 117 cpu_feature->HW_SSE41 = 0;
Chris@69 118 cpu_feature->HW_AVX = 0;
Chris@69 119 }
Chris@69 120 }
Chris@69 121
Chris@69 122 int opus_select_arch(void)
Chris@69 123 {
Chris@69 124 CPU_Feature cpu_feature;
Chris@69 125 int arch;
Chris@69 126
Chris@69 127 opus_cpu_feature_check(&cpu_feature);
Chris@69 128
Chris@69 129 arch = 0;
Chris@69 130 if (!cpu_feature.HW_SSE)
Chris@69 131 {
Chris@69 132 return arch;
Chris@69 133 }
Chris@69 134 arch++;
Chris@69 135
Chris@69 136 if (!cpu_feature.HW_SSE2)
Chris@69 137 {
Chris@69 138 return arch;
Chris@69 139 }
Chris@69 140 arch++;
Chris@69 141
Chris@69 142 if (!cpu_feature.HW_SSE41)
Chris@69 143 {
Chris@69 144 return arch;
Chris@69 145 }
Chris@69 146 arch++;
Chris@69 147
Chris@69 148 if (!cpu_feature.HW_AVX)
Chris@69 149 {
Chris@69 150 return arch;
Chris@69 151 }
Chris@69 152 arch++;
Chris@69 153
Chris@69 154 return arch;
Chris@69 155 }
Chris@69 156
Chris@69 157 #endif