yading@10: /* yading@10: * ARM NEON optimised Format Conversion Utils yading@10: * Copyright (c) 2008 Mans Rullgard yading@10: * yading@10: * This file is part of FFmpeg. yading@10: * yading@10: * FFmpeg is free software; you can redistribute it and/or yading@10: * modify it under the terms of the GNU Lesser General Public yading@10: * License as published by the Free Software Foundation; either yading@10: * version 2.1 of the License, or (at your option) any later version. yading@10: * yading@10: * FFmpeg is distributed in the hope that it will be useful, yading@10: * but WITHOUT ANY WARRANTY; without even the implied warranty of yading@10: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU yading@10: * Lesser General Public License for more details. yading@10: * yading@10: * You should have received a copy of the GNU Lesser General Public yading@10: * License along with FFmpeg; if not, write to the Free Software yading@10: * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA yading@10: */ yading@10: yading@10: #include "config.h" yading@10: #include "libavutil/arm/asm.S" yading@10: yading@10: function ff_float_to_int16_neon, export=1 yading@10: subs r2, r2, #8 yading@10: vld1.64 {d0-d1}, [r1,:128]! yading@10: vcvt.s32.f32 q8, q0, #16 yading@10: vld1.64 {d2-d3}, [r1,:128]! yading@10: vcvt.s32.f32 q9, q1, #16 yading@10: beq 3f yading@10: bics ip, r2, #15 yading@10: beq 2f yading@10: 1: subs ip, ip, #16 yading@10: vshrn.s32 d4, q8, #16 yading@10: vld1.64 {d0-d1}, [r1,:128]! yading@10: vcvt.s32.f32 q0, q0, #16 yading@10: vshrn.s32 d5, q9, #16 yading@10: vld1.64 {d2-d3}, [r1,:128]! yading@10: vcvt.s32.f32 q1, q1, #16 yading@10: vshrn.s32 d6, q0, #16 yading@10: vst1.64 {d4-d5}, [r0,:128]! yading@10: vshrn.s32 d7, q1, #16 yading@10: vld1.64 {d16-d17},[r1,:128]! yading@10: vcvt.s32.f32 q8, q8, #16 yading@10: vld1.64 {d18-d19},[r1,:128]! yading@10: vcvt.s32.f32 q9, q9, #16 yading@10: vst1.64 {d6-d7}, [r0,:128]! yading@10: bne 1b yading@10: ands r2, r2, #15 yading@10: beq 3f yading@10: 2: vld1.64 {d0-d1}, [r1,:128]! yading@10: vshrn.s32 d4, q8, #16 yading@10: vcvt.s32.f32 q0, q0, #16 yading@10: vld1.64 {d2-d3}, [r1,:128]! yading@10: vshrn.s32 d5, q9, #16 yading@10: vcvt.s32.f32 q1, q1, #16 yading@10: vshrn.s32 d6, q0, #16 yading@10: vst1.64 {d4-d5}, [r0,:128]! yading@10: vshrn.s32 d7, q1, #16 yading@10: vst1.64 {d6-d7}, [r0,:128]! yading@10: bx lr yading@10: 3: vshrn.s32 d4, q8, #16 yading@10: vshrn.s32 d5, q9, #16 yading@10: vst1.64 {d4-d5}, [r0,:128]! yading@10: bx lr yading@10: endfunc yading@10: yading@10: function ff_float_to_int16_interleave_neon, export=1 yading@10: cmp r3, #2 yading@10: itt lt yading@10: ldrlt r1, [r1] yading@10: blt ff_float_to_int16_neon yading@10: bne 4f yading@10: yading@10: ldr r3, [r1] yading@10: ldr r1, [r1, #4] yading@10: yading@10: subs r2, r2, #8 yading@10: vld1.64 {d0-d1}, [r3,:128]! yading@10: vcvt.s32.f32 q8, q0, #16 yading@10: vld1.64 {d2-d3}, [r3,:128]! yading@10: vcvt.s32.f32 q9, q1, #16 yading@10: vld1.64 {d20-d21},[r1,:128]! yading@10: vcvt.s32.f32 q10, q10, #16 yading@10: vld1.64 {d22-d23},[r1,:128]! yading@10: vcvt.s32.f32 q11, q11, #16 yading@10: beq 3f yading@10: bics ip, r2, #15 yading@10: beq 2f yading@10: 1: subs ip, ip, #16 yading@10: vld1.64 {d0-d1}, [r3,:128]! yading@10: vcvt.s32.f32 q0, q0, #16 yading@10: vsri.32 q10, q8, #16 yading@10: vld1.64 {d2-d3}, [r3,:128]! yading@10: vcvt.s32.f32 q1, q1, #16 yading@10: vld1.64 {d24-d25},[r1,:128]! yading@10: vcvt.s32.f32 q12, q12, #16 yading@10: vld1.64 {d26-d27},[r1,:128]! yading@10: vsri.32 q11, q9, #16 yading@10: vst1.64 {d20-d21},[r0,:128]! yading@10: vcvt.s32.f32 q13, q13, #16 yading@10: vst1.64 {d22-d23},[r0,:128]! yading@10: vsri.32 q12, q0, #16 yading@10: vld1.64 {d16-d17},[r3,:128]! yading@10: vsri.32 q13, q1, #16 yading@10: vst1.64 {d24-d25},[r0,:128]! yading@10: vcvt.s32.f32 q8, q8, #16 yading@10: vld1.64 {d18-d19},[r3,:128]! yading@10: vcvt.s32.f32 q9, q9, #16 yading@10: vld1.64 {d20-d21},[r1,:128]! yading@10: vcvt.s32.f32 q10, q10, #16 yading@10: vld1.64 {d22-d23},[r1,:128]! yading@10: vcvt.s32.f32 q11, q11, #16 yading@10: vst1.64 {d26-d27},[r0,:128]! yading@10: bne 1b yading@10: ands r2, r2, #15 yading@10: beq 3f yading@10: 2: vsri.32 q10, q8, #16 yading@10: vld1.64 {d0-d1}, [r3,:128]! yading@10: vcvt.s32.f32 q0, q0, #16 yading@10: vld1.64 {d2-d3}, [r3,:128]! yading@10: vcvt.s32.f32 q1, q1, #16 yading@10: vld1.64 {d24-d25},[r1,:128]! yading@10: vcvt.s32.f32 q12, q12, #16 yading@10: vsri.32 q11, q9, #16 yading@10: vld1.64 {d26-d27},[r1,:128]! yading@10: vcvt.s32.f32 q13, q13, #16 yading@10: vst1.64 {d20-d21},[r0,:128]! yading@10: vsri.32 q12, q0, #16 yading@10: vst1.64 {d22-d23},[r0,:128]! yading@10: vsri.32 q13, q1, #16 yading@10: vst1.64 {d24-d27},[r0,:128]! yading@10: bx lr yading@10: 3: vsri.32 q10, q8, #16 yading@10: vsri.32 q11, q9, #16 yading@10: vst1.64 {d20-d23},[r0,:128]! yading@10: bx lr yading@10: yading@10: 4: push {r4-r8,lr} yading@10: cmp r3, #4 yading@10: lsl ip, r3, #1 yading@10: blt 4f yading@10: yading@10: @ 4 channels yading@10: 5: ldmia r1!, {r4-r7} yading@10: mov lr, r2 yading@10: mov r8, r0 yading@10: vld1.64 {d16-d17},[r4,:128]! yading@10: vcvt.s32.f32 q8, q8, #16 yading@10: vld1.64 {d18-d19},[r5,:128]! yading@10: vcvt.s32.f32 q9, q9, #16 yading@10: vld1.64 {d20-d21},[r6,:128]! yading@10: vcvt.s32.f32 q10, q10, #16 yading@10: vld1.64 {d22-d23},[r7,:128]! yading@10: vcvt.s32.f32 q11, q11, #16 yading@10: 6: subs lr, lr, #8 yading@10: vld1.64 {d0-d1}, [r4,:128]! yading@10: vcvt.s32.f32 q0, q0, #16 yading@10: vsri.32 q9, q8, #16 yading@10: vld1.64 {d2-d3}, [r5,:128]! yading@10: vcvt.s32.f32 q1, q1, #16 yading@10: vsri.32 q11, q10, #16 yading@10: vld1.64 {d4-d5}, [r6,:128]! yading@10: vcvt.s32.f32 q2, q2, #16 yading@10: vzip.32 d18, d22 yading@10: vld1.64 {d6-d7}, [r7,:128]! yading@10: vcvt.s32.f32 q3, q3, #16 yading@10: vzip.32 d19, d23 yading@10: vst1.64 {d18}, [r8], ip yading@10: vsri.32 q1, q0, #16 yading@10: vst1.64 {d22}, [r8], ip yading@10: vsri.32 q3, q2, #16 yading@10: vst1.64 {d19}, [r8], ip yading@10: vzip.32 d2, d6 yading@10: vst1.64 {d23}, [r8], ip yading@10: vzip.32 d3, d7 yading@10: beq 7f yading@10: vld1.64 {d16-d17},[r4,:128]! yading@10: vcvt.s32.f32 q8, q8, #16 yading@10: vst1.64 {d2}, [r8], ip yading@10: vld1.64 {d18-d19},[r5,:128]! yading@10: vcvt.s32.f32 q9, q9, #16 yading@10: vst1.64 {d6}, [r8], ip yading@10: vld1.64 {d20-d21},[r6,:128]! yading@10: vcvt.s32.f32 q10, q10, #16 yading@10: vst1.64 {d3}, [r8], ip yading@10: vld1.64 {d22-d23},[r7,:128]! yading@10: vcvt.s32.f32 q11, q11, #16 yading@10: vst1.64 {d7}, [r8], ip yading@10: b 6b yading@10: 7: vst1.64 {d2}, [r8], ip yading@10: vst1.64 {d6}, [r8], ip yading@10: vst1.64 {d3}, [r8], ip yading@10: vst1.64 {d7}, [r8], ip yading@10: subs r3, r3, #4 yading@10: it eq yading@10: popeq {r4-r8,pc} yading@10: cmp r3, #4 yading@10: add r0, r0, #8 yading@10: bge 5b yading@10: yading@10: @ 2 channels yading@10: 4: cmp r3, #2 yading@10: blt 4f yading@10: ldmia r1!, {r4-r5} yading@10: mov lr, r2 yading@10: mov r8, r0 yading@10: tst lr, #8 yading@10: vld1.64 {d16-d17},[r4,:128]! yading@10: vcvt.s32.f32 q8, q8, #16 yading@10: vld1.64 {d18-d19},[r5,:128]! yading@10: vcvt.s32.f32 q9, q9, #16 yading@10: vld1.64 {d20-d21},[r4,:128]! yading@10: vcvt.s32.f32 q10, q10, #16 yading@10: vld1.64 {d22-d23},[r5,:128]! yading@10: vcvt.s32.f32 q11, q11, #16 yading@10: beq 6f yading@10: subs lr, lr, #8 yading@10: beq 7f yading@10: vsri.32 d18, d16, #16 yading@10: vsri.32 d19, d17, #16 yading@10: vld1.64 {d16-d17},[r4,:128]! yading@10: vcvt.s32.f32 q8, q8, #16 yading@10: vst1.32 {d18[0]}, [r8], ip yading@10: vsri.32 d22, d20, #16 yading@10: vst1.32 {d18[1]}, [r8], ip yading@10: vsri.32 d23, d21, #16 yading@10: vst1.32 {d19[0]}, [r8], ip yading@10: vst1.32 {d19[1]}, [r8], ip yading@10: vld1.64 {d18-d19},[r5,:128]! yading@10: vcvt.s32.f32 q9, q9, #16 yading@10: vst1.32 {d22[0]}, [r8], ip yading@10: vst1.32 {d22[1]}, [r8], ip yading@10: vld1.64 {d20-d21},[r4,:128]! yading@10: vcvt.s32.f32 q10, q10, #16 yading@10: vst1.32 {d23[0]}, [r8], ip yading@10: vst1.32 {d23[1]}, [r8], ip yading@10: vld1.64 {d22-d23},[r5,:128]! yading@10: vcvt.s32.f32 q11, q11, #16 yading@10: 6: subs lr, lr, #16 yading@10: vld1.64 {d0-d1}, [r4,:128]! yading@10: vcvt.s32.f32 q0, q0, #16 yading@10: vsri.32 d18, d16, #16 yading@10: vld1.64 {d2-d3}, [r5,:128]! yading@10: vcvt.s32.f32 q1, q1, #16 yading@10: vsri.32 d19, d17, #16 yading@10: vld1.64 {d4-d5}, [r4,:128]! yading@10: vcvt.s32.f32 q2, q2, #16 yading@10: vld1.64 {d6-d7}, [r5,:128]! yading@10: vcvt.s32.f32 q3, q3, #16 yading@10: vst1.32 {d18[0]}, [r8], ip yading@10: vsri.32 d22, d20, #16 yading@10: vst1.32 {d18[1]}, [r8], ip yading@10: vsri.32 d23, d21, #16 yading@10: vst1.32 {d19[0]}, [r8], ip yading@10: vsri.32 d2, d0, #16 yading@10: vst1.32 {d19[1]}, [r8], ip yading@10: vsri.32 d3, d1, #16 yading@10: vst1.32 {d22[0]}, [r8], ip yading@10: vsri.32 d6, d4, #16 yading@10: vst1.32 {d22[1]}, [r8], ip yading@10: vsri.32 d7, d5, #16 yading@10: vst1.32 {d23[0]}, [r8], ip yading@10: vst1.32 {d23[1]}, [r8], ip yading@10: beq 6f yading@10: vld1.64 {d16-d17},[r4,:128]! yading@10: vcvt.s32.f32 q8, q8, #16 yading@10: vst1.32 {d2[0]}, [r8], ip yading@10: vst1.32 {d2[1]}, [r8], ip yading@10: vld1.64 {d18-d19},[r5,:128]! yading@10: vcvt.s32.f32 q9, q9, #16 yading@10: vst1.32 {d3[0]}, [r8], ip yading@10: vst1.32 {d3[1]}, [r8], ip yading@10: vld1.64 {d20-d21},[r4,:128]! yading@10: vcvt.s32.f32 q10, q10, #16 yading@10: vst1.32 {d6[0]}, [r8], ip yading@10: vst1.32 {d6[1]}, [r8], ip yading@10: vld1.64 {d22-d23},[r5,:128]! yading@10: vcvt.s32.f32 q11, q11, #16 yading@10: vst1.32 {d7[0]}, [r8], ip yading@10: vst1.32 {d7[1]}, [r8], ip yading@10: bgt 6b yading@10: 6: vst1.32 {d2[0]}, [r8], ip yading@10: vst1.32 {d2[1]}, [r8], ip yading@10: vst1.32 {d3[0]}, [r8], ip yading@10: vst1.32 {d3[1]}, [r8], ip yading@10: vst1.32 {d6[0]}, [r8], ip yading@10: vst1.32 {d6[1]}, [r8], ip yading@10: vst1.32 {d7[0]}, [r8], ip yading@10: vst1.32 {d7[1]}, [r8], ip yading@10: b 8f yading@10: 7: vsri.32 d18, d16, #16 yading@10: vsri.32 d19, d17, #16 yading@10: vst1.32 {d18[0]}, [r8], ip yading@10: vsri.32 d22, d20, #16 yading@10: vst1.32 {d18[1]}, [r8], ip yading@10: vsri.32 d23, d21, #16 yading@10: vst1.32 {d19[0]}, [r8], ip yading@10: vst1.32 {d19[1]}, [r8], ip yading@10: vst1.32 {d22[0]}, [r8], ip yading@10: vst1.32 {d22[1]}, [r8], ip yading@10: vst1.32 {d23[0]}, [r8], ip yading@10: vst1.32 {d23[1]}, [r8], ip yading@10: 8: subs r3, r3, #2 yading@10: add r0, r0, #4 yading@10: it eq yading@10: popeq {r4-r8,pc} yading@10: yading@10: @ 1 channel yading@10: 4: ldr r4, [r1],#4 yading@10: tst r2, #8 yading@10: mov lr, r2 yading@10: mov r5, r0 yading@10: vld1.64 {d0-d1}, [r4,:128]! yading@10: vcvt.s32.f32 q0, q0, #16 yading@10: vld1.64 {d2-d3}, [r4,:128]! yading@10: vcvt.s32.f32 q1, q1, #16 yading@10: bne 8f yading@10: 6: subs lr, lr, #16 yading@10: vld1.64 {d4-d5}, [r4,:128]! yading@10: vcvt.s32.f32 q2, q2, #16 yading@10: vld1.64 {d6-d7}, [r4,:128]! yading@10: vcvt.s32.f32 q3, q3, #16 yading@10: vst1.16 {d0[1]}, [r5,:16], ip yading@10: vst1.16 {d0[3]}, [r5,:16], ip yading@10: vst1.16 {d1[1]}, [r5,:16], ip yading@10: vst1.16 {d1[3]}, [r5,:16], ip yading@10: vst1.16 {d2[1]}, [r5,:16], ip yading@10: vst1.16 {d2[3]}, [r5,:16], ip yading@10: vst1.16 {d3[1]}, [r5,:16], ip yading@10: vst1.16 {d3[3]}, [r5,:16], ip yading@10: beq 7f yading@10: vld1.64 {d0-d1}, [r4,:128]! yading@10: vcvt.s32.f32 q0, q0, #16 yading@10: vld1.64 {d2-d3}, [r4,:128]! yading@10: vcvt.s32.f32 q1, q1, #16 yading@10: 7: vst1.16 {d4[1]}, [r5,:16], ip yading@10: vst1.16 {d4[3]}, [r5,:16], ip yading@10: vst1.16 {d5[1]}, [r5,:16], ip yading@10: vst1.16 {d5[3]}, [r5,:16], ip yading@10: vst1.16 {d6[1]}, [r5,:16], ip yading@10: vst1.16 {d6[3]}, [r5,:16], ip yading@10: vst1.16 {d7[1]}, [r5,:16], ip yading@10: vst1.16 {d7[3]}, [r5,:16], ip yading@10: bgt 6b yading@10: pop {r4-r8,pc} yading@10: 8: subs lr, lr, #8 yading@10: vst1.16 {d0[1]}, [r5,:16], ip yading@10: vst1.16 {d0[3]}, [r5,:16], ip yading@10: vst1.16 {d1[1]}, [r5,:16], ip yading@10: vst1.16 {d1[3]}, [r5,:16], ip yading@10: vst1.16 {d2[1]}, [r5,:16], ip yading@10: vst1.16 {d2[3]}, [r5,:16], ip yading@10: vst1.16 {d3[1]}, [r5,:16], ip yading@10: vst1.16 {d3[3]}, [r5,:16], ip yading@10: it eq yading@10: popeq {r4-r8,pc} yading@10: vld1.64 {d0-d1}, [r4,:128]! yading@10: vcvt.s32.f32 q0, q0, #16 yading@10: vld1.64 {d2-d3}, [r4,:128]! yading@10: vcvt.s32.f32 q1, q1, #16 yading@10: b 6b yading@10: endfunc yading@10: yading@10: function ff_int32_to_float_fmul_scalar_neon, export=1 yading@10: VFP vdup.32 q0, d0[0] yading@10: VFP len .req r2 yading@10: NOVFP vdup.32 q0, r2 yading@10: NOVFP len .req r3 yading@10: yading@10: vld1.32 {q1},[r1,:128]! yading@10: vcvt.f32.s32 q3, q1 yading@10: vld1.32 {q2},[r1,:128]! yading@10: vcvt.f32.s32 q8, q2 yading@10: 1: subs len, len, #8 yading@10: pld [r1, #16] yading@10: vmul.f32 q9, q3, q0 yading@10: vmul.f32 q10, q8, q0 yading@10: beq 2f yading@10: vld1.32 {q1},[r1,:128]! yading@10: vcvt.f32.s32 q3, q1 yading@10: vld1.32 {q2},[r1,:128]! yading@10: vcvt.f32.s32 q8, q2 yading@10: vst1.32 {q9}, [r0,:128]! yading@10: vst1.32 {q10},[r0,:128]! yading@10: b 1b yading@10: 2: vst1.32 {q9}, [r0,:128]! yading@10: vst1.32 {q10},[r0,:128]! yading@10: bx lr yading@10: .unreq len yading@10: endfunc