yading@10: /* yading@10: * Copyright (c) 2008 Mans Rullgard yading@10: * yading@10: * This file is part of FFmpeg. yading@10: * yading@10: * FFmpeg is free software; you can redistribute it and/or yading@10: * modify it under the terms of the GNU Lesser General Public yading@10: * License as published by the Free Software Foundation; either yading@10: * version 2.1 of the License, or (at your option) any later version. yading@10: * yading@10: * FFmpeg is distributed in the hope that it will be useful, yading@10: * but WITHOUT ANY WARRANTY; without even the implied warranty of yading@10: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU yading@10: * Lesser General Public License for more details. yading@10: * yading@10: * You should have received a copy of the GNU Lesser General Public yading@10: * License along with FFmpeg; if not, write to the Free Software yading@10: * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA yading@10: */ yading@10: yading@10: #include "libavutil/arm/asm.S" yading@10: yading@10: function ff_h264_idct_add_neon, export=1 yading@10: vld1.64 {d0-d3}, [r1,:128] yading@10: vmov.i16 q15, #0 yading@10: yading@10: vswp d1, d2 yading@10: vst1.16 {q15}, [r1,:128]! yading@10: vadd.i16 d4, d0, d1 yading@10: vst1.16 {q15}, [r1,:128]! yading@10: vshr.s16 q8, q1, #1 yading@10: vsub.i16 d5, d0, d1 yading@10: vadd.i16 d6, d2, d17 yading@10: vsub.i16 d7, d16, d3 yading@10: vadd.i16 q0, q2, q3 yading@10: vsub.i16 q1, q2, q3 yading@10: yading@10: vtrn.16 d0, d1 yading@10: vtrn.16 d3, d2 yading@10: vtrn.32 d0, d3 yading@10: vtrn.32 d1, d2 yading@10: yading@10: vadd.i16 d4, d0, d3 yading@10: vld1.32 {d18[0]}, [r0,:32], r2 yading@10: vswp d1, d3 yading@10: vshr.s16 q8, q1, #1 yading@10: vld1.32 {d19[1]}, [r0,:32], r2 yading@10: vsub.i16 d5, d0, d1 yading@10: vld1.32 {d18[1]}, [r0,:32], r2 yading@10: vadd.i16 d6, d16, d3 yading@10: vld1.32 {d19[0]}, [r0,:32], r2 yading@10: vsub.i16 d7, d2, d17 yading@10: sub r0, r0, r2, lsl #2 yading@10: vadd.i16 q0, q2, q3 yading@10: vsub.i16 q1, q2, q3 yading@10: yading@10: vrshr.s16 q0, q0, #6 yading@10: vrshr.s16 q1, q1, #6 yading@10: yading@10: vaddw.u8 q0, q0, d18 yading@10: vaddw.u8 q1, q1, d19 yading@10: yading@10: vqmovun.s16 d0, q0 yading@10: vqmovun.s16 d1, q1 yading@10: yading@10: vst1.32 {d0[0]}, [r0,:32], r2 yading@10: vst1.32 {d1[1]}, [r0,:32], r2 yading@10: vst1.32 {d0[1]}, [r0,:32], r2 yading@10: vst1.32 {d1[0]}, [r0,:32], r2 yading@10: yading@10: sub r1, r1, #32 yading@10: bx lr yading@10: endfunc yading@10: yading@10: function ff_h264_idct_dc_add_neon, export=1 yading@10: mov r3, #0 yading@10: vld1.16 {d2[],d3[]}, [r1,:16] yading@10: strh r3, [r1] yading@10: vrshr.s16 q1, q1, #6 yading@10: vld1.32 {d0[0]}, [r0,:32], r2 yading@10: vld1.32 {d0[1]}, [r0,:32], r2 yading@10: vaddw.u8 q2, q1, d0 yading@10: vld1.32 {d1[0]}, [r0,:32], r2 yading@10: vld1.32 {d1[1]}, [r0,:32], r2 yading@10: vaddw.u8 q1, q1, d1 yading@10: vqmovun.s16 d0, q2 yading@10: vqmovun.s16 d1, q1 yading@10: sub r0, r0, r2, lsl #2 yading@10: vst1.32 {d0[0]}, [r0,:32], r2 yading@10: vst1.32 {d0[1]}, [r0,:32], r2 yading@10: vst1.32 {d1[0]}, [r0,:32], r2 yading@10: vst1.32 {d1[1]}, [r0,:32], r2 yading@10: bx lr yading@10: endfunc yading@10: yading@10: function ff_h264_idct_add16_neon, export=1 yading@10: push {r4-r8,lr} yading@10: mov r4, r0 yading@10: mov r5, r1 yading@10: mov r1, r2 yading@10: mov r2, r3 yading@10: ldr r6, [sp, #24] yading@10: movrel r7, scan8 yading@10: mov ip, #16 yading@10: 1: ldrb r8, [r7], #1 yading@10: ldr r0, [r5], #4 yading@10: ldrb r8, [r6, r8] yading@10: subs r8, r8, #1 yading@10: blt 2f yading@10: ldrsh lr, [r1] yading@10: add r0, r0, r4 yading@10: it ne yading@10: movne lr, #0 yading@10: cmp lr, #0 yading@10: ite ne yading@10: adrne lr, ff_h264_idct_dc_add_neon + CONFIG_THUMB yading@10: adreq lr, ff_h264_idct_add_neon + CONFIG_THUMB yading@10: blx lr yading@10: 2: subs ip, ip, #1 yading@10: add r1, r1, #32 yading@10: bne 1b yading@10: pop {r4-r8,pc} yading@10: endfunc yading@10: yading@10: function ff_h264_idct_add16intra_neon, export=1 yading@10: push {r4-r8,lr} yading@10: mov r4, r0 yading@10: mov r5, r1 yading@10: mov r1, r2 yading@10: mov r2, r3 yading@10: ldr r6, [sp, #24] yading@10: movrel r7, scan8 yading@10: mov ip, #16 yading@10: 1: ldrb r8, [r7], #1 yading@10: ldr r0, [r5], #4 yading@10: ldrb r8, [r6, r8] yading@10: add r0, r0, r4 yading@10: cmp r8, #0 yading@10: ldrsh r8, [r1] yading@10: iteet ne yading@10: adrne lr, ff_h264_idct_add_neon + CONFIG_THUMB yading@10: adreq lr, ff_h264_idct_dc_add_neon + CONFIG_THUMB yading@10: cmpeq r8, #0 yading@10: blxne lr yading@10: subs ip, ip, #1 yading@10: add r1, r1, #32 yading@10: bne 1b yading@10: pop {r4-r8,pc} yading@10: endfunc yading@10: yading@10: function ff_h264_idct_add8_neon, export=1 yading@10: push {r4-r10,lr} yading@10: ldm r0, {r4,r9} yading@10: add r5, r1, #16*4 yading@10: add r1, r2, #16*32 yading@10: mov r2, r3 yading@10: mov r10, r1 yading@10: ldr r6, [sp, #32] yading@10: movrel r7, scan8+16 yading@10: mov r12, #0 yading@10: 1: ldrb r8, [r7, r12] yading@10: ldr r0, [r5, r12, lsl #2] yading@10: ldrb r8, [r6, r8] yading@10: add r0, r0, r4 yading@10: add r1, r10, r12, lsl #5 yading@10: cmp r8, #0 yading@10: ldrsh r8, [r1] yading@10: iteet ne yading@10: adrne lr, ff_h264_idct_add_neon + CONFIG_THUMB yading@10: adreq lr, ff_h264_idct_dc_add_neon + CONFIG_THUMB yading@10: cmpeq r8, #0 yading@10: blxne lr yading@10: add r12, r12, #1 yading@10: cmp r12, #4 yading@10: itt eq yading@10: moveq r12, #16 yading@10: moveq r4, r9 yading@10: cmp r12, #20 yading@10: blt 1b yading@10: pop {r4-r10,pc} yading@10: endfunc yading@10: yading@10: .macro idct8x8_cols pass yading@10: .if \pass == 0 yading@10: qa .req q2 yading@10: qb .req q14 yading@10: vshr.s16 q2, q10, #1 yading@10: vadd.i16 q0, q8, q12 yading@10: vld1.16 {q14-q15},[r1,:128] yading@10: vst1.16 {q3}, [r1,:128]! yading@10: vst1.16 {q3}, [r1,:128]! yading@10: vsub.i16 q1, q8, q12 yading@10: vshr.s16 q3, q14, #1 yading@10: vsub.i16 q2, q2, q14 yading@10: vadd.i16 q3, q3, q10 yading@10: .else yading@10: qa .req q14 yading@10: qb .req q2 yading@10: vtrn.32 q8, q10 yading@10: vtrn.16 q12, q13 yading@10: vtrn.32 q9, q11 yading@10: vtrn.32 q12, q2 yading@10: vtrn.32 q13, q15 yading@10: vswp d21, d4 yading@10: vshr.s16 q14, q10, #1 yading@10: vswp d17, d24 yading@10: vshr.s16 q3, q2, #1 yading@10: vswp d19, d26 yading@10: vadd.i16 q0, q8, q12 yading@10: vswp d23, d30 yading@10: vsub.i16 q1, q8, q12 yading@10: vsub.i16 q14, q14, q2 yading@10: vadd.i16 q3, q3, q10 yading@10: .endif yading@10: vadd.i16 q10, q1, qa yading@10: vsub.i16 q12, q1, qa yading@10: vadd.i16 q8, q0, q3 yading@10: vsub.i16 qb, q0, q3 yading@10: vsub.i16 q0, q13, q11 yading@10: vadd.i16 q1, q15, q9 yading@10: vsub.i16 qa, q15, q9 yading@10: vadd.i16 q3, q13, q11 yading@10: vsub.i16 q0, q0, q15 yading@10: vsub.i16 q1, q1, q11 yading@10: vadd.i16 qa, qa, q13 yading@10: vadd.i16 q3, q3, q9 yading@10: vshr.s16 q9, q9, #1 yading@10: vshr.s16 q11, q11, #1 yading@10: vshr.s16 q13, q13, #1 yading@10: vshr.s16 q15, q15, #1 yading@10: vsub.i16 q0, q0, q15 yading@10: vsub.i16 q1, q1, q11 yading@10: vadd.i16 qa, qa, q13 yading@10: vadd.i16 q3, q3, q9 yading@10: vshr.s16 q9, q0, #2 yading@10: vshr.s16 q11, q1, #2 yading@10: vshr.s16 q13, qa, #2 yading@10: vshr.s16 q15, q3, #2 yading@10: vsub.i16 q3, q3, q9 yading@10: vsub.i16 qa, q11, qa yading@10: vadd.i16 q1, q1, q13 yading@10: vadd.i16 q0, q0, q15 yading@10: .if \pass == 0 yading@10: vsub.i16 q15, q8, q3 yading@10: vadd.i16 q8, q8, q3 yading@10: vadd.i16 q9, q10, q2 yading@10: vsub.i16 q2, q10, q2 yading@10: vtrn.16 q8, q9 yading@10: vadd.i16 q10, q12, q1 yading@10: vtrn.16 q2, q15 yading@10: vadd.i16 q11, q14, q0 yading@10: vsub.i16 q13, q12, q1 yading@10: vtrn.16 q10, q11 yading@10: vsub.i16 q12, q14, q0 yading@10: .else yading@10: vsub.i16 q15, q8, q3 yading@10: vadd.i16 q8, q8, q3 yading@10: vadd.i16 q9, q10, q14 yading@10: vsub.i16 q14, q10, q14 yading@10: vadd.i16 q10, q12, q1 yading@10: vsub.i16 q13, q12, q1 yading@10: vadd.i16 q11, q2, q0 yading@10: vsub.i16 q12, q2, q0 yading@10: .endif yading@10: .unreq qa yading@10: .unreq qb yading@10: .endm yading@10: yading@10: function ff_h264_idct8_add_neon, export=1 yading@10: vmov.i16 q3, #0 yading@10: vld1.16 {q8-q9}, [r1,:128] yading@10: vst1.16 {q3}, [r1,:128]! yading@10: vst1.16 {q3}, [r1,:128]! yading@10: vld1.16 {q10-q11},[r1,:128] yading@10: vst1.16 {q3}, [r1,:128]! yading@10: vst1.16 {q3}, [r1,:128]! yading@10: vld1.16 {q12-q13},[r1,:128] yading@10: vst1.16 {q3}, [r1,:128]! yading@10: vst1.16 {q3}, [r1,:128]! yading@10: yading@10: idct8x8_cols 0 yading@10: idct8x8_cols 1 yading@10: yading@10: mov r3, r0 yading@10: vrshr.s16 q8, q8, #6 yading@10: vld1.8 {d0}, [r0,:64], r2 yading@10: vrshr.s16 q9, q9, #6 yading@10: vld1.8 {d1}, [r0,:64], r2 yading@10: vrshr.s16 q10, q10, #6 yading@10: vld1.8 {d2}, [r0,:64], r2 yading@10: vrshr.s16 q11, q11, #6 yading@10: vld1.8 {d3}, [r0,:64], r2 yading@10: vrshr.s16 q12, q12, #6 yading@10: vld1.8 {d4}, [r0,:64], r2 yading@10: vrshr.s16 q13, q13, #6 yading@10: vld1.8 {d5}, [r0,:64], r2 yading@10: vrshr.s16 q14, q14, #6 yading@10: vld1.8 {d6}, [r0,:64], r2 yading@10: vrshr.s16 q15, q15, #6 yading@10: vld1.8 {d7}, [r0,:64], r2 yading@10: vaddw.u8 q8, q8, d0 yading@10: vaddw.u8 q9, q9, d1 yading@10: vaddw.u8 q10, q10, d2 yading@10: vqmovun.s16 d0, q8 yading@10: vaddw.u8 q11, q11, d3 yading@10: vqmovun.s16 d1, q9 yading@10: vaddw.u8 q12, q12, d4 yading@10: vqmovun.s16 d2, q10 yading@10: vst1.8 {d0}, [r3,:64], r2 yading@10: vaddw.u8 q13, q13, d5 yading@10: vqmovun.s16 d3, q11 yading@10: vst1.8 {d1}, [r3,:64], r2 yading@10: vaddw.u8 q14, q14, d6 yading@10: vqmovun.s16 d4, q12 yading@10: vst1.8 {d2}, [r3,:64], r2 yading@10: vaddw.u8 q15, q15, d7 yading@10: vqmovun.s16 d5, q13 yading@10: vst1.8 {d3}, [r3,:64], r2 yading@10: vqmovun.s16 d6, q14 yading@10: vqmovun.s16 d7, q15 yading@10: vst1.8 {d4}, [r3,:64], r2 yading@10: vst1.8 {d5}, [r3,:64], r2 yading@10: vst1.8 {d6}, [r3,:64], r2 yading@10: vst1.8 {d7}, [r3,:64], r2 yading@10: yading@10: sub r1, r1, #128 yading@10: bx lr yading@10: endfunc yading@10: yading@10: function ff_h264_idct8_dc_add_neon, export=1 yading@10: mov r3, #0 yading@10: vld1.16 {d30[],d31[]},[r1,:16] yading@10: strh r3, [r1] yading@10: vld1.32 {d0}, [r0,:64], r2 yading@10: vrshr.s16 q15, q15, #6 yading@10: vld1.32 {d1}, [r0,:64], r2 yading@10: vld1.32 {d2}, [r0,:64], r2 yading@10: vaddw.u8 q8, q15, d0 yading@10: vld1.32 {d3}, [r0,:64], r2 yading@10: vaddw.u8 q9, q15, d1 yading@10: vld1.32 {d4}, [r0,:64], r2 yading@10: vaddw.u8 q10, q15, d2 yading@10: vld1.32 {d5}, [r0,:64], r2 yading@10: vaddw.u8 q11, q15, d3 yading@10: vld1.32 {d6}, [r0,:64], r2 yading@10: vaddw.u8 q12, q15, d4 yading@10: vld1.32 {d7}, [r0,:64], r2 yading@10: vaddw.u8 q13, q15, d5 yading@10: vaddw.u8 q14, q15, d6 yading@10: vaddw.u8 q15, q15, d7 yading@10: vqmovun.s16 d0, q8 yading@10: vqmovun.s16 d1, q9 yading@10: vqmovun.s16 d2, q10 yading@10: vqmovun.s16 d3, q11 yading@10: sub r0, r0, r2, lsl #3 yading@10: vst1.32 {d0}, [r0,:64], r2 yading@10: vqmovun.s16 d4, q12 yading@10: vst1.32 {d1}, [r0,:64], r2 yading@10: vqmovun.s16 d5, q13 yading@10: vst1.32 {d2}, [r0,:64], r2 yading@10: vqmovun.s16 d6, q14 yading@10: vst1.32 {d3}, [r0,:64], r2 yading@10: vqmovun.s16 d7, q15 yading@10: vst1.32 {d4}, [r0,:64], r2 yading@10: vst1.32 {d5}, [r0,:64], r2 yading@10: vst1.32 {d6}, [r0,:64], r2 yading@10: vst1.32 {d7}, [r0,:64], r2 yading@10: bx lr yading@10: endfunc yading@10: yading@10: function ff_h264_idct8_add4_neon, export=1 yading@10: push {r4-r8,lr} yading@10: mov r4, r0 yading@10: mov r5, r1 yading@10: mov r1, r2 yading@10: mov r2, r3 yading@10: ldr r6, [sp, #24] yading@10: movrel r7, scan8 yading@10: mov r12, #16 yading@10: 1: ldrb r8, [r7], #4 yading@10: ldr r0, [r5], #16 yading@10: ldrb r8, [r6, r8] yading@10: subs r8, r8, #1 yading@10: blt 2f yading@10: ldrsh lr, [r1] yading@10: add r0, r0, r4 yading@10: it ne yading@10: movne lr, #0 yading@10: cmp lr, #0 yading@10: ite ne yading@10: adrne lr, ff_h264_idct8_dc_add_neon + CONFIG_THUMB yading@10: adreq lr, ff_h264_idct8_add_neon + CONFIG_THUMB yading@10: blx lr yading@10: 2: subs r12, r12, #4 yading@10: add r1, r1, #128 yading@10: bne 1b yading@10: pop {r4-r8,pc} yading@10: endfunc yading@10: yading@10: const scan8 yading@10: .byte 4+ 1*8, 5+ 1*8, 4+ 2*8, 5+ 2*8 yading@10: .byte 6+ 1*8, 7+ 1*8, 6+ 2*8, 7+ 2*8 yading@10: .byte 4+ 3*8, 5+ 3*8, 4+ 4*8, 5+ 4*8 yading@10: .byte 6+ 3*8, 7+ 3*8, 6+ 4*8, 7+ 4*8 yading@10: .byte 4+ 6*8, 5+ 6*8, 4+ 7*8, 5+ 7*8 yading@10: .byte 6+ 6*8, 7+ 6*8, 6+ 7*8, 7+ 7*8 yading@10: .byte 4+ 8*8, 5+ 8*8, 4+ 9*8, 5+ 9*8 yading@10: .byte 6+ 8*8, 7+ 8*8, 6+ 9*8, 7+ 9*8 yading@10: .byte 4+11*8, 5+11*8, 4+12*8, 5+12*8 yading@10: .byte 6+11*8, 7+11*8, 6+12*8, 7+12*8 yading@10: .byte 4+13*8, 5+13*8, 4+14*8, 5+14*8 yading@10: .byte 6+13*8, 7+13*8, 6+14*8, 7+14*8 yading@10: endconst