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1 /*
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2 * ARM NEON optimised Format Conversion Utils
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3 * Copyright (c) 2008 Mans Rullgard <mans@mansr.com>
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4 *
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5 * This file is part of FFmpeg.
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6 *
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7 * FFmpeg is free software; you can redistribute it and/or
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8 * modify it under the terms of the GNU Lesser General Public
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9 * License as published by the Free Software Foundation; either
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10 * version 2.1 of the License, or (at your option) any later version.
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11 *
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12 * FFmpeg is distributed in the hope that it will be useful,
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13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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15 * Lesser General Public License for more details.
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16 *
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17 * You should have received a copy of the GNU Lesser General Public
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18 * License along with FFmpeg; if not, write to the Free Software
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19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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20 */
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21
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22 #include "config.h"
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23 #include "libavutil/arm/asm.S"
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24
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25 function ff_float_to_int16_neon, export=1
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26 subs r2, r2, #8
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27 vld1.64 {d0-d1}, [r1,:128]!
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28 vcvt.s32.f32 q8, q0, #16
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29 vld1.64 {d2-d3}, [r1,:128]!
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30 vcvt.s32.f32 q9, q1, #16
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31 beq 3f
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32 bics ip, r2, #15
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33 beq 2f
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34 1: subs ip, ip, #16
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35 vshrn.s32 d4, q8, #16
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36 vld1.64 {d0-d1}, [r1,:128]!
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37 vcvt.s32.f32 q0, q0, #16
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38 vshrn.s32 d5, q9, #16
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39 vld1.64 {d2-d3}, [r1,:128]!
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40 vcvt.s32.f32 q1, q1, #16
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41 vshrn.s32 d6, q0, #16
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42 vst1.64 {d4-d5}, [r0,:128]!
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43 vshrn.s32 d7, q1, #16
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44 vld1.64 {d16-d17},[r1,:128]!
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45 vcvt.s32.f32 q8, q8, #16
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46 vld1.64 {d18-d19},[r1,:128]!
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47 vcvt.s32.f32 q9, q9, #16
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48 vst1.64 {d6-d7}, [r0,:128]!
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49 bne 1b
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50 ands r2, r2, #15
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51 beq 3f
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52 2: vld1.64 {d0-d1}, [r1,:128]!
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53 vshrn.s32 d4, q8, #16
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54 vcvt.s32.f32 q0, q0, #16
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55 vld1.64 {d2-d3}, [r1,:128]!
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56 vshrn.s32 d5, q9, #16
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57 vcvt.s32.f32 q1, q1, #16
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58 vshrn.s32 d6, q0, #16
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59 vst1.64 {d4-d5}, [r0,:128]!
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60 vshrn.s32 d7, q1, #16
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61 vst1.64 {d6-d7}, [r0,:128]!
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62 bx lr
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63 3: vshrn.s32 d4, q8, #16
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64 vshrn.s32 d5, q9, #16
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65 vst1.64 {d4-d5}, [r0,:128]!
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66 bx lr
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67 endfunc
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68
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69 function ff_float_to_int16_interleave_neon, export=1
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70 cmp r3, #2
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71 itt lt
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72 ldrlt r1, [r1]
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73 blt ff_float_to_int16_neon
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74 bne 4f
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75
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76 ldr r3, [r1]
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77 ldr r1, [r1, #4]
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78
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79 subs r2, r2, #8
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80 vld1.64 {d0-d1}, [r3,:128]!
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81 vcvt.s32.f32 q8, q0, #16
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82 vld1.64 {d2-d3}, [r3,:128]!
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83 vcvt.s32.f32 q9, q1, #16
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84 vld1.64 {d20-d21},[r1,:128]!
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85 vcvt.s32.f32 q10, q10, #16
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86 vld1.64 {d22-d23},[r1,:128]!
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87 vcvt.s32.f32 q11, q11, #16
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88 beq 3f
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89 bics ip, r2, #15
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90 beq 2f
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91 1: subs ip, ip, #16
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92 vld1.64 {d0-d1}, [r3,:128]!
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93 vcvt.s32.f32 q0, q0, #16
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94 vsri.32 q10, q8, #16
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95 vld1.64 {d2-d3}, [r3,:128]!
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96 vcvt.s32.f32 q1, q1, #16
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97 vld1.64 {d24-d25},[r1,:128]!
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98 vcvt.s32.f32 q12, q12, #16
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99 vld1.64 {d26-d27},[r1,:128]!
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100 vsri.32 q11, q9, #16
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101 vst1.64 {d20-d21},[r0,:128]!
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102 vcvt.s32.f32 q13, q13, #16
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103 vst1.64 {d22-d23},[r0,:128]!
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104 vsri.32 q12, q0, #16
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105 vld1.64 {d16-d17},[r3,:128]!
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106 vsri.32 q13, q1, #16
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107 vst1.64 {d24-d25},[r0,:128]!
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108 vcvt.s32.f32 q8, q8, #16
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109 vld1.64 {d18-d19},[r3,:128]!
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110 vcvt.s32.f32 q9, q9, #16
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111 vld1.64 {d20-d21},[r1,:128]!
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112 vcvt.s32.f32 q10, q10, #16
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113 vld1.64 {d22-d23},[r1,:128]!
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114 vcvt.s32.f32 q11, q11, #16
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115 vst1.64 {d26-d27},[r0,:128]!
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116 bne 1b
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117 ands r2, r2, #15
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118 beq 3f
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119 2: vsri.32 q10, q8, #16
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120 vld1.64 {d0-d1}, [r3,:128]!
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121 vcvt.s32.f32 q0, q0, #16
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122 vld1.64 {d2-d3}, [r3,:128]!
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123 vcvt.s32.f32 q1, q1, #16
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124 vld1.64 {d24-d25},[r1,:128]!
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125 vcvt.s32.f32 q12, q12, #16
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126 vsri.32 q11, q9, #16
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127 vld1.64 {d26-d27},[r1,:128]!
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128 vcvt.s32.f32 q13, q13, #16
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129 vst1.64 {d20-d21},[r0,:128]!
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130 vsri.32 q12, q0, #16
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131 vst1.64 {d22-d23},[r0,:128]!
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132 vsri.32 q13, q1, #16
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133 vst1.64 {d24-d27},[r0,:128]!
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134 bx lr
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135 3: vsri.32 q10, q8, #16
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136 vsri.32 q11, q9, #16
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137 vst1.64 {d20-d23},[r0,:128]!
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138 bx lr
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139
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140 4: push {r4-r8,lr}
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141 cmp r3, #4
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142 lsl ip, r3, #1
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143 blt 4f
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144
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145 @ 4 channels
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146 5: ldmia r1!, {r4-r7}
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147 mov lr, r2
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148 mov r8, r0
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149 vld1.64 {d16-d17},[r4,:128]!
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150 vcvt.s32.f32 q8, q8, #16
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151 vld1.64 {d18-d19},[r5,:128]!
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152 vcvt.s32.f32 q9, q9, #16
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153 vld1.64 {d20-d21},[r6,:128]!
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154 vcvt.s32.f32 q10, q10, #16
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155 vld1.64 {d22-d23},[r7,:128]!
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156 vcvt.s32.f32 q11, q11, #16
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157 6: subs lr, lr, #8
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158 vld1.64 {d0-d1}, [r4,:128]!
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159 vcvt.s32.f32 q0, q0, #16
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160 vsri.32 q9, q8, #16
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161 vld1.64 {d2-d3}, [r5,:128]!
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162 vcvt.s32.f32 q1, q1, #16
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163 vsri.32 q11, q10, #16
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164 vld1.64 {d4-d5}, [r6,:128]!
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165 vcvt.s32.f32 q2, q2, #16
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166 vzip.32 d18, d22
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167 vld1.64 {d6-d7}, [r7,:128]!
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168 vcvt.s32.f32 q3, q3, #16
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169 vzip.32 d19, d23
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170 vst1.64 {d18}, [r8], ip
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171 vsri.32 q1, q0, #16
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172 vst1.64 {d22}, [r8], ip
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173 vsri.32 q3, q2, #16
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174 vst1.64 {d19}, [r8], ip
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175 vzip.32 d2, d6
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176 vst1.64 {d23}, [r8], ip
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177 vzip.32 d3, d7
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178 beq 7f
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179 vld1.64 {d16-d17},[r4,:128]!
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180 vcvt.s32.f32 q8, q8, #16
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181 vst1.64 {d2}, [r8], ip
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182 vld1.64 {d18-d19},[r5,:128]!
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183 vcvt.s32.f32 q9, q9, #16
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184 vst1.64 {d6}, [r8], ip
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185 vld1.64 {d20-d21},[r6,:128]!
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186 vcvt.s32.f32 q10, q10, #16
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187 vst1.64 {d3}, [r8], ip
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188 vld1.64 {d22-d23},[r7,:128]!
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189 vcvt.s32.f32 q11, q11, #16
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190 vst1.64 {d7}, [r8], ip
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191 b 6b
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192 7: vst1.64 {d2}, [r8], ip
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193 vst1.64 {d6}, [r8], ip
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194 vst1.64 {d3}, [r8], ip
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195 vst1.64 {d7}, [r8], ip
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196 subs r3, r3, #4
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197 it eq
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198 popeq {r4-r8,pc}
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199 cmp r3, #4
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200 add r0, r0, #8
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201 bge 5b
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202
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203 @ 2 channels
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204 4: cmp r3, #2
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205 blt 4f
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206 ldmia r1!, {r4-r5}
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207 mov lr, r2
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208 mov r8, r0
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209 tst lr, #8
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210 vld1.64 {d16-d17},[r4,:128]!
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211 vcvt.s32.f32 q8, q8, #16
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212 vld1.64 {d18-d19},[r5,:128]!
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213 vcvt.s32.f32 q9, q9, #16
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214 vld1.64 {d20-d21},[r4,:128]!
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215 vcvt.s32.f32 q10, q10, #16
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216 vld1.64 {d22-d23},[r5,:128]!
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217 vcvt.s32.f32 q11, q11, #16
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218 beq 6f
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219 subs lr, lr, #8
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220 beq 7f
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221 vsri.32 d18, d16, #16
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222 vsri.32 d19, d17, #16
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223 vld1.64 {d16-d17},[r4,:128]!
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224 vcvt.s32.f32 q8, q8, #16
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225 vst1.32 {d18[0]}, [r8], ip
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226 vsri.32 d22, d20, #16
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227 vst1.32 {d18[1]}, [r8], ip
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228 vsri.32 d23, d21, #16
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229 vst1.32 {d19[0]}, [r8], ip
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230 vst1.32 {d19[1]}, [r8], ip
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231 vld1.64 {d18-d19},[r5,:128]!
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232 vcvt.s32.f32 q9, q9, #16
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233 vst1.32 {d22[0]}, [r8], ip
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234 vst1.32 {d22[1]}, [r8], ip
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235 vld1.64 {d20-d21},[r4,:128]!
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236 vcvt.s32.f32 q10, q10, #16
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237 vst1.32 {d23[0]}, [r8], ip
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238 vst1.32 {d23[1]}, [r8], ip
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yading@10
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239 vld1.64 {d22-d23},[r5,:128]!
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240 vcvt.s32.f32 q11, q11, #16
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241 6: subs lr, lr, #16
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242 vld1.64 {d0-d1}, [r4,:128]!
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yading@10
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243 vcvt.s32.f32 q0, q0, #16
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244 vsri.32 d18, d16, #16
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245 vld1.64 {d2-d3}, [r5,:128]!
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246 vcvt.s32.f32 q1, q1, #16
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247 vsri.32 d19, d17, #16
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248 vld1.64 {d4-d5}, [r4,:128]!
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249 vcvt.s32.f32 q2, q2, #16
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250 vld1.64 {d6-d7}, [r5,:128]!
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251 vcvt.s32.f32 q3, q3, #16
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252 vst1.32 {d18[0]}, [r8], ip
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253 vsri.32 d22, d20, #16
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254 vst1.32 {d18[1]}, [r8], ip
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255 vsri.32 d23, d21, #16
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256 vst1.32 {d19[0]}, [r8], ip
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257 vsri.32 d2, d0, #16
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258 vst1.32 {d19[1]}, [r8], ip
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259 vsri.32 d3, d1, #16
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yading@10
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260 vst1.32 {d22[0]}, [r8], ip
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yading@10
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261 vsri.32 d6, d4, #16
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yading@10
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262 vst1.32 {d22[1]}, [r8], ip
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yading@10
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263 vsri.32 d7, d5, #16
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yading@10
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264 vst1.32 {d23[0]}, [r8], ip
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yading@10
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265 vst1.32 {d23[1]}, [r8], ip
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yading@10
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266 beq 6f
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yading@10
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267 vld1.64 {d16-d17},[r4,:128]!
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yading@10
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268 vcvt.s32.f32 q8, q8, #16
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yading@10
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269 vst1.32 {d2[0]}, [r8], ip
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yading@10
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270 vst1.32 {d2[1]}, [r8], ip
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yading@10
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271 vld1.64 {d18-d19},[r5,:128]!
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yading@10
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272 vcvt.s32.f32 q9, q9, #16
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yading@10
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273 vst1.32 {d3[0]}, [r8], ip
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yading@10
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274 vst1.32 {d3[1]}, [r8], ip
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yading@10
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275 vld1.64 {d20-d21},[r4,:128]!
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yading@10
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276 vcvt.s32.f32 q10, q10, #16
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yading@10
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277 vst1.32 {d6[0]}, [r8], ip
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yading@10
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278 vst1.32 {d6[1]}, [r8], ip
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yading@10
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279 vld1.64 {d22-d23},[r5,:128]!
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yading@10
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280 vcvt.s32.f32 q11, q11, #16
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yading@10
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281 vst1.32 {d7[0]}, [r8], ip
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yading@10
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282 vst1.32 {d7[1]}, [r8], ip
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yading@10
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283 bgt 6b
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yading@10
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284 6: vst1.32 {d2[0]}, [r8], ip
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yading@10
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285 vst1.32 {d2[1]}, [r8], ip
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yading@10
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286 vst1.32 {d3[0]}, [r8], ip
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yading@10
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287 vst1.32 {d3[1]}, [r8], ip
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yading@10
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288 vst1.32 {d6[0]}, [r8], ip
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yading@10
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289 vst1.32 {d6[1]}, [r8], ip
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yading@10
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290 vst1.32 {d7[0]}, [r8], ip
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yading@10
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291 vst1.32 {d7[1]}, [r8], ip
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yading@10
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292 b 8f
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yading@10
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293 7: vsri.32 d18, d16, #16
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yading@10
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294 vsri.32 d19, d17, #16
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yading@10
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295 vst1.32 {d18[0]}, [r8], ip
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yading@10
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296 vsri.32 d22, d20, #16
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yading@10
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297 vst1.32 {d18[1]}, [r8], ip
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yading@10
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298 vsri.32 d23, d21, #16
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yading@10
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299 vst1.32 {d19[0]}, [r8], ip
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yading@10
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300 vst1.32 {d19[1]}, [r8], ip
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yading@10
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301 vst1.32 {d22[0]}, [r8], ip
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yading@10
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302 vst1.32 {d22[1]}, [r8], ip
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yading@10
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303 vst1.32 {d23[0]}, [r8], ip
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yading@10
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304 vst1.32 {d23[1]}, [r8], ip
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yading@10
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305 8: subs r3, r3, #2
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yading@10
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306 add r0, r0, #4
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yading@10
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307 it eq
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yading@10
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308 popeq {r4-r8,pc}
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yading@10
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309
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yading@10
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310 @ 1 channel
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yading@10
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311 4: ldr r4, [r1],#4
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yading@10
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312 tst r2, #8
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yading@10
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313 mov lr, r2
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yading@10
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314 mov r5, r0
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yading@10
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315 vld1.64 {d0-d1}, [r4,:128]!
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yading@10
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316 vcvt.s32.f32 q0, q0, #16
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yading@10
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317 vld1.64 {d2-d3}, [r4,:128]!
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yading@10
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318 vcvt.s32.f32 q1, q1, #16
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yading@10
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319 bne 8f
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yading@10
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320 6: subs lr, lr, #16
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yading@10
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321 vld1.64 {d4-d5}, [r4,:128]!
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yading@10
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322 vcvt.s32.f32 q2, q2, #16
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yading@10
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323 vld1.64 {d6-d7}, [r4,:128]!
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yading@10
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324 vcvt.s32.f32 q3, q3, #16
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yading@10
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325 vst1.16 {d0[1]}, [r5,:16], ip
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yading@10
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326 vst1.16 {d0[3]}, [r5,:16], ip
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yading@10
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327 vst1.16 {d1[1]}, [r5,:16], ip
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yading@10
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328 vst1.16 {d1[3]}, [r5,:16], ip
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yading@10
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329 vst1.16 {d2[1]}, [r5,:16], ip
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yading@10
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330 vst1.16 {d2[3]}, [r5,:16], ip
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yading@10
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331 vst1.16 {d3[1]}, [r5,:16], ip
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yading@10
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332 vst1.16 {d3[3]}, [r5,:16], ip
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yading@10
|
333 beq 7f
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yading@10
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334 vld1.64 {d0-d1}, [r4,:128]!
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yading@10
|
335 vcvt.s32.f32 q0, q0, #16
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yading@10
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336 vld1.64 {d2-d3}, [r4,:128]!
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yading@10
|
337 vcvt.s32.f32 q1, q1, #16
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yading@10
|
338 7: vst1.16 {d4[1]}, [r5,:16], ip
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yading@10
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339 vst1.16 {d4[3]}, [r5,:16], ip
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yading@10
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340 vst1.16 {d5[1]}, [r5,:16], ip
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yading@10
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341 vst1.16 {d5[3]}, [r5,:16], ip
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yading@10
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342 vst1.16 {d6[1]}, [r5,:16], ip
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yading@10
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343 vst1.16 {d6[3]}, [r5,:16], ip
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yading@10
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344 vst1.16 {d7[1]}, [r5,:16], ip
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yading@10
|
345 vst1.16 {d7[3]}, [r5,:16], ip
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yading@10
|
346 bgt 6b
|
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yading@10
|
347 pop {r4-r8,pc}
|
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yading@10
|
348 8: subs lr, lr, #8
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yading@10
|
349 vst1.16 {d0[1]}, [r5,:16], ip
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yading@10
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350 vst1.16 {d0[3]}, [r5,:16], ip
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yading@10
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351 vst1.16 {d1[1]}, [r5,:16], ip
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yading@10
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352 vst1.16 {d1[3]}, [r5,:16], ip
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yading@10
|
353 vst1.16 {d2[1]}, [r5,:16], ip
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yading@10
|
354 vst1.16 {d2[3]}, [r5,:16], ip
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yading@10
|
355 vst1.16 {d3[1]}, [r5,:16], ip
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yading@10
|
356 vst1.16 {d3[3]}, [r5,:16], ip
|
|
yading@10
|
357 it eq
|
|
yading@10
|
358 popeq {r4-r8,pc}
|
|
yading@10
|
359 vld1.64 {d0-d1}, [r4,:128]!
|
|
yading@10
|
360 vcvt.s32.f32 q0, q0, #16
|
|
yading@10
|
361 vld1.64 {d2-d3}, [r4,:128]!
|
|
yading@10
|
362 vcvt.s32.f32 q1, q1, #16
|
|
yading@10
|
363 b 6b
|
|
yading@10
|
364 endfunc
|
|
yading@10
|
365
|
|
yading@10
|
366 function ff_int32_to_float_fmul_scalar_neon, export=1
|
|
yading@10
|
367 VFP vdup.32 q0, d0[0]
|
|
yading@10
|
368 VFP len .req r2
|
|
yading@10
|
369 NOVFP vdup.32 q0, r2
|
|
yading@10
|
370 NOVFP len .req r3
|
|
yading@10
|
371
|
|
yading@10
|
372 vld1.32 {q1},[r1,:128]!
|
|
yading@10
|
373 vcvt.f32.s32 q3, q1
|
|
yading@10
|
374 vld1.32 {q2},[r1,:128]!
|
|
yading@10
|
375 vcvt.f32.s32 q8, q2
|
|
yading@10
|
376 1: subs len, len, #8
|
|
yading@10
|
377 pld [r1, #16]
|
|
yading@10
|
378 vmul.f32 q9, q3, q0
|
|
yading@10
|
379 vmul.f32 q10, q8, q0
|
|
yading@10
|
380 beq 2f
|
|
yading@10
|
381 vld1.32 {q1},[r1,:128]!
|
|
yading@10
|
382 vcvt.f32.s32 q3, q1
|
|
yading@10
|
383 vld1.32 {q2},[r1,:128]!
|
|
yading@10
|
384 vcvt.f32.s32 q8, q2
|
|
yading@10
|
385 vst1.32 {q9}, [r0,:128]!
|
|
yading@10
|
386 vst1.32 {q10},[r0,:128]!
|
|
yading@10
|
387 b 1b
|
|
yading@10
|
388 2: vst1.32 {q9}, [r0,:128]!
|
|
yading@10
|
389 vst1.32 {q10},[r0,:128]!
|
|
yading@10
|
390 bx lr
|
|
yading@10
|
391 .unreq len
|
|
yading@10
|
392 endfunc
|
