view emulator/mem.c @ 12:e9dc055a0f8b

emulator skeleton code

/* mem.c
 * functions for accessing emulator memory */
#include "mem.h"

BYTE
read_mem(WIDE addr) {
    return memory[addr];
}

void
write_mem(WIDE addr, BYTE data) {
    memory[addr] = data;
}

BYTE
fetch(void) {
    return memory[registers.PC];
}

void
set_PC(WIDE data) {
    registers.PC = data;
}

WIDE
get_PC(void) {
    return registers.PC;
}

BYTE
get_R(BYTE reg, _Bool bank) {
    switch(bank) {
        case 0:
            return registers.R[reg];
        case 1:
            return registers.R[reg + 0x03];
    }
}

void
set_R(BYTE reg, _Bool bank, BYTE data) {
    switch(bank) {
        case 0:
            registers.R[reg] = data;
        case 1:
            registers.R[reg + 0x03] = data;
    }
}

BYTE
get_A(void) {
    return registers.A;
}

void
set_A(BYTE data) {
    registers.A = data;
}

BYTE
get_DPH(void) {
    return registers.DPH;
}

void
set_DPH(BYTE data) {
    registers.DPH = data;

}

BYTE
get_DPL(void) {
    return registers.DPL;
}   

void
set_DPL(BYTE data) {
    registers.DPL = data;
}

BYTE
get_SPH(void) {
    return registers.SPH;
}

void
set_SPH(BYTE data) {
    registers.SPH = data;
}

BYTE
get_SPL(void) {
    return registers.SPL;
}

void
set_SPL(BYTE data) {
    registers.SPL = data;
}

BYTE
get_flags(void) {
    return registers.flags;
}

void
set_flags(BYTE data) {
    registers.flags = data;
}


WIDE
get_DPTR(void) {
    return (((WIDE)registers.DPH) << 8) | registers.DPL;
}

void
set_DPTR(WIDE data) {
    registers.DPH = (BYTE)((data & 0xFF00) >> 8);
    registers.DPL = (BYTE)(data & 0x00FF);
}

WIDE
get_SP(void) {
    return (((WIDE)registers.SPH) << 8) | registers.SPL;
}

void
set_SP(WIDE data) {
    registers.SPH = (BYTE)((data & 0xFF00) >> 8);
    registers.SPL = (BYTE)(data & 0x00FF);
}