view emulator/mem.c @ 27:a542cd390efd

long overdue update
author james <jb302@eecs.qmul.ac.uk>
date Wed, 02 Apr 2014 14:11:50 +0100
parents 50dd22c1ccba
children
line wrap: on
line source
/* mem.c
 * functions for accessing emulator memory */
#include "mem.h"

/* for getting flags */
#define GBIT(byte, n) (byte & (0x80 >> n) ? 1 : 0) 
/* for setting flags */
#define SBIT(byte, n) (byte & ((0x7F >> n) | (0xFF << (8 - n))))

BYTE
fetch(void) {
    return memory[registers.PC];
}

WIDE
fetch_wide(void) {
    return (memory[registers.PC] << 8) | memory[registers.PC + 1];
}

BYTE
read_mem(WIDE addr) {
    return memory[addr];
}

void
write_mem(WIDE addr, BYTE data) {
    memory[addr] = data;
}


BYTE
get_flag(BYTE n) {
    if (n > 7) {
        return 0;
    }
    else {
        return GBIT(registers.flags, n);
    }
}

/* MCS-51 - bit type can be used here */
void
set_flag(BYTE flag, BYTE n) {
    if (n <= 7) {
        SBIT(registers.flags, n)
    }
}

BYTE
get_R(BYTE reg, BYTE bank) {
    if (reg <= 3) {
        if (bank == 0) {
            return registers.R[reg];
        }
        else {
            return registers.R[reg + 0x03];
        }
    }
    else {
        switch (reg) {
            
            case 0x04:
                return registers.DPH;
            
            case 0x05:
                return registers.DPL;
            
            case 0x06:
                return registers.SPH;
            
            case 0x07:
                return registers.SPL;
            
            case 0x08:
                return registers.A;
                break;
           
            default:
                return 0;
        }
    }
}

void
set_R(BYTE reg, BYTE bank, BYTE data) {
    if (reg <= 3) {
        if (bank == 0) {
            registers.R[reg] = data;
        }
        else {
            registers.R[reg + 0x03] = data;
        }
    }
    else {
        switch (reg) {
            
            case 0x04:
                registers.DPH = data;
                break;
            
            case 0x05:
                registers.DPL = data;
                break;
            
            case 0x06:
                registers.SPH = data;
                break;
            
            case 0x07:
                registers.SPL = data;
                break;
            
            case 0x08:
                registers.A = data;
                break;
            
            default:
                break;
        }
    }
}

WIDE
get_DPTR(void) {
    return (((WIDE)registers.DPH) << 8) | registers.DPL;
}

void
set_DPTR(WIDE data) {
    registers.DPH = (BYTE)((data & 0xFF00) >> 8);
    registers.DPL = (BYTE)(data & 0x00FF);
}

WIDE
get_SP(void) {
    return (((WIDE)registers.SPH) << 8) | registers.SPL;
}

void
set_SP(WIDE data) {
    registers.SPH = (BYTE)((data & 0xFF00) >> 8);
    registers.SPL = (BYTE)(data & 0x00FF);
}