view tests/test.asm @ 8:81dd03d17c22

first_pass() didn't need a pc
author james <jb302@eecs.qmul.ac.uk>
date Sat, 07 Dec 2013 20:32:27 +0000
parents 82e82dda442b
children 2b8eb2c86602
line wrap: on
line source
; unit test asm
NOP
reserved
reserved
reserved
reserved
reserved
reserved
reserved
SET C
CLR C
SET BS
CLR BS
SET IE
CLR IE
CPL C
CPL A
XCSD
SFA
LAF
MOV DPTR, SP
MOV SP, DPTR
MOV A, #0xF0
MOV SP, #0xF000
MOV DPTR, #0xF000
MOV A, 0x000F
MOV 0x000F, A
MOV A, @A+DPTR
MOV A, @A+PC
MOV A, @0x000F
MOV @0x000F, A
MOV A, @DPTR
MOV @DPTR, A
MOV @DPTR, R0
MOV @DPTR, R1
MOV @DPTR, R2
MOV @DPTR, R3
MOV @DPTR, DPH
MOV @DPTR, DPL
MOV @DPTR, SPH
MOV @DPTR, SPL
MOV R0, #0xF0
MOV R1, #0xF0
MOV R2, #0xF0
MOV R3, #0xF0
MOV DPH, #0xF0
MOV DPL, #0xF0
MOV SPH, #0xF0
MOV SPL, #0xF0
MOV R0, A
MOV R1, A
MOV R2, A
MOV R3, A
MOV DPH, A
MOV DPL, A
MOV SPH, A
MOV SPL, A
MOV A, R0
MOV A, R1
MOV A, R2
MOV A, R3
MOV A, DPH
MOV A, DPL
MOV A, SPH
MOV A, SPL
MOV R0, @DPTR
MOV R0, R1
MOV R0, R2
MOV R0, R3
MOV R0, DPH
MOV R0, DPL
MOV R0, SPH
MOV R0, SPL
MOV R1, R0
MOV R1, @DPTR
MOV R1, R2
MOV R1, R3
MOV R1, DPH
MOV R1, DPL
MOV R1, SPH
MOV R1, SPL
MOV R2, R0
MOV R2, R1
MOV R2, @DPTR
MOV R2, R3
MOV R2, DPH
MOV R2, DPL
MOV R2, SPH
MOV R2, SPL
MOV R3, R0
MOV R3, R1
MOV R3, R2
MOV R3, @DPTR
MOV R3, DPH
MOV R3, DPL
MOV R3, SPH
MOV R3, SPL
MOV DPH, R0
MOV DPH, R1
MOV DPH, R2
MOV DPH, R3
MOV DPH, @DPTR
MOV DPH, DPL
MOV DPH, SPH
MOV DPH, SPL
MOV DPL, R0
MOV DPL, R1
MOV DPL, R2
MOV DPL, R3
MOV DPL, DPH
MOV DPL, @DPTR
MOV DPL, SPH
MOV DPL, SPL
MOV SPH, R0
MOV SPH, R1
MOV SPH, R2
MOV SPH, R3
MOV SPH, DPH
MOV SPH, DPL
MOV SPH, @DPTR
MOV SPH, SPL
MOV SPL, R0
MOV SPL, R1
MOV SPL, R2
MOV SPL, R3
MOV SPL, DPH
MOV SPL, DPL
MOV SPL, SPH
MOV SPL, @DPTR
ANL A, R0
ANL A, R1
ANL A, R2
ANL A, R3
ANL A, DPH
ANL A, DPL
ANL A, #0xF0
ANL A, @DPTR
ORL A, R0
ORL A, R1
ORL A, R2
ORL A, R3
ORL A, DPH
ORL A, DPL
ORL A, #0xF0
ORL A, @DPTR
XRL A, R0
XRL A, R1
XRL A, R2
XRL A, R3
XRL A, DPH
XRL A, DPL
XRL A, #0xF0
XRL A, @DPTR
RL A
RLC A
RR A
RRC A
INC DPTR
DEC DPTR
INC A
DEC A
ADD A, R0
ADD A, R1
ADD A, R2
ADD A, R3
ADD A, DPH
ADD A, DPL
ADD A, #0xF0
ADD A, @DPTR
ADDC A, R0
ADDC A, R1
ADDC A, R2
ADDC A, R3
ADDC A, DPH
ADDC A, DPL
ADDC A, #0xF0
ADDC A, @DPTR
SUB A, R0
SUB A, R1
SUB A, R2
SUB A, R3
SUB A, DPH
SUB A, DPL
SUB A, #0xF0
SUB A, @DPTR
SUBB A, R0
SUBB A, R1
SUBB A, R2
SUBB A, R3
SUBB A, DPH
SUBB A, DPL
SUBB A, #0xF0
SUBB A, @DPTR
PJMP addr11
PJMP addr11
PJMP addr11
PJMP addr11
PJMP addr11
PJMP addr11
PJMP addr11
PJMP addr11
PCALL addr11
PCALL addr11
PCALL addr11
PCALL addr11
PCALL addr11
PCALL addr11
PCALL addr11
PCALL addr11
DJNZ R0, 0x0F
DJNZ R1, 0x0F
DJNZ R2, 0x0F
DJNZ R3, 0x0F
CJNE R0, #0xF0, 0x0F
CJNE R1, #0xF0, 0x0F
CJNE R2, #0xF0, 0x0F
CJNE R3, #0xF0, 0x0F
LJMP 0x000F
LCALL 0x000F
RET
RETI
SJMP
JMP @A+DPTR
JMP @DPTR
CJNE A, #0xF0, 0x0F
JZ 0x0F
JNZ 0x0F
JC 0x0F
JNC 0x0F
JPO 0x0F
JPE 0x0F
JS 0x0F
JNS 0x0F
PUSH R0
PUSH R1
PUSH R2
PUSH R3
PUSH DPH
PUSH DPL
PUSH A
reserved ;PUSH FLAGS
POP R0
POP R1
POP R2
POP R3
POP DPH
POP DPL
POP A
reserved ;POP FLAGS
MUL R0, R1
DIV R0, R1
DA A
reserved
reserved ;IN A, port_addr
reserved ;OUT port_addr, A
reserved ;INT vect8
HLT