annotate emu52/src/mem.c @ 42:792da050d8c4 tip

more dox
author james <jb302@eecs.qmul.ac.uk>
date Tue, 22 Apr 2014 14:25:14 +0100
parents 0f3bd942a7d4
children
rev   line source
jb302@36 1 /* mem.c
jb302@36 2 * functions for accessing emulator memory */
jb302@36 3 #include "mem.h"
jb302@36 4
jb302@36 5 /* get flag value
jb302@36 6 * if invalid flag is requested value is 0 */
jb302@36 7 BYTE
jb302@36 8 get_flag(BYTE flag) {
jb302@36 9 if (flag > 7) {
jb302@36 10 return 0;
jb302@36 11 }
jb302@36 12 else {
jb302@36 13 return GBIT(flags, flag);
jb302@36 14 }
jb302@36 15 }
jb302@36 16
jb302@36 17 /* set flag to 0 if on == 0
jb302@36 18 * otherwise set flag to 1 */
jb302@36 19 void
jb302@36 20 set_flag(BYTE flag, BYTE on) {
jb302@36 21 if (flag <= 7) {
jb302@36 22 if (on == 0x00) {
jb302@36 23 flags = CBIT(flags, flag);
jb302@36 24 }
jb302@36 25 else {
jb302@36 26 flags = SBIT(flags, flag);
jb302@36 27 }
jb302@36 28 }
jb302@36 29 }
jb302@36 30
jb302@36 31 /* sets zero and parity flags based on content of byte */
jb302@36 32 void
jb302@36 33 set_zp(BYTE val){
jb302@36 34 if (val == 0) {
jb302@36 35 set_flag(Z, 1);
jb302@36 36 set_flag(P, 0);
jb302@36 37 }
jb302@36 38 else {
jb302@36 39 /* check parity
jb302@36 40 * think of this as folding */
jb302@36 41 val ^= val >> 4;
jb302@36 42 val ^= val >> 2;
jb302@36 43 val ^= val >> 1;
jb302@36 44 val &= 1;
jb302@36 45 if (val == 0) {
jb302@36 46 set_flag(P, 1);
jb302@36 47 }
jb302@36 48 else {
jb302@36 49 set_flag(P, 0);
jb302@36 50 }
jb302@36 51 }
jb302@36 52 }
jb302@36 53
jb302@36 54 WIDE
jb302@36 55 get_wide(BYTE reg) {
jb302@36 56 /* high, low */
jb302@36 57 return MWIDE(regs[reg + 4], regs[reg + 12]);
jb302@36 58 }
jb302@36 59
jb302@36 60 void
jb302@36 61 set_wide(BYTE reg, WIDE val) {
jb302@36 62 regs[reg + 4] = GHIGH(val); /* high */
jb302@36 63 regs[reg + 12] = GLOW(val); /* low */
jb302@36 64 }
jb302@36 65
jb302@36 66 void
jb302@36 67 inc_pc(BYTE n) {
jb302@36 68 if ((regs[PCL] + n) > 0xFF) {
jb302@36 69 regs[PCH]++;
jb302@36 70 }
jb302@36 71 regs[PCL] += n;
jb302@36 72 }
jb302@36 73
jb302@36 74 BYTE
jb302@36 75 fetch(void) {
jb302@36 76 BYTE val = mem[get_wide(PC)];
jb302@36 77 inc_pc(1);
jb302@36 78 return val;
jb302@36 79 }
jb302@36 80
jb302@36 81 WIDE
jb302@36 82 fetch_wide(void) {
jb302@36 83 WIDE val = MWIDE(mem[get_wide(PC)], mem[get_wide(PC) + 1]);
jb302@36 84 inc_pc(2);
jb302@36 85 return val;
jb302@36 86 }
jb302@36 87
jb302@36 88 /* 0b000 = R0
jb302@36 89 * 0b001 = R1
jb302@36 90 * 0b010 = R2
jb302@36 91 * 0b011 = R3
jb302@36 92 * 0b100 = DPH
jb302@36 93 * 0b101 = DPL
jb302@36 94 * 0b110 = SPH
jb302@36 95 * 0b111 = SPL */
jb302@36 96 BYTE
jb302@36 97 get_reg(BYTE reg) {
jb302@36 98 if (reg < 4) {
jb302@36 99 return regs[reg | (get_flag(BS) << 3)];
jb302@36 100 }
jb302@36 101 else {
jb302@36 102 switch (reg) {
jb302@36 103
jb302@36 104 case 4:
jb302@36 105 return regs[DPH];
jb302@36 106 case 5:
jb302@36 107 return regs[DPL];
jb302@36 108 case 6:
jb302@36 109 return regs[SPH];
jb302@36 110 case 7:
jb302@36 111 return regs[SPL];
jb302@36 112 default:
jb302@36 113 return 0;
jb302@36 114 }
jb302@36 115 }
jb302@36 116 }
jb302@36 117
jb302@36 118 void
jb302@36 119 set_reg(BYTE reg, BYTE val) {
jb302@36 120 if (reg < 4) {
jb302@36 121 regs[reg | (get_flag(BS) << 3)] = val;
jb302@36 122 }
jb302@36 123 else {
jb302@36 124 switch (reg) {
jb302@36 125
jb302@36 126 case 4:
jb302@36 127 regs[DPH] = val;
jb302@36 128 break;
jb302@36 129 case 5:
jb302@36 130 regs[DPL] = val;
jb302@36 131 break;
jb302@36 132 case 6:
jb302@36 133 regs[SPH] = val;
jb302@36 134 break;
jb302@36 135 case 7:
jb302@36 136 regs[SPL] = val;
jb302@36 137 break;
jb302@36 138 default:
jb302@36 139 break;
jb302@36 140 }
jb302@36 141 }
jb302@36 142 }