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changeset 188:c706be7daad7

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Fixed misbehaviour of GPIO when -C2: the GPIO buffer was being processed at double sampling rate and so for the second part of the buffer, it was just processing zeros. Closes #1532.
author Giulio Moro <giuliomoro@yahoo.it>
date Wed, 20 Jan 2016 15:35:48 +0000
parents d7148d21aaa5
children 7144c5594d16
files include/pru_rtaudio_bin.h pru_rtaudio.p
diffstat 2 files changed, 18 insertions(+), 7 deletions(-) [+]
line wrap: on
line diff
--- a/include/pru_rtaudio_bin.h	Tue Jan 19 02:54:13 2016 +0000
+++ b/include/pru_rtaudio_bin.h	Wed Jan 20 15:35:48 2016 +0000
@@ -655,7 +655,7 @@
      0x12e3efef,
      0x80f73c8f,
      0x0104f7f7,
-     0xc901f863,
+     0xc901f867,
      0x24ffffe2,
      0x10e2ece7,
      0x0904e7e7,
@@ -689,7 +689,11 @@
      0x24c1909c,
      0xe1003c9b,
      0xe14c3a87,
-     0xc903f807,
+     0xc903f80b,
+     0x4902e904,
+     0x1101eafb,
+     0x6900fb08,
+     0x2102b300,
      0x1103e1fb,
      0x6900fb05,
      0xf100269b,
@@ -752,13 +756,13 @@
      0x0104f3f3,
      0x1504f8f8,
      0x0101e1e1,
-     0x6ee9e177,
+     0x6ee9e173,
      0x79000004,
      0x1504f8f8,
      0x0102e1e1,
-     0x6ee9e173,
+     0x6ee9e16f,
      0x0101eaea,
-     0x6eebea70,
+     0x6eebea6c,
      0x10f0f0e2,
      0x10f1f1f0,
      0x10e2e2f1,
@@ -787,7 +791,7 @@
      0x00e1e3e3,
      0xe1002382,
      0xf1003982,
-     0x5700e243,
+     0x5700e23f,
      0x240000fb,
      0xe1443d9b,
      0xc901f80c,
--- a/pru_rtaudio.p	Tue Jan 19 02:54:13 2016 +0000
+++ b/pru_rtaudio.p	Wed Jan 20 15:35:48 2016 +0000
@@ -383,7 +383,7 @@
 JMP r28.w0 // go back to ADC_WRITE_AND_PROCESS_GPIO
 
 .macro HANG //useful for debugging
-DALOOP: 
+DALOOP:
     set r30.t14
     clr r30.t14
 QBA DALOOP
@@ -480,8 +480,15 @@
      ADC_CS_ASSERT
      ADC_TX in
      QBBC GPIO_DONE, reg_flags, FLAG_BIT_USE_DIGITAL //skip if DIGITAL is disabled
+     QBLT CASE_4_OR_8_CHANNELS, reg_num_channels, 2
+CASE_2_CHANNELS:
+     AND r27, reg_frame_current, 0x1
+     QBNE GPIO_DONE, r27, 0
+     JMP DO_GPIO
+CASE_4_OR_8_CHANNELS:
      AND r27, do_gpio, 0x3 // only do a DIGITAL every 2 SPI I/O
      QBNE GPIO_DONE, r27, 0 
+DO_GPIO:
 //from here to GPIO_DONE takes 1.8us, while usually ADC_WAIT_FOR_FINISH only waits for 1.14us.
 //TODO: it would be better to split the DIGITAL stuff in two parts:
 //- one taking place during DAC_WRITE which sets the GPIO_OE