comparison core/I2c_Codec.cpp @ 142:d064234468cd

Added I2c methods to set R and P values for the PLL

 // See the TLV320AIC3106 datasheet for full details of the registers
 // The dual_rate flag, when true, runs the codec at 88.2kHz; otherwise
 // it runs at 44.1kHz
 int I2c_Codec::startAudio(int dual_rate)
 {
+	// see datasehet for TLV320AIC3104 from page 44
 	if(writeRegister(0x02, 0x00))	// Codec sample rate register: fs_ref / 1
 		return 1;
-	if(writeRegister(0x03, 0x91))	// PLL register A: enable
+//	if(writeRegister(0x03, 0x91))	// PLL register A: enable
+//		return 1;
+	if(setPllP(1))
 		return 1;
 //	if(writeRegister(0x04, 0x1C))	// PLL register B
 //		return 1;
 //	if(writeRegister(0x05, 0x52))	// PLL register C
 //		return 1;

 		return 1;
 	if(writeRegister(0x09, 0x40))	// Audio serial control register B: DSP mode, word len 16 bits
 		return 1;
 	if(writeRegister(0x0A, 0x00))	// Audio serial control register C: 0 bit offset
 		return 1;
-	if(writeRegister(0x0B, 0x01))	// Audio codec overflow flag register: PLL R = 1
+//	if(writeRegister(0x0B, 0x01))	// Audio codec overflow flag register: PLL R = 1
+//		return 1;
+	if(setPllR(1))
 		return 1;
 	if(writeRegister(0x0C, 0x00))	// Digital filter register: disabled
 		return 1;
 	if(writeRegister(0x0D, 0x00))	// Headset / button press register A: disabled
 		return 1;

 		return 1;
 
 	if(writeHPVolumeRegisters())	// Send DAC to high-power outputs
 		return 1;
 
-	if(writeRegister(0x66, 0x02))			// Clock generation control register: use MCLK, PLL N = 2
+	if(writeRegister(0x66, 0x02))	// Clock generation control register: use MCLK, PLL N = 2
 		return 1;
 
 	if(writeRegister(0x33, 0x0D))	// HPLOUT output level control: output level = 0dB, not muted, powered up
 		return 1;
 	if(writeRegister(0x41, 0x0D))	// HPROUT output level control: output level = 0dB, not muted, powered up

 	}
 	pllD=d;
 	return 0;
 }
 
+//set integer part of the numerator mutliplier of the PLL
+//
+int I2c_Codec::setPllP(short unsigned int p){
+	if(p > 8 || p < 1){
+			return 1;
+	}
+	short unsigned int bits = 0;
+	bits |= 1 << 7; //this means PLL enabled
+	bits |= 0b0010 << 3; // this is the reset value for Q, which is anyhow unused when PLL is active
+	if (p == 8) // 8 is a special value: PLL P Value 000: P = 8
+		bits = bits | 0;
+	else
+		bits = bits | p; // other values are written with their binary representation.
+	if(writeRegister(0x03, bits)){	// PLL register B: j<<2
+		printf("I2C error while writing PLL p: %d", p);
+		return 1;
+	}
+	pllP = p;
+	return 0;
+}
+int I2c_Codec::setPllR(unsigned int r){
+	if(r > 16){ //value out of range
+		return 1;
+	}
+	unsigned int bits = 0;
+	//bits D7-D4 are for ADC and DAC overflow flags and are read only
+	if(r == 16) // 16 is a special value: PLL R Value 0000: R = 16
+		bits |= 0;
+	else
+		bits |= r; // other values are written with their binary representation.
+	if(writeRegister(0x0B, bits)){	// PLL register B: j<<2
+			printf("I2C error while writing PLL r: %d", r);
+			return 1;
+		}
+	pllR = r;
+	return 0;
+}
 int I2c_Codec::setAudioSamplingRate(float newSamplingRate){
-	int pllP=1; //TODO: create get/set for pllP and pllR
+	int pllP=getPllP(); //TODO: create get/set for pllP and pllR
 	int pllR=1;
 	long int PLLCLK_IN=12000000;
 	//	f_{S(ref)} = (PLLCLK_IN × K × R)/(2048 × P)
 	float k = ((double)(newSamplingRate * pllP * 2048.0f/(float)pllR)) / PLLCLK_IN ;
 	return (setPllK(k));

 short unsigned int I2c_Codec::getPllJ(){
 	return pllJ;
 }
 unsigned int I2c_Codec::getPllD(){
 	return pllD;
+}
+unsigned int I2c_Codec::getPllR(){
+	return pllR;
+}
+unsigned int I2c_Codec::getPllP(){
+	return pllP;
 }
 float I2c_Codec::getPllK(){
 	float j=getPllJ();
 	float d=getPllD();
 	float k=j+d/10000.0f;