Mercurial > hg > beaglert
comparison core/I2c_Codec.cpp @ 145:8ff5668bbbad
Further updates and refactoring of the I2c_Codec class
author | Giulio Moro <giuliomoro@yahoo.it> |
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date | Mon, 14 Sep 2015 21:38:09 +0100 |
parents | d064234468cd |
children | e9a2f31dff7b 94751ad27fd6 |
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142:d064234468cd | 145:8ff5668bbbad |
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41 int I2c_Codec::startAudio(int dual_rate) | 41 int I2c_Codec::startAudio(int dual_rate) |
42 { | 42 { |
43 // see datasehet for TLV320AIC3104 from page 44 | 43 // see datasehet for TLV320AIC3104 from page 44 |
44 if(writeRegister(0x02, 0x00)) // Codec sample rate register: fs_ref / 1 | 44 if(writeRegister(0x02, 0x00)) // Codec sample rate register: fs_ref / 1 |
45 return 1; | 45 return 1; |
46 // The sampling frequency is given as f_{S(ref)} = (PLLCLK_IN × K × R)/(2048 × P) | |
47 // The master clock PLLCLK_IN is 12MHz | |
48 // K can be varied in intervals of resolution of 0.0001 up to 63.9999 | |
49 // using P=8 and R=1 gives a resolution of 0.0732421875Hz ( 0.000166% at 44.1kHz) | |
50 // to obtain Fs=44100 we need to have K=60.2112 | |
51 | |
52 if(setPllP(8)) | |
53 return 1; | |
54 if(setPllR(1)) | |
55 return 1; | |
56 if(setAudioSamplingRate(44100)) //this will automatically find and set K for the given P and R so that Fs=44100 | |
57 return 1; | |
46 // if(writeRegister(0x03, 0x91)) // PLL register A: enable | 58 // if(writeRegister(0x03, 0x91)) // PLL register A: enable |
47 // return 1; | 59 // return 1; |
48 if(setPllP(1)) | |
49 return 1; | |
50 // if(writeRegister(0x04, 0x1C)) // PLL register B | 60 // if(writeRegister(0x04, 0x1C)) // PLL register B |
51 // return 1; | 61 // return 1; |
52 // if(writeRegister(0x05, 0x52)) // PLL register C | 62 // if(writeRegister(0x05, 0x52)) // PLL register C |
53 // return 1; | 63 // return 1; |
54 // if(writeRegister(0x06, 0x40)) // PLL register D | 64 // if(writeRegister(0x06, 0x40)) // PLL register D |
55 // return 1; | 65 // return 1; |
56 if(setPllD(5264)) //7.5264 gives 44.1kHz nominal value with a 12MHz master clock | 66 // if(writeRegister(0x0B, 0x01)) // Audio codec overflow flag register: PLL R = 1 |
57 return 1; | 67 // return 1; |
58 if(setPllJ(7)) | 68 |
59 return 1; | 69 // if(setPllD(5264)) //7.5264 gives 44.1kHz nominal value with a 12MHz master clock |
70 // return 1; | |
71 // if(setPllJ(7)) | |
72 // return 1; | |
60 if(dual_rate) { | 73 if(dual_rate) { |
61 if(writeRegister(0x07, 0xEA)) // Codec datapath register: 44.1kHz; dual rate; standard datapath | 74 if(writeRegister(0x07, 0xEA)) // Codec datapath register: 44.1kHz; dual rate; standard datapath |
62 return 1; | 75 return 1; |
63 } | 76 } |
64 else { | 77 else { |
68 if(writeRegister(0x08, 0xC0)) // Audio serial control register A: BLCK, WCLK outputs | 81 if(writeRegister(0x08, 0xC0)) // Audio serial control register A: BLCK, WCLK outputs |
69 return 1; | 82 return 1; |
70 if(writeRegister(0x09, 0x40)) // Audio serial control register B: DSP mode, word len 16 bits | 83 if(writeRegister(0x09, 0x40)) // Audio serial control register B: DSP mode, word len 16 bits |
71 return 1; | 84 return 1; |
72 if(writeRegister(0x0A, 0x00)) // Audio serial control register C: 0 bit offset | 85 if(writeRegister(0x0A, 0x00)) // Audio serial control register C: 0 bit offset |
73 return 1; | |
74 // if(writeRegister(0x0B, 0x01)) // Audio codec overflow flag register: PLL R = 1 | |
75 // return 1; | |
76 if(setPllR(1)) | |
77 return 1; | 86 return 1; |
78 if(writeRegister(0x0C, 0x00)) // Digital filter register: disabled | 87 if(writeRegister(0x0C, 0x00)) // Digital filter register: disabled |
79 return 1; | 88 return 1; |
80 if(writeRegister(0x0D, 0x00)) // Headset / button press register A: disabled | 89 if(writeRegister(0x0D, 0x00)) // Headset / button press register A: disabled |
81 return 1; | 90 return 1; |
203 } | 212 } |
204 pllR = r; | 213 pllR = r; |
205 return 0; | 214 return 0; |
206 } | 215 } |
207 int I2c_Codec::setAudioSamplingRate(float newSamplingRate){ | 216 int I2c_Codec::setAudioSamplingRate(float newSamplingRate){ |
208 int pllP=getPllP(); //TODO: create get/set for pllP and pllR | |
209 int pllR=1; | |
210 long int PLLCLK_IN=12000000; | 217 long int PLLCLK_IN=12000000; |
211 // f_{S(ref)} = (PLLCLK_IN × K × R)/(2048 × P) | 218 // f_{S(ref)} = (PLLCLK_IN × K × R)/(2048 × P) |
212 float k = ((double)(newSamplingRate * pllP * 2048.0f/(float)pllR)) / PLLCLK_IN ; | 219 float k = ((double)(newSamplingRate * pllP * 2048.0f/(float)pllR)) / PLLCLK_IN ; |
213 return (setPllK(k)); | 220 return (setPllK(k)); |
214 } | 221 } |