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annotate resources/am335x-bonegreen.dts @ 524:9f455f01edd5 prerelease

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Doxygen updates
author Robert Jack <robert.h.jack@gmail.com>
date Thu, 23 Jun 2016 10:19:24 +0100
parents f25940933503
children
rev   line source
andrewm@154 1 /dts-v1/;
andrewm@154 2
andrewm@154 3 / {
andrewm@154 4 #address-cells = <0x1>;
andrewm@154 5 #size-cells = <0x1>;
andrewm@154 6 compatible = "ti,am335x-bone", "ti,am33xx";
andrewm@154 7 interrupt-parent = <0x1>;
andrewm@154 8 model = "TI AM335x BeagleBone";
andrewm@154 9
andrewm@154 10 chosen {
andrewm@154 11 };
andrewm@154 12
andrewm@154 13 aliases {
andrewm@154 14 serial0 = "/ocp/serial@44e09000";
andrewm@154 15 serial1 = "/ocp/serial@48022000";
andrewm@154 16 serial2 = "/ocp/serial@48024000";
andrewm@154 17 serial3 = "/ocp/serial@481a6000";
andrewm@154 18 serial4 = "/ocp/serial@481a8000";
andrewm@154 19 serial5 = "/ocp/serial@481aa000";
andrewm@154 20 };
andrewm@154 21
andrewm@154 22 memory {
andrewm@154 23 device_type = "memory";
andrewm@154 24 reg = <0x80000000 0x10000000>;
andrewm@154 25 };
andrewm@154 26
andrewm@154 27 cpus {
andrewm@154 28
andrewm@154 29 cpu@0 {
andrewm@154 30 compatible = "arm,cortex-a8";
andrewm@154 31 operating-points = <0xf4240 0x149970 0xc3500 0x13d620 0x927c0 0x10f7c0 0x493e0 0xec928>;
andrewm@154 32 voltage-tolerance = <0x2>;
andrewm@154 33 clock-latency = <0x493e0>;
andrewm@154 34 cpu0-supply = <0x2>;
andrewm@154 35 linux,phandle = <0x12>;
andrewm@154 36 phandle = <0x12>;
andrewm@154 37 };
andrewm@154 38 };
andrewm@154 39
andrewm@154 40 soc {
andrewm@154 41 compatible = "ti,omap-infra";
andrewm@154 42
andrewm@154 43 mpu {
andrewm@154 44 compatible = "ti,omap3-mpu";
andrewm@154 45 ti,hwmods = "mpu";
andrewm@154 46 };
andrewm@154 47 };
andrewm@154 48
andrewm@154 49 pinmux@44e10800 {
andrewm@154 50 compatible = "pinctrl-single";
andrewm@154 51 reg = <0x44e10800 0x238>;
andrewm@154 52 #address-cells = <0x1>;
andrewm@154 53 #size-cells = <0x0>;
andrewm@154 54 pinctrl-single,register-width = <0x20>;
andrewm@154 55 pinctrl-single,function-mask = <0x7f>;
andrewm@154 56 pinctrl-names = "default";
andrewm@154 57 pinctrl-0 = <0x3>;
andrewm@154 58 linux,phandle = <0x13>;
andrewm@154 59 phandle = <0x13>;
andrewm@154 60
andrewm@154 61 pinmux_userled_pins {
andrewm@154 62 pinctrl-single,pins = <0x54 0x7 0x58 0x17 0x5c 0x7 0x60 0x17
andrewm@154 63 // /*PRU1 GPO 0-7*/ 0xa0 0x05 0xa4 0x05 0xa8 0x05 0xac 0x05 0xb0 0x05 0xb4 0x05 0xb8 0x05 0xbc 0x05
andrewm@154 64 /*GPIOrt pins*/ 0x90 0x27 0x94 0x27 0x9c 0x27 0x98 0x27 0x34 0x27 0x30 0x27 0x78 0x27 0x48 0x27 0x3c 0x27 0x38 0x27 0x4c 0x27 0x8c 0x27 0xe0 0x27 0xe8 0x27 0xe4 0x27 0xec 0x27
andrewm@154 65 // /*GPIOrt pins with PRU0 gpo*/ 0x90 0x27 0x94 0x27 0x9c 0x27 0x98 0x27 0x34 0x06 0x30 0x06 0x78 0x27 0x48 0x27 0x3c 0x27 0x38 0x27 0x4c 0x27 0x8c 0x27 0xe0 0x27 0xe8 0x27 0xe4 0x27 0xec 0x27
andrewm@154 66 >;
andrewm@154 67 linux,phandle = <0x3>;
andrewm@154 68 phandle = <0x3>;
andrewm@154 69 };
andrewm@154 70
andrewm@154 71 pinmux_i2c0_pins {
andrewm@154 72 pinctrl-single,pins = <0x188 0x70 0x18c 0x70>;
andrewm@154 73 linux,phandle = <0x6>;
andrewm@154 74 phandle = <0x6>;
andrewm@154 75 };
andrewm@154 76
andrewm@154 77 pinmux_i2c1_pins {
andrewm@154 78 pinctrl-single,pins = <0x180 0x73 0x184 0x73>;
andrewm@154 79 linux,phandle = <0x7>;
andrewm@154 80 phandle = <0x7>;
andrewm@154 81 };
andrewm@154 82
andrewm@154 83 pinmux_i2c2_pins {
andrewm@154 84 pinctrl-single,pins = <0x178 0x73 0x17c 0x73>;
andrewm@154 85 linux,phandle = <0x8>;
andrewm@154 86 phandle = <0x8>;
andrewm@154 87 };
andrewm@154 88
andrewm@154 89 pinmux_rstctl_pins {
andrewm@154 90 pinctrl-single,pins = <0x50 0x17>;
andrewm@154 91 linux,phandle = <0x4>;
andrewm@154 92 phandle = <0x4>;
andrewm@154 93 };
andrewm@154 94 };
andrewm@154 95
andrewm@154 96 ocp {
andrewm@154 97 compatible = "simple-bus";
andrewm@154 98 #address-cells = <0x1>;
andrewm@154 99 #size-cells = <0x1>;
andrewm@154 100 ranges;
andrewm@154 101 ti,hwmods = "l3_main";
andrewm@154 102 linux,phandle = <0x14>;
andrewm@154 103 phandle = <0x14>;
andrewm@154 104
andrewm@154 105 interrupt-controller@48200000 {
andrewm@154 106 compatible = "ti,omap2-intc";
andrewm@154 107 interrupt-controller;
andrewm@154 108 #interrupt-cells = <0x1>;
andrewm@154 109 ti,intc-size = <0x80>;
andrewm@154 110 reg = <0x48200000 0x1000>;
andrewm@154 111 linux,phandle = <0x1>;
andrewm@154 112 phandle = <0x1>;
andrewm@154 113 };
andrewm@154 114
andrewm@154 115 edma@49000000 {
andrewm@154 116 compatible = "ti,edma3";
andrewm@154 117 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
andrewm@154 118 reg = <0x49000000 0x10000 0x44e10f90 0x40>;
andrewm@154 119 interrupt-parent = <0x1>;
andrewm@154 120 interrupts = <0xc 0xd 0xe>;
andrewm@154 121 #dma-cells = <0x1>;
andrewm@154 122 dma-channels = <0x40>;
andrewm@154 123 ti,edma-regions = <0x4>;
andrewm@154 124 ti,edma-slots = <0x100>;
andrewm@154 125 ti,edma-queue-tc-map = <0x0 0x0 0x1 0x1 0x2 0x2>;
andrewm@154 126 ti,edma-queue-priority-map = <0x0 0x0 0x1 0x1 0x2 0x2>;
andrewm@154 127 ti,edma-default-queue = <0x1>;
andrewm@154 128 ti,edma-xbar-event-map = <0x20 0xc 0x1e 0x14>;
andrewm@154 129 linux,phandle = <0x9>;
andrewm@154 130 phandle = <0x9>;
andrewm@154 131 };
andrewm@154 132
andrewm@154 133 gpio@44e07000 {
andrewm@154 134 compatible = "ti,omap4-gpio";
andrewm@154 135 ti,hwmods = "gpio1";
andrewm@154 136 gpio-controller;
andrewm@154 137 #gpio-cells = <0x2>;
andrewm@154 138 interrupt-controller;
andrewm@154 139 #interrupt-cells = <0x1>;
andrewm@154 140 reg = <0x44e07000 0x1000>;
andrewm@154 141 interrupts = <0x60>;
andrewm@154 142 linux,phandle = <0x15>;
andrewm@154 143 phandle = <0x15>;
andrewm@154 144 };
andrewm@154 145
andrewm@154 146 gpio@4804c000 {
andrewm@154 147 compatible = "ti,omap4-gpio";
andrewm@154 148 ti,hwmods = "gpio2";
andrewm@154 149 gpio-controller;
andrewm@154 150 #gpio-cells = <0x2>;
andrewm@154 151 interrupt-controller;
andrewm@154 152 #interrupt-cells = <0x1>;
andrewm@154 153 reg = <0x4804c000 0x1000>;
andrewm@154 154 interrupts = <0x62>;
andrewm@154 155 linux,phandle = <0x5>;
andrewm@154 156 phandle = <0x5>;
andrewm@154 157 };
andrewm@154 158
andrewm@154 159 gpio@481ac000 {
andrewm@154 160 compatible = "ti,omap4-gpio";
andrewm@154 161 ti,hwmods = "gpio3";
andrewm@154 162 gpio-controller;
andrewm@154 163 #gpio-cells = <0x2>;
andrewm@154 164 interrupt-controller;
andrewm@154 165 #interrupt-cells = <0x1>;
andrewm@154 166 reg = <0x481ac000 0x1000>;
andrewm@154 167 interrupts = <0x20>;
andrewm@154 168 linux,phandle = <0x16>;
andrewm@154 169 phandle = <0x16>;
andrewm@154 170 };
andrewm@154 171
andrewm@154 172 gpio@481ae000 {
andrewm@154 173 compatible = "ti,omap4-gpio";
andrewm@154 174 ti,hwmods = "gpio4";
andrewm@154 175 gpio-controller;
andrewm@154 176 #gpio-cells = <0x2>;
andrewm@154 177 interrupt-controller;
andrewm@154 178 #interrupt-cells = <0x1>;
andrewm@154 179 reg = <0x481ae000 0x1000>;
andrewm@154 180 interrupts = <0x3e>;
andrewm@154 181 linux,phandle = <0x17>;
andrewm@154 182 phandle = <0x17>;
andrewm@154 183 };
andrewm@154 184
andrewm@154 185 rstctl@0 {
andrewm@154 186 status = "okay";
andrewm@154 187 compatible = "gpio-rctrl";
andrewm@154 188 pinctrl-names = "default";
andrewm@154 189 pinctrl-0 = <0x4>;
andrewm@154 190 #reset-cells = <0x2>;
andrewm@154 191 gpios = <0x5 0x14 0x0>;
andrewm@154 192 gpio-names = "eMMC_RSTn";
andrewm@154 193 linux,phandle = <0xb>;
andrewm@154 194 phandle = <0xb>;
andrewm@154 195 };
andrewm@154 196
andrewm@154 197 serial@44e09000 {
andrewm@154 198 compatible = "ti,omap3-uart";
andrewm@154 199 ti,hwmods = "uart1";
andrewm@154 200 clock-frequency = <0x2dc6c00>;
andrewm@154 201 reg = <0x44e09000 0x2000>;
andrewm@154 202 interrupts = <0x48>;
andrewm@154 203 status = "okay";
andrewm@154 204 linux,phandle = <0x18>;
andrewm@154 205 phandle = <0x18>;
andrewm@154 206 };
andrewm@154 207
andrewm@154 208 serial@48022000 {
andrewm@154 209 compatible = "ti,omap3-uart";
andrewm@154 210 ti,hwmods = "uart2";
andrewm@154 211 clock-frequency = <0x2dc6c00>;
andrewm@154 212 reg = <0x48022000 0x2000>;
andrewm@154 213 interrupts = <0x49>;
andrewm@154 214 status = "okay";
andrewm@154 215 linux,phandle = <0x19>;
andrewm@154 216 phandle = <0x19>;
andrewm@154 217 };
andrewm@154 218
andrewm@154 219 serial@48024000 {
andrewm@154 220 compatible = "ti,omap3-uart";
andrewm@154 221 ti,hwmods = "uart3";
andrewm@154 222 clock-frequency = <0x2dc6c00>;
andrewm@154 223 reg = <0x48024000 0x2000>;
andrewm@154 224 interrupts = <0x4a>;
andrewm@154 225 status = "disabled";
andrewm@154 226 linux,phandle = <0x1a>;
andrewm@154 227 phandle = <0x1a>;
andrewm@154 228 };
andrewm@154 229
andrewm@154 230 serial@481a6000 {
andrewm@154 231 compatible = "ti,omap3-uart";
andrewm@154 232 ti,hwmods = "uart4";
andrewm@154 233 clock-frequency = <0x2dc6c00>;
andrewm@154 234 reg = <0x481a6000 0x2000>;
andrewm@154 235 interrupts = <0x2c>;
andrewm@154 236 status = "disabled";
andrewm@154 237 linux,phandle = <0x1b>;
andrewm@154 238 phandle = <0x1b>;
andrewm@154 239 };
andrewm@154 240
andrewm@154 241 serial@481a8000 {
andrewm@154 242 compatible = "ti,omap3-uart";
andrewm@154 243 ti,hwmods = "uart5";
andrewm@154 244 clock-frequency = <0x2dc6c00>;
andrewm@154 245 reg = <0x481a8000 0x2000>;
andrewm@154 246 interrupts = <0x2d>;
andrewm@154 247 status = "disabled";
andrewm@154 248 linux,phandle = <0x1c>;
andrewm@154 249 phandle = <0x1c>;
andrewm@154 250 };
andrewm@154 251
andrewm@154 252 serial@481aa000 {
andrewm@154 253 compatible = "ti,omap3-uart";
andrewm@154 254 ti,hwmods = "uart6";
andrewm@154 255 clock-frequency = <0x2dc6c00>;
andrewm@154 256 reg = <0x481aa000 0x2000>;
andrewm@154 257 interrupts = <0x2e>;
andrewm@154 258 status = "disabled";
andrewm@154 259 linux,phandle = <0x1d>;
andrewm@154 260 phandle = <0x1d>;
andrewm@154 261 };
andrewm@154 262
andrewm@154 263 i2c@44e0b000 {
andrewm@154 264 compatible = "ti,omap4-i2c";
andrewm@154 265 #address-cells = <0x1>;
andrewm@154 266 #size-cells = <0x0>;
andrewm@154 267 ti,hwmods = "i2c1";
andrewm@154 268 reg = <0x44e0b000 0x1000>;
andrewm@154 269 interrupts = <0x46>;
andrewm@154 270 status = "okay";
andrewm@154 271 clock-frequency = <0x61a80>;
andrewm@154 272 pinctrl-names = "default";
andrewm@154 273 pinctrl-0 = <0x6>;
andrewm@154 274 linux,phandle = <0x1e>;
andrewm@154 275 phandle = <0x1e>;
andrewm@154 276
andrewm@154 277 tps@24 {
andrewm@154 278 reg = <0x24>;
andrewm@154 279 compatible = "ti,tps65217";
andrewm@154 280 ti,pmic-shutdown-controller;
andrewm@154 281 linux,phandle = <0x1f>;
andrewm@154 282 phandle = <0x1f>;
andrewm@154 283
andrewm@154 284 regulators {
andrewm@154 285 #address-cells = <0x1>;
andrewm@154 286 #size-cells = <0x0>;
andrewm@154 287
andrewm@154 288 regulator@0 {
andrewm@154 289 reg = <0x0>;
andrewm@154 290 regulator-compatible = "dcdc1";
andrewm@154 291 regulator-always-on;
andrewm@154 292 linux,phandle = <0x20>;
andrewm@154 293 phandle = <0x20>;
andrewm@154 294 };
andrewm@154 295
andrewm@154 296 regulator@1 {
andrewm@154 297 reg = <0x1>;
andrewm@154 298 regulator-compatible = "dcdc2";
andrewm@154 299 regulator-name = "vdd_mpu";
andrewm@154 300 regulator-min-microvolt = <0xe1d48>;
andrewm@154 301 regulator-max-microvolt = <0x1437c8>;
andrewm@154 302 regulator-boot-on;
andrewm@154 303 regulator-always-on;
andrewm@154 304 linux,phandle = <0x2>;
andrewm@154 305 phandle = <0x2>;
andrewm@154 306 };
andrewm@154 307
andrewm@154 308 regulator@2 {
andrewm@154 309 reg = <0x2>;
andrewm@154 310 regulator-compatible = "dcdc3";
andrewm@154 311 regulator-name = "vdd_core";
andrewm@154 312 regulator-min-microvolt = <0xe1d48>;
andrewm@154 313 regulator-max-microvolt = <0x118c30>;
andrewm@154 314 regulator-boot-on;
andrewm@154 315 regulator-always-on;
andrewm@154 316 linux,phandle = <0x21>;
andrewm@154 317 phandle = <0x21>;
andrewm@154 318 };
andrewm@154 319
andrewm@154 320 regulator@3 {
andrewm@154 321 reg = <0x3>;
andrewm@154 322 regulator-compatible = "ldo1";
andrewm@154 323 regulator-always-on;
andrewm@154 324 linux,phandle = <0x22>;
andrewm@154 325 phandle = <0x22>;
andrewm@154 326 };
andrewm@154 327
andrewm@154 328 regulator@4 {
andrewm@154 329 reg = <0x4>;
andrewm@154 330 regulator-compatible = "ldo2";
andrewm@154 331 regulator-always-on;
andrewm@154 332 linux,phandle = <0x23>;
andrewm@154 333 phandle = <0x23>;
andrewm@154 334 };
andrewm@154 335
andrewm@154 336 regulator@5 {
andrewm@154 337 reg = <0x5>;
andrewm@154 338 regulator-compatible = "ldo3";
andrewm@154 339 regulator-min-microvolt = <0x1b7740>;
andrewm@154 340 regulator-max-microvolt = <0x1b7740>;
andrewm@154 341 regulator-always-on;
andrewm@154 342 linux,phandle = <0x24>;
andrewm@154 343 phandle = <0x24>;
andrewm@154 344 };
andrewm@154 345
andrewm@154 346 regulator@6 {
andrewm@154 347 reg = <0x6>;
andrewm@154 348 regulator-compatible = "ldo4";
andrewm@154 349 regulator-always-on;
andrewm@154 350 linux,phandle = <0x25>;
andrewm@154 351 phandle = <0x25>;
andrewm@154 352 };
andrewm@154 353 };
andrewm@154 354 };
andrewm@154 355
andrewm@154 356 baseboard_eeprom@50 {
andrewm@154 357 compatible = "at,24c256";
andrewm@154 358 reg = <0x50>;
andrewm@154 359 linux,phandle = <0xd>;
andrewm@154 360 phandle = <0xd>;
andrewm@154 361 };
andrewm@154 362 };
andrewm@154 363
andrewm@154 364 i2c@4802a000 {
andrewm@154 365 compatible = "ti,omap4-i2c";
andrewm@154 366 #address-cells = <0x1>;
andrewm@154 367 #size-cells = <0x0>;
andrewm@154 368 ti,hwmods = "i2c2";
andrewm@154 369 reg = <0x4802a000 0x1000>;
andrewm@154 370 interrupts = <0x47>;
andrewm@154 371 status = "okay";
andrewm@154 372 pinctrl-names = "default";
andrewm@154 373 pinctrl-0 = <0x7>;
andrewm@154 374 clock-frequency = <0x61a80>;
andrewm@154 375 linux,phandle = <0x26>;
andrewm@154 376 phandle = <0x26>;
andrewm@154 377 };
andrewm@154 378
andrewm@154 379 i2c@4819c000 {
andrewm@154 380 compatible = "ti,omap4-i2c";
andrewm@154 381 #address-cells = <0x1>;
andrewm@154 382 #size-cells = <0x0>;
andrewm@154 383 ti,hwmods = "i2c3";
andrewm@154 384 reg = <0x4819c000 0x1000>;
andrewm@154 385 interrupts = <0x1e>;
andrewm@154 386 status = "okay";
andrewm@154 387 pinctrl-names = "default";
andrewm@154 388 pinctrl-0 = <0x8>;
andrewm@154 389 clock-frequency = <0x186a0>;
andrewm@154 390 linux,phandle = <0x27>;
andrewm@154 391 phandle = <0x27>;
andrewm@154 392
andrewm@154 393 cape_eeprom0@54 {
andrewm@154 394 compatible = "at,24c256";
andrewm@154 395 reg = <0x54>;
andrewm@154 396 linux,phandle = <0xe>;
andrewm@154 397 phandle = <0xe>;
andrewm@154 398 };
andrewm@154 399
andrewm@154 400 cape_eeprom1@55 {
andrewm@154 401 compatible = "at,24c256";
andrewm@154 402 reg = <0x55>;
andrewm@154 403 linux,phandle = <0xf>;
andrewm@154 404 phandle = <0xf>;
andrewm@154 405 };
andrewm@154 406
andrewm@154 407 cape_eeprom2@56 {
andrewm@154 408 compatible = "at,24c256";
andrewm@154 409 reg = <0x56>;
andrewm@154 410 linux,phandle = <0x10>;
andrewm@154 411 phandle = <0x10>;
andrewm@154 412 };
andrewm@154 413
andrewm@154 414 cape_eeprom3@57 {
andrewm@154 415 compatible = "at,24c256";
andrewm@154 416 reg = <0x57>;
andrewm@154 417 linux,phandle = <0x11>;
andrewm@154 418 phandle = <0x11>;
andrewm@154 419 };
andrewm@154 420 };
andrewm@154 421
andrewm@154 422 mmc@48060000 {
andrewm@154 423 compatible = "ti,omap3-hsmmc";
andrewm@154 424 ti,hwmods = "mmc1";
andrewm@154 425 ti,dual-volt;
andrewm@154 426 ti,needs-special-reset;
andrewm@154 427 ti,needs-special-hs-handling;
andrewm@154 428 dmas = <0x9 0x18 0x9 0x19>;
andrewm@154 429 dma-names = "tx", "rx";
andrewm@154 430 status = "okay";
andrewm@154 431 vmmc-supply = <0xa>;
andrewm@154 432 ti,vcc-aux-disable-is-sleep;
andrewm@154 433 linux,phandle = <0x28>;
andrewm@154 434 phandle = <0x28>;
andrewm@154 435 };
andrewm@154 436
andrewm@154 437 mmc@481d8000 {
andrewm@154 438 compatible = "ti,omap3-hsmmc";
andrewm@154 439 ti,hwmods = "mmc2";
andrewm@154 440 ti,needs-special-reset;
andrewm@154 441 ti,needs-special-hs-handling;
andrewm@154 442 dmas = <0x9 0x2 0x9 0x3>;
andrewm@154 443 dma-names = "tx", "rx";
andrewm@154 444 status = "okay";
andrewm@154 445 vmmc-supply = <0xa>;
andrewm@154 446 bus-width = <0x8>;
andrewm@154 447 ti,non-removable;
andrewm@154 448 reset = <0xb 0x0 0x0>;
andrewm@154 449 reset-names = "eMMC_RSTn-CONSUMER";
andrewm@154 450 linux,phandle = <0x29>;
andrewm@154 451 phandle = <0x29>;
andrewm@154 452 };
andrewm@154 453
andrewm@154 454 mmc@47810000 {
andrewm@154 455 compatible = "ti,omap3-hsmmc";
andrewm@154 456 ti,hwmods = "mmc3";
andrewm@154 457 ti,needs-special-reset;
andrewm@154 458 ti,needs-special-hs-handling;
andrewm@154 459 status = "disabled";
andrewm@154 460 linux,phandle = <0x2a>;
andrewm@154 461 phandle = <0x2a>;
andrewm@154 462 };
andrewm@154 463
andrewm@154 464 wdt@44e35000 {
andrewm@154 465 compatible = "ti,omap3-wdt";
andrewm@154 466 ti,hwmods = "wd_timer2";
andrewm@154 467 reg = <0x44e35000 0x1000>;
andrewm@154 468 interrupts = <0x5b>;
andrewm@154 469 linux,phandle = <0x2b>;
andrewm@154 470 phandle = <0x2b>;
andrewm@154 471 };
andrewm@154 472
andrewm@154 473 d_can@481cc000 {
andrewm@154 474 compatible = "bosch,d_can";
andrewm@154 475 ti,hwmods = "d_can0";
andrewm@154 476 reg = <0x481cc000 0x2000>;
andrewm@154 477 interrupts = <0x34>;
andrewm@154 478 status = "disabled";
andrewm@154 479 linux,phandle = <0x2c>;
andrewm@154 480 phandle = <0x2c>;
andrewm@154 481 };
andrewm@154 482
andrewm@154 483 d_can@481d0000 {
andrewm@154 484 compatible = "bosch,d_can";
andrewm@154 485 ti,hwmods = "d_can1";
andrewm@154 486 reg = <0x481d0000 0x2000>;
andrewm@154 487 interrupts = <0x37>;
andrewm@154 488 status = "disabled";
andrewm@154 489 linux,phandle = <0x2d>;
andrewm@154 490 phandle = <0x2d>;
andrewm@154 491 };
andrewm@154 492
andrewm@154 493 timer@44e31000 {
andrewm@154 494 compatible = "ti,omap2-timer";
andrewm@154 495 reg = <0x44e31000 0x400>;
andrewm@154 496 interrupts = <0x43>;
andrewm@154 497 ti,hwmods = "timer1";
andrewm@154 498 ti,timer-alwon;
andrewm@154 499 linux,phandle = <0x2e>;
andrewm@154 500 phandle = <0x2e>;
andrewm@154 501 };
andrewm@154 502
andrewm@154 503 timer@48040000 {
andrewm@154 504 compatible = "ti,omap2-timer";
andrewm@154 505 reg = <0x48040000 0x400>;
andrewm@154 506 interrupts = <0x44>;
andrewm@154 507 ti,hwmods = "timer2";
andrewm@154 508 linux,phandle = <0x2f>;
andrewm@154 509 phandle = <0x2f>;
andrewm@154 510 };
andrewm@154 511
andrewm@154 512 timer@48042000 {
andrewm@154 513 compatible = "ti,omap2-timer";
andrewm@154 514 reg = <0x48042000 0x400>;
andrewm@154 515 interrupts = <0x45>;
andrewm@154 516 ti,hwmods = "timer3";
andrewm@154 517 linux,phandle = <0x30>;
andrewm@154 518 phandle = <0x30>;
andrewm@154 519 };
andrewm@154 520
andrewm@154 521 timer@48044000 {
andrewm@154 522 compatible = "ti,omap2-timer";
andrewm@154 523 reg = <0x48044000 0x400>;
andrewm@154 524 interrupts = <0x5c>;
andrewm@154 525 ti,hwmods = "timer4";
andrewm@154 526 ti,timer-pwm;
andrewm@154 527 linux,phandle = <0x31>;
andrewm@154 528 phandle = <0x31>;
andrewm@154 529 };
andrewm@154 530
andrewm@154 531 timer@48046000 {
andrewm@154 532 compatible = "ti,omap2-timer";
andrewm@154 533 reg = <0x48046000 0x400>;
andrewm@154 534 interrupts = <0x5d>;
andrewm@154 535 ti,hwmods = "timer5";
andrewm@154 536 ti,timer-pwm;
andrewm@154 537 linux,phandle = <0x32>;
andrewm@154 538 phandle = <0x32>;
andrewm@154 539 };
andrewm@154 540
andrewm@154 541 timer@48048000 {
andrewm@154 542 compatible = "ti,omap2-timer";
andrewm@154 543 reg = <0x48048000 0x400>;
andrewm@154 544 interrupts = <0x5e>;
andrewm@154 545 ti,hwmods = "timer6";
andrewm@154 546 ti,timer-pwm;
andrewm@154 547 linux,phandle = <0x33>;
andrewm@154 548 phandle = <0x33>;
andrewm@154 549 };
andrewm@154 550
andrewm@154 551 timer@4804a000 {
andrewm@154 552 compatible = "ti,omap2-timer";
andrewm@154 553 reg = <0x4804a000 0x400>;
andrewm@154 554 interrupts = <0x5f>;
andrewm@154 555 ti,hwmods = "timer7";
andrewm@154 556 ti,timer-pwm;
andrewm@154 557 linux,phandle = <0x34>;
andrewm@154 558 phandle = <0x34>;
andrewm@154 559 };
andrewm@154 560
andrewm@154 561 pruss@4a300000 {
andrewm@154 562 compatible = "ti,pruss-v2";
andrewm@154 563 ti,hwmods = "pruss";
andrewm@154 564 ti,deassert-hard-reset = "pruss", "pruss";
andrewm@154 565 reg = <0x4a300000 0x80000>;
andrewm@154 566 ti,pintc-offset = <0x20000>;
andrewm@154 567 interrupt-parent = <0x1>;
andrewm@154 568 status = "disabled";
andrewm@154 569 interrupts = <0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b>;
andrewm@154 570 linux,phandle = <0x35>;
andrewm@154 571 phandle = <0x35>;
andrewm@154 572 };
andrewm@154 573
andrewm@154 574 rtc@44e3e000 {
andrewm@154 575 compatible = "ti,da830-rtc";
andrewm@154 576 reg = <0x44e3e000 0x1000>;
andrewm@154 577 interrupts = <0x4b 0x4c>;
andrewm@154 578 ti,hwmods = "rtc";
andrewm@154 579 ti,system-power-controller;
andrewm@154 580 };
andrewm@154 581
andrewm@154 582 spi@48030000 {
andrewm@154 583 compatible = "ti,omap4-mcspi";
andrewm@154 584 #address-cells = <0x1>;
andrewm@154 585 #size-cells = <0x0>;
andrewm@154 586 reg = <0x48030000 0x400>;
andrewm@154 587 interrupt = <0x41>;
andrewm@154 588 ti,spi-num-cs = <0x2>;
andrewm@154 589 ti,hwmods = "spi0";
andrewm@154 590 dmas = <0x9 0x10 0x9 0x11 0x9 0x12 0x9 0x13>;
andrewm@154 591 dma-names = "tx0", "rx0", "tx1", "rx1";
andrewm@154 592 status = "disabled";
andrewm@154 593 linux,phandle = <0x36>;
andrewm@154 594 phandle = <0x36>;
andrewm@154 595 };
andrewm@154 596
andrewm@154 597 spi@481a0000 {
andrewm@154 598 compatible = "ti,omap4-mcspi";
andrewm@154 599 #address-cells = <0x1>;
andrewm@154 600 #size-cells = <0x0>;
andrewm@154 601 reg = <0x481a0000 0x400>;
andrewm@154 602 interrupt = <0x7d>;
andrewm@154 603 ti,spi-num-cs = <0x2>;
andrewm@154 604 ti,hwmods = "spi1";
andrewm@154 605 dmas = <0x9 0x2a 0x9 0x2b 0x9 0x2c 0x9 0x2d>;
andrewm@154 606 dma-names = "tx0", "rx0", "tx1", "rx1";
andrewm@154 607 status = "disabled";
andrewm@154 608 linux,phandle = <0x37>;
andrewm@154 609 phandle = <0x37>;
andrewm@154 610 };
andrewm@154 611
andrewm@154 612 gpmc@50000000 {
andrewm@154 613 compatible = "ti,am3352-gpmc";
andrewm@154 614 ti,hwmods = "gpmc";
andrewm@154 615 reg = <0x50000000 0x1000000>;
andrewm@154 616 interrupts = <0x64>;
andrewm@154 617 gpmc,num-cs = <0x7>;
andrewm@154 618 gpmc,num-waitpins = <0x2>;
andrewm@154 619 #address-cells = <0x2>;
andrewm@154 620 #size-cells = <0x1>;
andrewm@154 621 status = "disabled";
andrewm@154 622 linux,phandle = <0x38>;
andrewm@154 623 phandle = <0x38>;
andrewm@154 624 };
andrewm@154 625
andrewm@154 626 nop-phy@0 {
andrewm@154 627 compatible = "nop-xceiv-usb";
andrewm@154 628 };
andrewm@154 629
andrewm@154 630 nop-phy@1 {
andrewm@154 631 compatible = "nop-xceiv-usb";
andrewm@154 632 };
andrewm@154 633
andrewm@154 634 usb@47400000 {
andrewm@154 635 compatible = "ti,musb-am33xx";
andrewm@154 636 reg = <0x47400000 0x1000 0x47401000 0x800 0x47401800 0x800>;
andrewm@154 637 interrupts = <0x11 0x12 0x13>;
andrewm@154 638 multipoint = <0x1>;
andrewm@154 639 num-eps = <0x10>;
andrewm@154 640 ram-bits = <0xc>;
andrewm@154 641 port0-mode = <0x3>;
andrewm@154 642 port1-mode = <0x1>;
andrewm@154 643 power = <0xfa>;
andrewm@154 644 ti,hwmods = "usb_otg_hs";
andrewm@154 645 status = "okay";
andrewm@154 646 interface_type = <0x1>;
andrewm@154 647 linux,phandle = <0x39>;
andrewm@154 648 phandle = <0x39>;
andrewm@154 649 };
andrewm@154 650
andrewm@154 651 ethernet@4a100000 {
andrewm@154 652 compatible = "ti,cpsw";
andrewm@154 653 ti,hwmods = "cpgmac0";
andrewm@154 654 cpdma_channels = <0x8>;
andrewm@154 655 ale_entries = <0x400>;
andrewm@154 656 bd_ram_size = <0x2000>;
andrewm@154 657 no_bd_ram = <0x0>;
andrewm@154 658 rx_descs = <0x40>;
andrewm@154 659 mac_control = <0x20>;
andrewm@154 660 slaves = <0x2>;
andrewm@154 661 cpts_active_slave = <0x0>;
andrewm@154 662 cpts_clock_mult = <0x80000000>;
andrewm@154 663 cpts_clock_shift = <0x1d>;
andrewm@154 664 reg = <0x4a100000 0x800 0x4a101200 0x100>;
andrewm@154 665 #address-cells = <0x1>;
andrewm@154 666 #size-cells = <0x1>;
andrewm@154 667 interrupt-parent = <0x1>;
andrewm@154 668 interrupts = <0x28 0x29 0x2a 0x2b>;
andrewm@154 669 ranges;
andrewm@154 670 disable-napi;
andrewm@154 671 linux,phandle = <0x3a>;
andrewm@154 672 phandle = <0x3a>;
andrewm@154 673
andrewm@154 674 mdio@4a101000 {
andrewm@154 675 compatible = "ti,davinci_mdio";
andrewm@154 676 #address-cells = <0x1>;
andrewm@154 677 #size-cells = <0x0>;
andrewm@154 678 ti,hwmods = "davinci_mdio";
andrewm@154 679 bus_freq = <0xf4240>;
andrewm@154 680 reg = <0x4a101000 0x100>;
andrewm@154 681 linux,phandle = <0xc>;
andrewm@154 682 phandle = <0xc>;
andrewm@154 683 };
andrewm@154 684
andrewm@154 685 slave@4a100200 {
andrewm@154 686 mac-address = [00 00 00 00 00 00];
andrewm@154 687 phy_id = <0xc 0x0>;
andrewm@154 688 linux,phandle = <0x3b>;
andrewm@154 689 phandle = <0x3b>;
andrewm@154 690 };
andrewm@154 691
andrewm@154 692 slave@4a100300 {
andrewm@154 693 mac-address = [00 00 00 00 00 00];
andrewm@154 694 phy_id = <0xc 0x1>;
andrewm@154 695 linux,phandle = <0x3c>;
andrewm@154 696 phandle = <0x3c>;
andrewm@154 697 };
andrewm@154 698 };
andrewm@154 699
andrewm@154 700 tscadc@44e0d000 {
andrewm@154 701 compatible = "ti,ti-tscadc";
andrewm@154 702 reg = <0x44e0d000 0x1000>;
andrewm@154 703 interrupt-parent = <0x1>;
andrewm@154 704 interrupts = <0x10>;
andrewm@154 705 ti,hwmods = "adc_tsc";
andrewm@154 706 status = "disabled";
andrewm@154 707 linux,phandle = <0x3d>;
andrewm@154 708 phandle = <0x3d>;
andrewm@154 709 };
andrewm@154 710
andrewm@154 711 lcdc@4830e000 {
andrewm@154 712 compatible = "ti,am3352-lcdc", "ti,da830-lcdc";
andrewm@154 713 reg = <0x4830e000 0x1000>;
andrewm@154 714 interrupts = <0x24>;
andrewm@154 715 status = "disabled";
andrewm@154 716 ti,hwmods = "lcdc";
andrewm@154 717 linux,phandle = <0x3e>;
andrewm@154 718 phandle = <0x3e>;
andrewm@154 719 };
andrewm@154 720
andrewm@154 721 epwmss@48300000 {
andrewm@154 722 compatible = "ti,am33xx-pwmss";
andrewm@154 723 reg = <0x48300000 0x10>;
andrewm@154 724 ti,hwmods = "epwmss0";
andrewm@154 725 #address-cells = <0x1>;
andrewm@154 726 #size-cells = <0x1>;
andrewm@154 727 status = "disabled";
andrewm@154 728 ranges = <0x48300100 0x48300100 0x80 0x48300180 0x48300180 0x80 0x48300200 0x48300200 0x80>;
andrewm@154 729 linux,phandle = <0x3f>;
andrewm@154 730 phandle = <0x3f>;
andrewm@154 731
andrewm@154 732 ecap@48300100 {
andrewm@154 733 compatible = "ti,am33xx-ecap";
andrewm@154 734 #pwm-cells = <0x3>;
andrewm@154 735 reg = <0x48300100 0x80>;
andrewm@154 736 ti,hwmods = "ecap0";
andrewm@154 737 status = "disabled";
andrewm@154 738 linux,phandle = <0x40>;
andrewm@154 739 phandle = <0x40>;
andrewm@154 740 };
andrewm@154 741
andrewm@154 742 ehrpwm@48300200 {
andrewm@154 743 compatible = "ti,am33xx-ehrpwm";
andrewm@154 744 #pwm-cells = <0x3>;
andrewm@154 745 reg = <0x48300200 0x80>;
andrewm@154 746 ti,hwmods = "ehrpwm0";
andrewm@154 747 status = "disabled";
andrewm@154 748 linux,phandle = <0x41>;
andrewm@154 749 phandle = <0x41>;
andrewm@154 750 };
andrewm@154 751 };
andrewm@154 752
andrewm@154 753 epwmss@48302000 {
andrewm@154 754 compatible = "ti,am33xx-pwmss";
andrewm@154 755 reg = <0x48302000 0x10>;
andrewm@154 756 ti,hwmods = "epwmss1";
andrewm@154 757 #address-cells = <0x1>;
andrewm@154 758 #size-cells = <0x1>;
andrewm@154 759 status = "disabled";
andrewm@154 760 ranges = <0x48302100 0x48302100 0x80 0x48302180 0x48302180 0x80 0x48302200 0x48302200 0x80>;
andrewm@154 761 linux,phandle = <0x42>;
andrewm@154 762 phandle = <0x42>;
andrewm@154 763
andrewm@154 764 ecap@48302100 {
andrewm@154 765 compatible = "ti,am33xx-ecap";
andrewm@154 766 #pwm-cells = <0x3>;
andrewm@154 767 reg = <0x48302100 0x80>;
andrewm@154 768 ti,hwmods = "ecap1";
andrewm@154 769 status = "disabled";
andrewm@154 770 linux,phandle = <0x43>;
andrewm@154 771 phandle = <0x43>;
andrewm@154 772 };
andrewm@154 773
andrewm@154 774 ehrpwm@48302200 {
andrewm@154 775 compatible = "ti,am33xx-ehrpwm";
andrewm@154 776 #pwm-cells = <0x3>;
andrewm@154 777 reg = <0x48302200 0x80>;
andrewm@154 778 ti,hwmods = "ehrpwm1";
andrewm@154 779 status = "disabled";
andrewm@154 780 linux,phandle = <0x44>;
andrewm@154 781 phandle = <0x44>;
andrewm@154 782 };
andrewm@154 783 };
andrewm@154 784
andrewm@154 785 epwmss@48304000 {
andrewm@154 786 compatible = "ti,am33xx-pwmss";
andrewm@154 787 reg = <0x48304000 0x10>;
andrewm@154 788 ti,hwmods = "epwmss2";
andrewm@154 789 #address-cells = <0x1>;
andrewm@154 790 #size-cells = <0x1>;
andrewm@154 791 status = "disabled";
andrewm@154 792 ranges = <0x48304100 0x48304100 0x80 0x48304180 0x48304180 0x80 0x48304200 0x48304200 0x80>;
andrewm@154 793 linux,phandle = <0x45>;
andrewm@154 794 phandle = <0x45>;
andrewm@154 795
andrewm@154 796 ecap@48304100 {
andrewm@154 797 compatible = "ti,am33xx-ecap";
andrewm@154 798 #pwm-cells = <0x3>;
andrewm@154 799 reg = <0x48304100 0x80>;
andrewm@154 800 ti,hwmods = "ecap2";
andrewm@154 801 status = "disabled";
andrewm@154 802 linux,phandle = <0x46>;
andrewm@154 803 phandle = <0x46>;
andrewm@154 804 };
andrewm@154 805
andrewm@154 806 ehrpwm@48304200 {
andrewm@154 807 compatible = "ti,am33xx-ehrpwm";
andrewm@154 808 #pwm-cells = <0x3>;
andrewm@154 809 reg = <0x48304200 0x80>;
andrewm@154 810 ti,hwmods = "ehrpwm2";
andrewm@154 811 status = "disabled";
andrewm@154 812 linux,phandle = <0x47>;
andrewm@154 813 phandle = <0x47>;
andrewm@154 814 };
andrewm@154 815 };
andrewm@154 816
andrewm@154 817 sham@53100000 {
andrewm@154 818 compatible = "ti,omap4-sham";
andrewm@154 819 ti,hwmods = "sham";
andrewm@154 820 #address-cells = <0x1>;
andrewm@154 821 #size-cells = <0x0>;
andrewm@154 822 reg = <0x53100000 0x200>;
andrewm@154 823 interrupt-parent = <0x1>;
andrewm@154 824 interrupts = <0x6d>;
andrewm@154 825 dmas = <0x9 0x24>;
andrewm@154 826 dma-names = "rx";
andrewm@154 827 status = "okay";
andrewm@154 828 linux,phandle = <0x48>;
andrewm@154 829 phandle = <0x48>;
andrewm@154 830 };
andrewm@154 831
andrewm@154 832 aes@53500000 {
andrewm@154 833 compatible = "ti,omap4-aes";
andrewm@154 834 ti,hwmods = "aes";
andrewm@154 835 #address-cells = <0x1>;
andrewm@154 836 #size-cells = <0x0>;
andrewm@154 837 reg = <0x53500000 0xa0>;
andrewm@154 838 interrupt-parent = <0x1>;
andrewm@154 839 interrupts = <0x66>;
andrewm@154 840 dmas = <0x9 0x6 0x9 0x5>;
andrewm@154 841 dma-names = "tx", "rx";
andrewm@154 842 status = "okay";
andrewm@154 843 linux,phandle = <0x49>;
andrewm@154 844 phandle = <0x49>;
andrewm@154 845 };
andrewm@154 846
andrewm@154 847 mcasp@48038000 {
andrewm@154 848 compatible = "ti,omap2-mcasp-audio";
andrewm@154 849 #address-cells = <0x1>;
andrewm@154 850 #size-cells = <0x0>;
andrewm@154 851 ti,hwmods = "mcasp0";
andrewm@154 852 reg = <0x48038000 0x2000>;
andrewm@154 853 interrupts = <0x50 0x51>;
andrewm@154 854 status = "disabled";
andrewm@154 855 asp-chan-q = <0x2>;
andrewm@154 856 tx-dma-offset = <0x46000000>;
andrewm@154 857 rx-dma-offset = <0x46000000>;
andrewm@154 858 dmas = <0x9 0x8 0x9 0x9>;
andrewm@154 859 dma-names = "tx", "rx";
andrewm@154 860 linux,phandle = <0x4a>;
andrewm@154 861 phandle = <0x4a>;
andrewm@154 862 };
andrewm@154 863
andrewm@154 864 mcasp@4803C000 {
andrewm@154 865 compatible = "ti,omap2-mcasp-audio";
andrewm@154 866 #address-cells = <0x1>;
andrewm@154 867 #size-cells = <0x0>;
andrewm@154 868 ti,hwmods = "mcasp1";
andrewm@154 869 reg = <0x4803c000 0x2000>;
andrewm@154 870 interrupts = <0x52 0x53>;
andrewm@154 871 status = "disabled";
andrewm@154 872 asp-chan-q = <0x2>;
andrewm@154 873 tx-dma-offset = <0x46400000>;
andrewm@154 874 rx-dma-offset = <0x46400000>;
andrewm@154 875 dmas = <0x9 0xa 0x9 0xb>;
andrewm@154 876 dma-names = "tx", "rx";
andrewm@154 877 linux,phandle = <0x4b>;
andrewm@154 878 phandle = <0x4b>;
andrewm@154 879 };
andrewm@154 880
andrewm@154 881 gpio-leds {
andrewm@154 882 compatible = "gpio-leds";
andrewm@154 883 pinctrl-names = "default";
andrewm@154 884 pinctrl-0 = <0x3>;
andrewm@154 885
andrewm@154 886 led0 {
andrewm@154 887 label = "beaglebone:green:usr0";
andrewm@154 888 gpios = <0x5 0x15 0x0>;
andrewm@154 889 linux,default-trigger = "heartbeat";
andrewm@154 890 default-state = "off";
andrewm@154 891 };
andrewm@154 892
andrewm@154 893 led1 {
andrewm@154 894 label = "beaglebone:green:usr1";
andrewm@154 895 gpios = <0x5 0x16 0x0>;
andrewm@154 896 linux,default-trigger = "mmc0";
andrewm@154 897 default-state = "off";
andrewm@154 898 };
andrewm@154 899
andrewm@154 900 led2 {
andrewm@154 901 label = "beaglebone:green:usr2";
andrewm@154 902 gpios = <0x5 0x17 0x0>;
andrewm@154 903 linux,default-trigger = "cpu0";
andrewm@154 904 default-state = "off";
andrewm@154 905 };
andrewm@154 906
andrewm@154 907 led3 {
andrewm@154 908 label = "beaglebone:green:usr3";
andrewm@154 909 gpios = <0x5 0x18 0x0>;
andrewm@154 910 default-state = "off";
andrewm@154 911 linux,default-trigger = "mmc1";
andrewm@154 912 };
andrewm@154 913 };
andrewm@154 914 };
andrewm@154 915
andrewm@154 916 bone_capemgr {
andrewm@154 917 compatible = "ti,bone-capemgr";
andrewm@154 918 status = "okay";
andrewm@154 919 eeprom = <0xd>;
andrewm@154 920
andrewm@154 921 baseboardmaps {
andrewm@154 922
andrewm@154 923 board@0 {
andrewm@154 924 board-name = "A335BONE";
andrewm@154 925 compatible-name = "ti,beaglebone";
andrewm@154 926 linux,phandle = <0x4c>;
andrewm@154 927 phandle = <0x4c>;
andrewm@154 928 };
andrewm@154 929
andrewm@154 930 board@1 {
andrewm@154 931 board-name = "A335BNLT";
andrewm@154 932 compatible-name = "ti,beaglebone-green";
andrewm@154 933 linux,phandle = <0x4d>;
andrewm@154 934 phandle = <0x4d>;
andrewm@154 935 };
andrewm@154 936 };
andrewm@154 937
andrewm@154 938 slots {
andrewm@154 939
andrewm@154 940 slot@0 {
andrewm@154 941 eeprom = <0xe>;
andrewm@154 942 };
andrewm@154 943
andrewm@154 944 slot@1 {
andrewm@154 945 eeprom = <0xf>;
andrewm@154 946 };
andrewm@154 947
andrewm@154 948 slot@2 {
andrewm@154 949 eeprom = <0x10>;
andrewm@154 950 };
andrewm@154 951
andrewm@154 952 slot@3 {
andrewm@154 953 eeprom = <0x11>;
andrewm@154 954 };
andrewm@154 955
andrewm@154 956 slot@5 {
andrewm@154 957 ti,cape-override;
andrewm@154 958 compatible = "kernel-command-line", "runtime";
andrewm@154 959 board-name = "Bone-Geiger";
andrewm@154 960 version = "00A0";
andrewm@154 961 manufacturer = "Geiger Inc.";
andrewm@154 962 part-number = "BB-BONE-GEIGER";
andrewm@154 963 };
andrewm@154 964
andrewm@154 965 slot@7 {
andrewm@154 966 ti,cape-override;
andrewm@154 967 compatible = "kernel-command-line", "runtime";
andrewm@154 968 board-name = "Bone-Nixie";
andrewm@154 969 version = "00A0";
andrewm@154 970 manufacturer = "Ranostay Industries";
andrewm@154 971 part-number = "BB-BONE-NIXIE";
andrewm@154 972 };
andrewm@154 973
andrewm@154 974 slot@8 {
andrewm@154 975 ti,cape-override;
andrewm@154 976 compatible = "kernel-command-line", "runtime";
andrewm@154 977 board-name = "Bone-TFT";
andrewm@154 978 version = "00A0";
andrewm@154 979 manufacturer = "Adafruit";
andrewm@154 980 part-number = "BB-BONE-TFT-01";
andrewm@154 981 };
andrewm@154 982
andrewm@154 983 slot@9 {
andrewm@154 984 ti,cape-override;
andrewm@154 985 compatible = "kernel-command-line", "runtime";
andrewm@154 986 board-name = "Bone-RTC";
andrewm@154 987 version = "00A0";
andrewm@154 988 manufacturer = "Adafruit";
andrewm@154 989 part-number = "BB-BONE-RTC-01";
andrewm@154 990 };
andrewm@154 991
andrewm@154 992 slot@10 {
andrewm@154 993 ti,cape-override;
andrewm@154 994 compatible = "kernel-command-line", "runtime";
andrewm@154 995 board-name = "Bone-Hexy";
andrewm@154 996 version = "00A0";
andrewm@154 997 manufacturer = "Koen Kooi";
andrewm@154 998 part-number = "BB-BONE-HEXY-01";
andrewm@154 999 };
andrewm@154 1000
andrewm@154 1001 slot@11 {
andrewm@154 1002 ti,cape-override;
andrewm@154 1003 compatible = "kernel-command-line", "runtime";
andrewm@154 1004 board-name = "Bone-MRF24J40";
andrewm@154 1005 version = "00A0";
andrewm@154 1006 manufacturer = "Signal 11 Software";
andrewm@154 1007 part-number = "BB-BONE-MRF24J40";
andrewm@154 1008 };
andrewm@154 1009
andrewm@154 1010 slot@100 {
andrewm@154 1011 ti,cape-override;
andrewm@154 1012 priority = <0x1>;
andrewm@154 1013 compatible = "ti,beaglebone-green";
andrewm@154 1014 board-name = "Bone-LT-eMMC-2G";
andrewm@154 1015 version = "00A0";
andrewm@154 1016 manufacturer = "Texas Instruments";
andrewm@154 1017 part-number = "BB-BONE-EMMC-2G";
andrewm@154 1018 };
andrewm@154 1019
andrewm@154 1020 slot@101 {
andrewm@154 1021 ti,cape-override;
andrewm@154 1022 priority = <0x1>;
andrewm@154 1023 compatible = "ti,beaglebone-green";
andrewm@154 1024 board-name = "Bone-Black-HDMI";
andrewm@154 1025 version = "00A0";
andrewm@154 1026 manufacturer = "Texas Instruments";
andrewm@154 1027 part-number = "BB-BONELT-HDMI";
andrewm@154 1028 };
andrewm@154 1029 };
andrewm@154 1030
andrewm@154 1031 capemaps {
andrewm@154 1032
andrewm@154 1033 cape@0 {
andrewm@154 1034 part-number = "BB-BONE-DVID-01";
andrewm@154 1035
andrewm@154 1036 version@00A0 {
andrewm@154 1037 version = "00A0";
andrewm@154 1038 dtbo = "cape-bone-dvi-00A0.dtbo";
andrewm@154 1039 };
andrewm@154 1040
andrewm@154 1041 version@00A1 {
andrewm@154 1042 version = "00A1", "01";
andrewm@154 1043 dtbo = "cape-bone-dvi-00A1.dtbo";
andrewm@154 1044 };
andrewm@154 1045
andrewm@154 1046 version@00A2 {
andrewm@154 1047 version = "00A2", "A2";
andrewm@154 1048 dtbo = "cape-bone-dvi-00A2.dtbo";
andrewm@154 1049 };
andrewm@154 1050
andrewm@154 1051 version@00A3 {
andrewm@154 1052 version = "00A3";
andrewm@154 1053 dtbo = "cape-bone-dvi-00A2.dtbo";
andrewm@154 1054 };
andrewm@154 1055 };
andrewm@154 1056
andrewm@154 1057 cape@1 {
andrewm@154 1058 part-number = "BB-BONE-EMMC-2G";
andrewm@154 1059
andrewm@154 1060 version@00A0 {
andrewm@154 1061 version = "00A0";
andrewm@154 1062 dtbo = "cape-bone-2g-emmc1.dtbo";
andrewm@154 1063 };
andrewm@154 1064 };
andrewm@154 1065
andrewm@154 1066 cape@2 {
andrewm@154 1067 part-number = "BB-BONE-GEIGER";
andrewm@154 1068
andrewm@154 1069 version@00A0 {
andrewm@154 1070 version = "00A0";
andrewm@154 1071 dtbo = "cape-bone-geiger-00A0.dtbo";
andrewm@154 1072 };
andrewm@154 1073 };
andrewm@154 1074
andrewm@154 1075 cape@3 {
andrewm@154 1076 part-number = "BB-BONE-LCD3-01";
andrewm@154 1077
andrewm@154 1078 version@00A0 {
andrewm@154 1079 version = "00A0";
andrewm@154 1080 dtbo = "cape-bone-lcd3-00A0.dtbo";
andrewm@154 1081 };
andrewm@154 1082
andrewm@154 1083 version@00A2 {
andrewm@154 1084 version = "00A2";
andrewm@154 1085 dtbo = "cape-bone-lcd3-00A2.dtbo";
andrewm@154 1086 };
andrewm@154 1087 };
andrewm@154 1088
andrewm@154 1089 cape@4 {
andrewm@154 1090 part-number = "BB-BONE-WTHR-01";
andrewm@154 1091
andrewm@154 1092 version@00A0 {
andrewm@154 1093 version = "00A0";
andrewm@154 1094 dtbo = "cape-bone-weather-00A0.dtbo";
andrewm@154 1095 };
andrewm@154 1096 };
andrewm@154 1097
andrewm@154 1098 cape@5 {
andrewm@154 1099 part-number = "BB-BONELT-HDMI";
andrewm@154 1100
andrewm@154 1101 version@00A0 {
andrewm@154 1102 version = "00A0";
andrewm@154 1103 dtbo = "cape-boneblack-hdmi-00A0.dtbo";
andrewm@154 1104 };
andrewm@154 1105 };
andrewm@154 1106
andrewm@154 1107 cape@6 {
andrewm@154 1108 part-number = "BB-BONE-NIXIE";
andrewm@154 1109
andrewm@154 1110 version@00A0 {
andrewm@154 1111 version = "00A0";
andrewm@154 1112 dtbo = "cape-bone-nixie-00A0.dtbo";
andrewm@154 1113 };
andrewm@154 1114 };
andrewm@154 1115
andrewm@154 1116 cape@7 {
andrewm@154 1117 part-number = "BB-BONE-TFT-01";
andrewm@154 1118
andrewm@154 1119 version@00A0 {
andrewm@154 1120 version = "00A0";
andrewm@154 1121 dtbo = "cape-bone-adafruit-lcd-00A0.dtbo";
andrewm@154 1122 };
andrewm@154 1123 };
andrewm@154 1124
andrewm@154 1125 cape@8 {
andrewm@154 1126 part-number = "BB-BONE-RTC-01";
andrewm@154 1127
andrewm@154 1128 version@00A0 {
andrewm@154 1129 version = "00A0";
andrewm@154 1130 dtbo = "cape-bone-adafruit-rtc-00A0.dtbo";
andrewm@154 1131 };
andrewm@154 1132 };
andrewm@154 1133
andrewm@154 1134 cape@9 {
andrewm@154 1135 part-number = "BB-BONE-HEXY-01";
andrewm@154 1136
andrewm@154 1137 version@00A0 {
andrewm@154 1138 version = "00A0";
andrewm@154 1139 dtbo = "cape-bone-hexy-00A0.dtbo";
andrewm@154 1140 };
andrewm@154 1141 };
andrewm@154 1142
andrewm@154 1143 cape@10 {
andrewm@154 1144 part-number = "BB-BONE-MRF24J40";
andrewm@154 1145
andrewm@154 1146 version@00A0 {
andrewm@154 1147 version = "00A0";
andrewm@154 1148 dtbo = "cape-bone-mrf24j40-00A0.dtbo";
andrewm@154 1149 };
andrewm@154 1150 };
andrewm@154 1151
andrewm@154 1152 cape@11 {
andrewm@154 1153 part-number = "BB-BONE-EXPTEST";
andrewm@154 1154
andrewm@154 1155 version@00A0 {
andrewm@154 1156 version = "00A0";
andrewm@154 1157 dtbo = "cape-bone-exptest-00A0.dtbo";
andrewm@154 1158 };
andrewm@154 1159 };
andrewm@154 1160 };
andrewm@154 1161 };
andrewm@154 1162
andrewm@154 1163 fixedregulator@0 {
andrewm@154 1164 compatible = "regulator-fixed";
andrewm@154 1165 regulator-name = "vmmcsd_fixed";
andrewm@154 1166 regulator-min-microvolt = <0x325aa0>;
andrewm@154 1167 regulator-max-microvolt = <0x325aa0>;
andrewm@154 1168 linux,phandle = <0xa>;
andrewm@154 1169 phandle = <0xa>;
andrewm@154 1170 };
andrewm@154 1171
andrewm@154 1172 __symbols__ {
andrewm@154 1173 cpu = "/cpus/cpu@0";
andrewm@154 1174 am33xx_pinmux = "/pinmux@44e10800";
andrewm@154 1175 userled_pins = "/pinmux@44e10800/pinmux_userled_pins";
andrewm@154 1176 i2c0_pins = "/pinmux@44e10800/pinmux_i2c0_pins";
andrewm@154 1177 i2c1_pins = "/pinmux@44e10800/pinmux_i2c1_pins";
andrewm@154 1178 i2c2_pins = "/pinmux@44e10800/pinmux_i2c2_pins";
andrewm@154 1179 rstctl_pins = "/pinmux@44e10800/pinmux_rstctl_pins";
andrewm@154 1180 ocp = "/ocp";
andrewm@154 1181 intc = "/ocp/interrupt-controller@48200000";
andrewm@154 1182 edma = "/ocp/edma@49000000";
andrewm@154 1183 gpio1 = "/ocp/gpio@44e07000";
andrewm@154 1184 gpio2 = "/ocp/gpio@4804c000";
andrewm@154 1185 gpio3 = "/ocp/gpio@481ac000";
andrewm@154 1186 gpio4 = "/ocp/gpio@481ae000";
andrewm@154 1187 rstctl = "/ocp/rstctl@0";
andrewm@154 1188 uart1 = "/ocp/serial@44e09000";
andrewm@154 1189 uart2 = "/ocp/serial@48022000";
andrewm@154 1190 uart3 = "/ocp/serial@48024000";
andrewm@154 1191 uart4 = "/ocp/serial@481a6000";
andrewm@154 1192 uart5 = "/ocp/serial@481a8000";
andrewm@154 1193 uart6 = "/ocp/serial@481aa000";
andrewm@154 1194 i2c0 = "/ocp/i2c@44e0b000";
andrewm@154 1195 tps = "/ocp/i2c@44e0b000/tps@24";
andrewm@154 1196 dcdc1_reg = "/ocp/i2c@44e0b000/tps@24/regulators/regulator@0";
andrewm@154 1197 dcdc2_reg = "/ocp/i2c@44e0b000/tps@24/regulators/regulator@1";
andrewm@154 1198 dcdc3_reg = "/ocp/i2c@44e0b000/tps@24/regulators/regulator@2";
andrewm@154 1199 ldo1_reg = "/ocp/i2c@44e0b000/tps@24/regulators/regulator@3";
andrewm@154 1200 ldo2_reg = "/ocp/i2c@44e0b000/tps@24/regulators/regulator@4";
andrewm@154 1201 ldo3_reg = "/ocp/i2c@44e0b000/tps@24/regulators/regulator@5";
andrewm@154 1202 ldo4_reg = "/ocp/i2c@44e0b000/tps@24/regulators/regulator@6";
andrewm@154 1203 baseboard_eeprom = "/ocp/i2c@44e0b000/baseboard_eeprom@50";
andrewm@154 1204 i2c1 = "/ocp/i2c@4802a000";
andrewm@154 1205 i2c2 = "/ocp/i2c@4819c000";
andrewm@154 1206 cape_eeprom0 = "/ocp/i2c@4819c000/cape_eeprom0@54";
andrewm@154 1207 cape_eeprom1 = "/ocp/i2c@4819c000/cape_eeprom1@55";
andrewm@154 1208 cape_eeprom2 = "/ocp/i2c@4819c000/cape_eeprom2@56";
andrewm@154 1209 cape_eeprom3 = "/ocp/i2c@4819c000/cape_eeprom3@57";
andrewm@154 1210 mmc1 = "/ocp/mmc@48060000";
andrewm@154 1211 mmc2 = "/ocp/mmc@481d8000";
andrewm@154 1212 mmc3 = "/ocp/mmc@47810000";
andrewm@154 1213 wdt2 = "/ocp/wdt@44e35000";
andrewm@154 1214 dcan0 = "/ocp/d_can@481cc000";
andrewm@154 1215 dcan1 = "/ocp/d_can@481d0000";
andrewm@154 1216 timer1 = "/ocp/timer@44e31000";
andrewm@154 1217 timer2 = "/ocp/timer@48040000";
andrewm@154 1218 timer3 = "/ocp/timer@48042000";
andrewm@154 1219 timer4 = "/ocp/timer@48044000";
andrewm@154 1220 timer5 = "/ocp/timer@48046000";
andrewm@154 1221 timer6 = "/ocp/timer@48048000";
andrewm@154 1222 timer7 = "/ocp/timer@4804a000";
andrewm@154 1223 pruss = "/ocp/pruss@4a300000";
andrewm@154 1224 spi0 = "/ocp/spi@48030000";
andrewm@154 1225 spi1 = "/ocp/spi@481a0000";
andrewm@154 1226 gpmc = "/ocp/gpmc@50000000";
andrewm@154 1227 usb_otg_hs = "/ocp/usb@47400000";
andrewm@154 1228 mac = "/ocp/ethernet@4a100000";
andrewm@154 1229 davinci_mdio = "/ocp/ethernet@4a100000/mdio@4a101000";
andrewm@154 1230 cpsw_emac0 = "/ocp/ethernet@4a100000/slave@4a100200";
andrewm@154 1231 cpsw_emac1 = "/ocp/ethernet@4a100000/slave@4a100300";
andrewm@154 1232 tscadc = "/ocp/tscadc@44e0d000";
andrewm@154 1233 lcdc = "/ocp/lcdc@4830e000";
andrewm@154 1234 epwmss0 = "/ocp/epwmss@48300000";
andrewm@154 1235 ecap0 = "/ocp/epwmss@48300000/ecap@48300100";
andrewm@154 1236 ehrpwm0 = "/ocp/epwmss@48300000/ehrpwm@48300200";
andrewm@154 1237 epwmss1 = "/ocp/epwmss@48302000";
andrewm@154 1238 ecap1 = "/ocp/epwmss@48302000/ecap@48302100";
andrewm@154 1239 ehrpwm1 = "/ocp/epwmss@48302000/ehrpwm@48302200";
andrewm@154 1240 epwmss2 = "/ocp/epwmss@48304000";
andrewm@154 1241 ecap2 = "/ocp/epwmss@48304000/ecap@48304100";
andrewm@154 1242 ehrpwm2 = "/ocp/epwmss@48304000/ehrpwm@48304200";
andrewm@154 1243 sham = "/ocp/sham@53100000";
andrewm@154 1244 aes = "/ocp/aes@53500000";
andrewm@154 1245 mcasp0 = "/ocp/mcasp@48038000";
andrewm@154 1246 mcasp1 = "/ocp/mcasp@4803C000";
andrewm@154 1247 baseboard_beaglebone = "/bone_capemgr/baseboardmaps/board@0";
andrewm@154 1248 baseboard_beaglebone_black = "/bone_capemgr/baseboardmaps/board@1";
andrewm@154 1249 vmmcsd_fixed = "/fixedregulator@0";
andrewm@154 1250 };
andrewm@154 1251 };