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d@0: FFTW's planner actually executes and times different possible FFT d@0: algorithms in order to pick the fastest plan for a given n. In d@0: order to do this in as short a time as possible, however, the timer must d@0: have a very high resolution, and to accomplish this we employ the d@0: hardware cycle counters that are available on most CPUs. d@0: Currently, FFTW supports the cycle counters on x86, PowerPC/POWER, Alpha, d@0: UltraSPARC (SPARC v9), IA64, PA-RISC, and MIPS processors. d@0: d@0:
Access to the cycle counters, unfortunately, is a compiler and/or
d@0: operating-system dependent task, often requiring inline assembly
d@0: language, and it may be that your compiler is not supported. If you are
d@0: not supported, FFTW will by default fall back on its estimator
d@0: (effectively using FFTW_ESTIMATE for all plans).
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d@0: You can add support by editing the file kernel/cycle.h; normally,
d@0: this will involve adapting one of the examples already present in order
d@0: to use the inline-assembler syntax for your C compiler, and will only
d@0: require a couple of lines of code. Anyone adding support for a new
d@0: system to cycle.h is encouraged to email us at fftw@fftw.org.
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If a cycle counter is not available on your system (e.g. some embedded
d@0: processor), and you don't want to use estimated plans, as a last resort
d@0: you can use the --with-slow-timer option to configure (on
d@0: Unix) or #define WITH_SLOW_TIMER in config.h (elsewhere).
d@0: This will use the much lower-resolution gettimeofday function, or even
d@0: clock if the former is unavailable, and planning will be
d@0: extremely slow.
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