annotate Lib/fftw-3.2.1/cell/spu/spu_t1fv_4.spuc @ 7:c6f38cba266d

Cleaned up redundant code
author Geogaddi\David <d.m.ronan@qmul.ac.uk>
date Wed, 22 Jul 2015 15:14:58 +0100
parents 25bf17994ef1
children
rev   line source
d@0 1 /*
d@0 2 * Copyright (c) 2003, 2007-8 Matteo Frigo
d@0 3 * Copyright (c) 2003, 2007-8 Massachusetts Institute of Technology
d@0 4 *
d@0 5 * This program is free software; you can redistribute it and/or modify
d@0 6 * it under the terms of the GNU General Public License as published by
d@0 7 * the Free Software Foundation; either version 2 of the License, or
d@0 8 * (at your option) any later version.
d@0 9 *
d@0 10 * This program is distributed in the hope that it will be useful,
d@0 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
d@0 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
d@0 13 * GNU General Public License for more details.
d@0 14 *
d@0 15 * You should have received a copy of the GNU General Public License
d@0 16 * along with this program; if not, write to the Free Software
d@0 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
d@0 18 *
d@0 19 */
d@0 20 /* Generated by: ../../genfft/gen_twiddle_c -standalone -fma -reorder-insns -simd -compact -variables 100000 -include fftw-spu.h -trivial-stores -n 4 -name X(spu_t1fv_4) */
d@0 21
d@0 22 /*
d@0 23 * This function contains 11 FP additions, 8 FP multiplications,
d@0 24 * (or, 9 additions, 6 multiplications, 2 fused multiply/add),
d@0 25 * 17 stack variables, 0 constants, and 8 memory accesses
d@0 26 */
d@0 27 #include "fftw-spu.h"
d@0 28
d@0 29 void X(spu_t1fv_4) (R *ri, R *ii, const R *W, stride rs, INT mb, INT me, INT ms) {
d@0 30 INT m;
d@0 31 R *x;
d@0 32 x = ri;
d@0 33 for (m = mb, W = W + (mb * ((TWVL / VL) * 6)); m < me; m = m + VL, x = x + (VL * ms), W = W + (TWVL * 6), MAKE_VOLATILE_STRIDE(rs)) {
d@0 34 V T4, Tc, T9, Td, T1, T3, T2, T6, T8, T5, T7, Tb, Te, Ta, Tf;
d@0 35 T1 = LD(&(x[0]), ms, &(x[0]));
d@0 36 T2 = LD(&(x[WS(rs, 2)]), ms, &(x[0]));
d@0 37 T3 = BYTWJ(&(W[TWVL * 2]), T2);
d@0 38 T4 = VSUB(T1, T3);
d@0 39 Tc = VADD(T1, T3);
d@0 40 T5 = LD(&(x[WS(rs, 1)]), ms, &(x[WS(rs, 1)]));
d@0 41 T6 = BYTWJ(&(W[0]), T5);
d@0 42 T7 = LD(&(x[WS(rs, 3)]), ms, &(x[WS(rs, 1)]));
d@0 43 T8 = BYTWJ(&(W[TWVL * 4]), T7);
d@0 44 T9 = VSUB(T6, T8);
d@0 45 Td = VADD(T6, T8);
d@0 46 Ta = VFNMSI(T9, T4);
d@0 47 Tb = VFMAI(T9, T4);
d@0 48 ST(&(x[WS(rs, 1)]), Ta, ms, &(x[WS(rs, 1)]));
d@0 49 Tf = VADD(Tc, Td);
d@0 50 Te = VSUB(Tc, Td);
d@0 51 ST(&(x[0]), Tf, ms, &(x[0]));
d@0 52 ST(&(x[WS(rs, 3)]), Tb, ms, &(x[WS(rs, 1)]));
d@0 53 ST(&(x[WS(rs, 2)]), Te, ms, &(x[0]));
d@0 54 }
d@0 55 }